* Re: Different addressing modes?
@ 2003-05-21 22:11 Ulrich Weigand
0 siblings, 0 replies; 3+ messages in thread
From: Ulrich Weigand @ 2003-05-21 22:11 UTC (permalink / raw)
To: fcook37; +Cc: gcc, uweigand
Fred Cook wrote:
>I am still trying to get addressing modes correctly in my port.
>Basically my architecture has the following addressing modes:
>
> 1) absolute
> 2) register indirect
> 3) register + offset
> 4) register + register
I'm assuming this means the following RTX represent valid
memory operands:
1) (mem (symbol_ref ...))
2) (mem (reg ...))
3) (mem (plus (reg ...) (const_int ...)))
4) (mem (plus (reg ...) (reg ...)))
>I want to specify in my define_insn for "call" that 1+2 are allowed
>and in my define_insn for "movsi" that 2, 3, and 4 are allowed for
>loads and 2 and 3 for stores.
"call" can be handled specially. It is fine to have a pattern
that matches
(call (mem (symbol_ref ...))
even if (mem (symbol_ref ...)) is not a valid memory operand.
I would suggest to do the following:
- Define GO_IF_LEGITIMATE_ADDRESS so that 2), 3), and 4) above
are accepted. This means that usual memory accesses (i.e.
those for loads) simply use the "m" constraint.
- Define an additional constraint letter "S" to denote
'memory reference without a second register', and define
EXTRA_CONSTRAINTS to only accept 2) and 3) above for
this letter.
As this definition fulfils the requirements "a subset of
all memory references including all those consisting of
solely a base register", you can (and must) mark the
constraint letter "S" as EXTRA_MEMORY_CONSTRAINT. This
will cause reload to fix up the address if required
(note that you *must* provide a load-address type pattern
that accepts the full range of memory addresses as source).
With this set up, you can define movsi like this:
(define_insn "movsi"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,S")
(match_operand:SI 1 "general_operand" "m,r"))]
""
"@
ld %1 -> %0
st %0 %1"
)
All this is actually similar to the s390 setup, so you
might want to check out our backend for comparison ...
Bye,
Ulrich
--
Dr. Ulrich Weigand
weigand@informatik.uni-erlangen.de
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Different addressing modes?
2003-05-21 16:32 Fred Cook
@ 2003-05-21 16:48 ` Peter Barada
0 siblings, 0 replies; 3+ messages in thread
From: Peter Barada @ 2003-05-21 16:48 UTC (permalink / raw)
To: fcook377; +Cc: gcc, Ulrich.Weigand
>I am still trying to get addressing modes correctly in my port. Basically my
>architecture has the following addressing modes:
>
> 1) absolute
> 2) register indirect
> 3) register + offset
> 4) register + register
You may want to go back and read the Compiler internals documentation
where it talks about 'predicate' functions (such as general_operand,
nonimmediate_operand' that you can use to fine-tune what RTL the insns
patterns your port will accept.
As an example, in gcc/config/m68k/m68k.md, the 'pushasi' pattern is
used to push the address of a varaible/function, etc, and you can see
that the destination target predicate of the 'set' is push_operand
which restricts the RTL to only allow a push to the stack as the
destination, and specifies that the source of the 'set' is an
address_operand, a combination of predicates that are valid for the
pea instruction:
(define_insn "pushasi"
[(set (match_operand:SI 0 "push_operand" "=m")
(match_operand:SI 1 "address_operand" "p"))]
""
"pea %a1")
--
Peter Barada Peter.Barada@motorola.com
Wizard 781-852-2768 (direct)
WaveMark Solutions(A Motorola Company) 781-270-0193 (fax)
^ permalink raw reply [flat|nested] 3+ messages in thread
* Different addressing modes?
@ 2003-05-21 16:32 Fred Cook
2003-05-21 16:48 ` Peter Barada
0 siblings, 1 reply; 3+ messages in thread
From: Fred Cook @ 2003-05-21 16:32 UTC (permalink / raw)
To: gcc; +Cc: Ulrich.Weigand
I am still trying to get addressing modes correctly in my port. Basically my
architecture has the following addressing modes:
1) absolute
2) register indirect
3) register + offset
4) register + register
I want to specify in my define_insn for "call" that 1+2 are allowed and in
my define_insn for "movsi" that 2, 3, and 4 are allowed for loads and 2 and
3 for stores.
Which macros should I define?
What should I accept in GO_IF_LEGITIMATE? All four?
Which constraint letters should I introduce? Four letters for the four
modes? Which letters are free to use?
How to specify extra constraint in the define_insn pattern? Something
like...
(define_insn "movsi"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,S")
(match_operand:SI 1 "general_operand" "L,r"))]
""
"@
ld %1 -> %0
st %0 %1"
)
Where S accepts a store address and L accepts a load address. Or should it
be mS and mL? Or Sm or Lm?
Thanks,
Fred
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^ permalink raw reply [flat|nested] 3+ messages in thread
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