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* help on - instruction scheduling passes in gcc
@ 2009-11-03 17:33 ddmetro
  0 siblings, 0 replies; 7+ messages in thread
From: ddmetro @ 2009-11-03 17:33 UTC (permalink / raw)
  To: gcc


Hi All,
       Our project is to optimize instruction scheduling in gcc by detecting
structural hazards. We are trying to understand the two instruction
scheduling passes(pass_sched and pass_sched2) and have the following doubts
regarding the same. We are currently looking at schedule_insns() method and
not selective scheduler.

1. We are expecting that pass_sched and pass_sched2, each will enter
schedule_insns() function once per pass. However, we found that it is
entering schedule_insns() function per function(in the program) per pass.
(If there are two functions in the input program, pass_sched will enter
schedule_insns() twice and pass_sched2 will also enter schedule_insns()
twice.)We are not able to track this flow in the code. Kindly help us as to
what are we missing out?

2. We are trying to visualize the code into regions and then into basic
blocks i.e., what all insns form a basic block and what basic blocks form a
region. 
   Also we are trying to figure out - the before and after scenarios - when
an insn moves from one basic block to another.
   However we are not able to map this information looking at any of the rtl
dump files. 
   Kindly help us as to what should be our approach?

3. We are trying to figure out the difference and need of 2 passes, both
calling the same function(schedule_insns()). However, we are unable to find
any difference in the two calls to schedule_insns() in two schedule
passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
out?

Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1 

Kindly help us with our issues.

Thanking You,
Dhiraj Padnani
-- 
View this message in context: http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc-tp26160581p26160581.html
Sent from the gcc - Dev mailing list archive at Nabble.com.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: help on - instruction scheduling passes in gcc
  2009-11-03 17:25 ddmetro
@ 2009-11-03 18:00 ` Ian Lance Taylor
  0 siblings, 0 replies; 7+ messages in thread
From: Ian Lance Taylor @ 2009-11-03 18:00 UTC (permalink / raw)
  To: ddmetro; +Cc: gcc

ddmetro <puzzlesdj@gmail.com> writes:

> 1. We are expecting that pass_sched and pass_sched2, each will enter
> schedule_insns() function once per pass. However, we found that it is
> entering schedule_insns() function per function(in the program) per pass.
> (If there are two functions in the input program, pass_sched will enter
> schedule_insns() twice and pass_sched2 will also enter schedule_insns()
> twice.)We are not able to track this flow in the code. Kindly help us as to
> what are we missing out?

I got six copies of your message.  One is sufficient.

The optimization passes are all run for each function.  If you have
two functions, pass_sched and pass_sched2 will each be run twice.


> 2. We are trying to visualize the code into regions and then into basic
> blocks i.e., what all insns form a basic block and what basic blocks form a
> region. 
>    Also we are trying to figure out - the before and after scenarios - when
> an insn moves from one basic block to another.
>    However we are not able to map this information looking at any of the rtl
> dump files. 
>    Kindly help us as to what should be our approach?

Look for the basic block notes or use -fdump-rtl-all-blocks.


> 3. We are trying to figure out the difference and need of 2 passes, both
> calling the same function(schedule_insns()). However, we are unable to find
> any difference in the two calls to schedule_insns() in two schedule
> passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
> out?

The difference is that pass_sched is called before register allocation
and pass_sched2 is called after.

Ian

^ permalink raw reply	[flat|nested] 7+ messages in thread

* help on - instruction scheduling passes in gcc
@ 2009-11-03 17:33 ddmetro
  0 siblings, 0 replies; 7+ messages in thread
From: ddmetro @ 2009-11-03 17:33 UTC (permalink / raw)
  To: gcc


Hi All,
       Our project is to optimize instruction scheduling in gcc by detecting
structural hazards. We are trying to understand the two instruction
scheduling passes(pass_sched and pass_sched2) and have the following doubts
regarding the same. We are currently looking at schedule_insns() method and
not selective scheduler.

1. We are expecting that pass_sched and pass_sched2, each will enter
schedule_insns() function once per pass. However, we found that it is
entering schedule_insns() function per function(in the program) per pass.
(If there are two functions in the input program, pass_sched will enter
schedule_insns() twice and pass_sched2 will also enter schedule_insns()
twice.)We are not able to track this flow in the code. Kindly help us as to
what are we missing out?

2. We are trying to visualize the code into regions and then into basic
blocks i.e., what all insns form a basic block and what basic blocks form a
region. 
   Also we are trying to figure out - the before and after scenarios - when
an insn moves from one basic block to another.
   However we are not able to map this information looking at any of the rtl
dump files. 
   Kindly help us as to what should be our approach?

3. We are trying to figure out the difference and need of 2 passes, both
calling the same function(schedule_insns()). However, we are unable to find
any difference in the two calls to schedule_insns() in two schedule
passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
out?

Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1 

Kindly help us with our issues.

Thanking You,
Dhiraj Padnani
-- 
View this message in context: http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc-tp26160585p26160585.html
Sent from the gcc - Dev mailing list archive at Nabble.com.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* help on - instruction scheduling passes in gcc
@ 2009-11-03 17:33 ddmetro
  0 siblings, 0 replies; 7+ messages in thread
From: ddmetro @ 2009-11-03 17:33 UTC (permalink / raw)
  To: gcc


Hi All,
       Our project is to optimize instruction scheduling in gcc by detecting
structural hazards. We are trying to understand the two instruction
scheduling passes(pass_sched and pass_sched2) and have the following doubts
regarding the same. We are currently looking at schedule_insns() method and
not selective scheduler.

1. We are expecting that pass_sched and pass_sched2, each will enter
schedule_insns() function once per pass. However, we found that it is
entering schedule_insns() function per function(in the program) per pass.
(If there are two functions in the input program, pass_sched will enter
schedule_insns() twice and pass_sched2 will also enter schedule_insns()
twice.)We are not able to track this flow in the code. Kindly help us as to
what are we missing out?

2. We are trying to visualize the code into regions and then into basic
blocks i.e., what all insns form a basic block and what basic blocks form a
region. 
   Also we are trying to figure out - the before and after scenarios - when
an insn moves from one basic block to another.
   However we are not able to map this information looking at any of the rtl
dump files. 
   Kindly help us as to what should be our approach?

3. We are trying to figure out the difference and need of 2 passes, both
calling the same function(schedule_insns()). However, we are unable to find
any difference in the two calls to schedule_insns() in two schedule
passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
out?

Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1 

Kindly help us with our issues.

Thanking You,
Dhiraj Padnani
-- 
View this message in context: http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc-tp26160582p26160582.html
Sent from the gcc - Dev mailing list archive at Nabble.com.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* help on - instruction scheduling passes in gcc
@ 2009-11-03 17:27 ddmetro
  0 siblings, 0 replies; 7+ messages in thread
From: ddmetro @ 2009-11-03 17:27 UTC (permalink / raw)
  To: gcc


Hi All,
       Our project is to optimize instruction scheduling in gcc by detecting
structural hazards. We are trying to understand the two instruction
scheduling passes(pass_sched and pass_sched2) and have the following doubts
regarding the same. We are currently looking at schedule_insns() method and
not selective scheduler.

1. We are expecting that pass_sched and pass_sched2, each will enter
schedule_insns() function once per pass. However, we found that it is
entering schedule_insns() function per function(in the program) per pass.
(If there are two functions in the input program, pass_sched will enter
schedule_insns() twice and pass_sched2 will also enter schedule_insns()
twice.)We are not able to track this flow in the code. Kindly help us as to
what are we missing out?

2. We are trying to visualize the code into regions and then into basic
blocks i.e., what all insns form a basic block and what basic blocks form a
region. 
   Also we are trying to figure out - the before and after scenarios - when
an insn moves from one basic block to another.
   However we are not able to map this information looking at any of the rtl
dump files. 
   Kindly help us as to what should be our approach?

3. We are trying to figure out the difference and need of 2 passes, both
calling the same function(schedule_insns()). However, we are unable to find
any difference in the two calls to schedule_insns() in two schedule
passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
out?

Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1 

Kindly help us with our issues.

Thanking You,
Dhiraj Padnani
-- 
View this message in context: http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc-tp26160571p26160571.html
Sent from the gcc - Dev mailing list archive at Nabble.com.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* help on - instruction scheduling passes in gcc
@ 2009-11-03 17:25 ddmetro
  0 siblings, 0 replies; 7+ messages in thread
From: ddmetro @ 2009-11-03 17:25 UTC (permalink / raw)
  To: gcc


Hi All,
       Our project is to optimize instruction scheduling in gcc by detecting
structural hazards. We are trying to understand the two instruction
scheduling passes(pass_sched and pass_sched2) and have the following doubts
regarding the same. We are currently looking at schedule_insns() method and
not selective scheduler.

1. We are expecting that pass_sched and pass_sched2, each will enter
schedule_insns() function once per pass. However, we found that it is
entering schedule_insns() function per function(in the program) per pass.
(If there are two functions in the input program, pass_sched will enter
schedule_insns() twice and pass_sched2 will also enter schedule_insns()
twice.)We are not able to track this flow in the code. Kindly help us as to
what are we missing out?

2. We are trying to visualize the code into regions and then into basic
blocks i.e., what all insns form a basic block and what basic blocks form a
region. 
   Also we are trying to figure out - the before and after scenarios - when
an insn moves from one basic block to another.
   However we are not able to map this information looking at any of the rtl
dump files. 
   Kindly help us as to what should be our approach?

3. We are trying to figure out the difference and need of 2 passes, both
calling the same function(schedule_insns()). However, we are unable to find
any difference in the two calls to schedule_insns() in two schedule
passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
out?

Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1 

Kindly help us with our issues.

Thanking You,
Dhiraj Padnani
-- 
View this message in context: http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc-tp26160568p26160568.html
Sent from the gcc - Dev mailing list archive at Nabble.com.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* help on - instruction scheduling passes in gcc
@ 2009-11-03 17:25 ddmetro
  2009-11-03 18:00 ` Ian Lance Taylor
  0 siblings, 1 reply; 7+ messages in thread
From: ddmetro @ 2009-11-03 17:25 UTC (permalink / raw)
  To: gcc


Hi All,
       Our project is to optimize instruction scheduling in gcc by detecting
structural hazards. We are trying to understand the two instruction
scheduling passes(pass_sched and pass_sched2) and have the following doubts
regarding the same. We are currently looking at schedule_insns() method and
not selective scheduler.

1. We are expecting that pass_sched and pass_sched2, each will enter
schedule_insns() function once per pass. However, we found that it is
entering schedule_insns() function per function(in the program) per pass.
(If there are two functions in the input program, pass_sched will enter
schedule_insns() twice and pass_sched2 will also enter schedule_insns()
twice.)We are not able to track this flow in the code. Kindly help us as to
what are we missing out?

2. We are trying to visualize the code into regions and then into basic
blocks i.e., what all insns form a basic block and what basic blocks form a
region. 
   Also we are trying to figure out - the before and after scenarios - when
an insn moves from one basic block to another.
   However we are not able to map this information looking at any of the rtl
dump files. 
   Kindly help us as to what should be our approach?

3. We are trying to figure out the difference and need of 2 passes, both
calling the same function(schedule_insns()). However, we are unable to find
any difference in the two calls to schedule_insns() in two schedule
passes(pass_sched and pass_sched2). Kindly help us as to what are we missing
out?

Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1 

Kindly help us with our issues.

Thanking You,
Dhiraj Padnani
-- 
View this message in context: http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc-tp26160567p26160567.html
Sent from the gcc - Dev mailing list archive at Nabble.com.

^ permalink raw reply	[flat|nested] 7+ messages in thread

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2009-11-03 17:33 help on - instruction scheduling passes in gcc ddmetro
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2009-11-03 17:33 ddmetro
2009-11-03 17:33 ddmetro
2009-11-03 17:27 ddmetro
2009-11-03 17:25 ddmetro
2009-11-03 18:00 ` Ian Lance Taylor
2009-11-03 17:25 ddmetro

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