* IRA confused about killed registers
@ 2011-09-14 8:50 Paulo J. Matos
2011-09-14 18:54 ` Vladimir Makarov
0 siblings, 1 reply; 2+ messages in thread
From: Paulo J. Matos @ 2011-09-14 8:50 UTC (permalink / raw)
To: gcc
Hi,
I am trying to fix 49801 from GCC 4.6.1.
One of the first things I noticed it that one of the BB at asmconst
looks like:
;; Start of basic block ( 2) -> 3
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u7(4){ }u8(5){ }u9(6){ }}
;; lr in 4 [AP] 5 [Y] 6 [Y] 26 27
;; lr use 4 [AP] 5 [Y] 6 [Y] 26 27
;; lr def 0 [AH] 1 [AL] 13 [CC] 14 15 16 32
;; live in 4 [AP] 5 [Y] 6 [Y] 26 27
;; live gen 1 [AL] 32
;; live kill 0 [AH] 13 [CC] 14 15 16
;; Pred edge 2 [39.0%] (fallthru)
(note 8 7 9 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn 9 8 10 3 (set:QI (reg:QI 1 AL)
(reg/v:QI 26 [ a ])) shift.c:4 4 {*movqi}
(expr_list:REG_DEAD (reg/v:QI 26 [ a ])
(nil)))
(insn 10 9 11 3 (parallel [
(set:QI (reg:QI 1 AL)
(ashift:QI (reg:QI 1 AL)
(reg/v:QI 27 [ b ])))
(clobber:QI (reg:QI 0 AH))
(clobber (reg:CC 13 CC))
]) shift.c:4 51 {*ashlqi3}
(expr_list:REG_DEAD (reg/v:QI 27 [ b ])
(expr_list:REG_DEAD (reg/f:QI 16 virtual-stack-dynamic)
(expr_list:REG_DEAD (reg/f:QI 15 virtual-stack-vars)
(expr_list:REG_DEAD (reg/f:QI 14 virtual-incoming-args)
(expr_list:REG_UNUSED (reg:QI 0 AH)
(expr_list:REG_UNUSED (reg:CC 13 CC)
(expr_list:REG_EQUAL (ashift:QI (reg/v:QI
26 [ a ])
(reg/v:QI 27 [ b ]))
(nil)))))))))
(insn 11 10 45 3 (set:QI (reg:QI 32 [ D.1925+1 ])
(reg:QI 1 AL)) shift.c:4 4 {*movqi}
(expr_list:REG_DEAD (reg:QI 1 AL)
(expr_list:REG_EQUAL (ashift:QI (reg/v:QI 26 [ a ])
(reg/v:QI 27 [ b ]))
(nil))))
(jump_insn 45 11 46 3 (set (pc)
(label_ref 21)) shift.c:4 16 {jump}
(nil)
-> 21)
;; End of basic block 3 -> ( 5)
;; lr out 4 [AP] 5 [Y] 6 [Y] 32
;; live out 4 [AP] 5 [Y] 6 [Y] 32
Then, after IRA, all the REG_DEAD notes are removed from insn 10.
;; Start of basic block ( 2) -> 3
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u-1(5){ }u-1(6){ }}
;; lr in 1 [AL] 5 [Y] 6 [Y] 7 [@H'fff8]
;; lr use 1 [AL] 5 [Y] 6 [Y] 7 [@H'fff8]
;; lr def 0 [AH] 1 [AL] 13 [CC] 14 15 16
;; live in 1 [AL] 5 [Y] 6 [Y] 7 [@H'fff8]
;; live gen 1 [AL]
;; live kill 0 [AH] 13 [CC] 14 15 16
;; Pred edge 2 [39.0%] (fallthru)
(note 8 7 10 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn 10 8 45 3 (parallel [
(set:QI (reg:QI 1 AL)
(ashift:QI (reg:QI 1 AL)
(reg/v:QI 7 @H'fff8 [orig:27 b ] [27])))
(clobber:QI (reg:QI 0 AH))
(clobber (reg:CC 13 CC))
]) shift.c:4 51 {*ashlqi3}
(expr_list:REG_EQUAL (ashift:QI (reg/v:QI 1 AL [orig:26 a ] [26])
(reg/v:QI 7 @H'fff8 [orig:27 b ] [27]))
(nil)))
(jump_insn 45 10 46 3 (set (pc)
(label_ref 21)) shift.c:4 16 {jump}
(nil)
-> 21)
;; End of basic block 3 -> ( 5)
;; lr out 1 [AL] 5 [Y] 6 [Y]
;; live out 1 [AL] 5 [Y] 6 [Y]
If though all REG_DEAD were removed from insn 10, lr def and live kill
keeps referencing to the, now, nonexistent pseudo registers 14, 15 and 16.
I haven't pinpointed yet in IRA where this is happening but I wanted to
confirm that regs 14, 15 and 16 shouldn't appear here anymore and if you
have any hint as to where the problem might be.
Cheers,
--
PMatos
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: IRA confused about killed registers
2011-09-14 8:50 IRA confused about killed registers Paulo J. Matos
@ 2011-09-14 18:54 ` Vladimir Makarov
0 siblings, 0 replies; 2+ messages in thread
From: Vladimir Makarov @ 2011-09-14 18:54 UTC (permalink / raw)
To: Paulo J. Matos; +Cc: gcc
On 09/14/2011 04:49 AM, Paulo J. Matos wrote:
> Hi,
>
> I am trying to fix 49801 from GCC 4.6.1.
> One of the first things I noticed it that one of the BB at asmconst
> looks like:
> ;; Start of basic block ( 2) -> 3
> ;; bb 3 artificial_defs: { }
> ;; bb 3 artificial_uses: { u7(4){ }u8(5){ }u9(6){ }}
> ;; lr in 4 [AP] 5 [Y] 6 [Y] 26 27
> ;; lr use 4 [AP] 5 [Y] 6 [Y] 26 27
> ;; lr def 0 [AH] 1 [AL] 13 [CC] 14 15 16 32
> ;; live in 4 [AP] 5 [Y] 6 [Y] 26 27
> ;; live gen 1 [AL] 32
> ;; live kill 0 [AH] 13 [CC] 14 15 16
>
> ;; Pred edge 2 [39.0%] (fallthru)
> (note 8 7 9 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
>
> (insn 9 8 10 3 (set:QI (reg:QI 1 AL)
> (reg/v:QI 26 [ a ])) shift.c:4 4 {*movqi}
> (expr_list:REG_DEAD (reg/v:QI 26 [ a ])
> (nil)))
>
> (insn 10 9 11 3 (parallel [
> (set:QI (reg:QI 1 AL)
> (ashift:QI (reg:QI 1 AL)
> (reg/v:QI 27 [ b ])))
> (clobber:QI (reg:QI 0 AH))
> (clobber (reg:CC 13 CC))
> ]) shift.c:4 51 {*ashlqi3}
> (expr_list:REG_DEAD (reg/v:QI 27 [ b ])
> (expr_list:REG_DEAD (reg/f:QI 16 virtual-stack-dynamic)
> (expr_list:REG_DEAD (reg/f:QI 15 virtual-stack-vars)
> (expr_list:REG_DEAD (reg/f:QI 14 virtual-incoming-args)
> (expr_list:REG_UNUSED (reg:QI 0 AH)
> (expr_list:REG_UNUSED (reg:CC 13 CC)
> (expr_list:REG_EQUAL (ashift:QI (reg/v:QI
> 26 [ a ])
> (reg/v:QI 27 [ b ]))
> (nil)))))))))
>
> (insn 11 10 45 3 (set:QI (reg:QI 32 [ D.1925+1 ])
> (reg:QI 1 AL)) shift.c:4 4 {*movqi}
> (expr_list:REG_DEAD (reg:QI 1 AL)
> (expr_list:REG_EQUAL (ashift:QI (reg/v:QI 26 [ a ])
> (reg/v:QI 27 [ b ]))
> (nil))))
>
> (jump_insn 45 11 46 3 (set (pc)
> (label_ref 21)) shift.c:4 16 {jump}
> (nil)
> -> 21)
> ;; End of basic block 3 -> ( 5)
> ;; lr out 4 [AP] 5 [Y] 6 [Y] 32
> ;; live out 4 [AP] 5 [Y] 6 [Y] 32
>
>
>
> Then, after IRA, all the REG_DEAD notes are removed from insn 10.
> ;; Start of basic block ( 2) -> 3
> ;; bb 3 artificial_defs: { }
> ;; bb 3 artificial_uses: { u-1(5){ }u-1(6){ }}
> ;; lr in 1 [AL] 5 [Y] 6 [Y] 7 [@H'fff8]
> ;; lr use 1 [AL] 5 [Y] 6 [Y] 7 [@H'fff8]
> ;; lr def 0 [AH] 1 [AL] 13 [CC] 14 15 16
> ;; live in 1 [AL] 5 [Y] 6 [Y] 7 [@H'fff8]
> ;; live gen 1 [AL]
> ;; live kill 0 [AH] 13 [CC] 14 15 16
>
> ;; Pred edge 2 [39.0%] (fallthru)
> (note 8 7 10 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
>
> (insn 10 8 45 3 (parallel [
> (set:QI (reg:QI 1 AL)
> (ashift:QI (reg:QI 1 AL)
> (reg/v:QI 7 @H'fff8 [orig:27 b ] [27])))
> (clobber:QI (reg:QI 0 AH))
> (clobber (reg:CC 13 CC))
> ]) shift.c:4 51 {*ashlqi3}
> (expr_list:REG_EQUAL (ashift:QI (reg/v:QI 1 AL [orig:26 a ] [26])
> (reg/v:QI 7 @H'fff8 [orig:27 b ] [27]))
> (nil)))
>
> (jump_insn 45 10 46 3 (set (pc)
> (label_ref 21)) shift.c:4 16 {jump}
> (nil)
> -> 21)
> ;; End of basic block 3 -> ( 5)
> ;; lr out 1 [AL] 5 [Y] 6 [Y]
> ;; live out 1 [AL] 5 [Y] 6 [Y]
>
> If though all REG_DEAD were removed from insn 10, lr def and live kill
> keeps referencing to the, now, nonexistent pseudo registers 14, 15 and
> 16.
>
> I haven't pinpointed yet in IRA where this is happening but I wanted
> to confirm that regs 14, 15 and 16 shouldn't appear here anymore and
> if you have any hint as to where the problem might be.
>
>
It should happen in DF-infrastructure after reload pass work (last
df_analyze call in ira.c::ira). It does not matter after RA that
virtual registers are present in BB live info. Presence or absence does
not affect the subsequent passes because there are only real registers
in RTL after RA.
^ permalink raw reply [flat|nested] 2+ messages in thread
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