Re: -fprofile-update=atomic vs. 32-bit architectures

[Richard Biener <richard.guenther@gmail.com>]

On Mon, Dec 5, 2022 at 8:26 AM Sebastian Huber
<sebastian.huber@embedded-brains.de> wrote:
>
> On 08/11/2022 11:25, Richard Biener wrote:
> >> It would be great to have a code example for the construction of the "if
> >> (f()) f();".
> > I think for the function above we need to emit __atomic_fetch_add_8,
> > not the emulated form because we cannot insert the required control
> > flow (if (f()) f()) on an edge.  The __atomic_fetch_add_8 should then be
> > lowered after the instrumentation took place.
>
> Would it help to change the
>
>      if (__atomic_add_fetch_4 ((unsigned int *) &val, 1, __ATOMIC_RELAXED)
> == 0)
>        __atomic_fetch_add_4 (((unsigned int *) &val) + 1, 1,
> __ATOMIC_RELAXED);
>
> into
>
>      unsigned int v = __atomic_add_fetch_4 ((unsigned int *) &val, 1,
> __ATOMIC_RELAXED)
> == 0)
>      v = (unsigned int)(v == 0);
>      __atomic_fetch_add_4 (((unsigned int *) &val) + 1, 1,
> __ATOMIC_RELAXED);

that's supposed to add 'v' instead of 1?  Possibly use uint32_t here
(aka uint32_type_node).

>
> to get rid of an inserted control flow?

That for sure wouldn't require any changes to how the profile
instrumentation works,
so yes it would be simpler.

Richard.

> On riscv this is optimized to:
>
>          li      a4,1
>          amoadd.w a5,a4,0(a0)
>          addi    a5,a5,1
>          seqz    a5,a5
>          addi    a4,a0,4
>          amoadd.w zero,a5,0(a4)
>
>
> --
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