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* How to define "implicit extend"
@ 2002-12-12 16:57 devik
  2002-12-16 11:46 ` Richard Henderson
  0 siblings, 1 reply; 3+ messages in thread
From: devik @ 2002-12-12 16:57 UTC (permalink / raw)
  To: gcc

Hello,

I'd like to ask another (maybe stupid) question.
CPU I'm defining can opearate on each 64bit register
in all modes from QI to DI. All operations in
non-DI modes clears all upper bits.
So for:
int a; short b; a=b+b;

I can do:
add.16 b,b,a

and it does zero_extend to SImode by default. Is there
way to tell GCC that all registers can be zero_extended
just by pretending they already are ?

thanks, devik

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: How to define "implicit extend"
  2002-12-12 16:57 How to define "implicit extend" devik
@ 2002-12-16 11:46 ` Richard Henderson
  2002-12-27  6:42   ` devik
  0 siblings, 1 reply; 3+ messages in thread
From: Richard Henderson @ 2002-12-16 11:46 UTC (permalink / raw)
  To: devik; +Cc: gcc

On Fri, Dec 13, 2002 at 12:40:33AM +0100, devik wrote:
> Is there way to tell GCC that all registers can be zero_extended
> just by pretending they already are ?

Kind of, but you don't want to do that -- it'll get you into
more trouble than you want.  What you want is to add patterns
such that the composition of zero_extend and the original 
operation is visible to the combiner.


r~

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: How to define "implicit extend"
  2002-12-16 11:46 ` Richard Henderson
@ 2002-12-27  6:42   ` devik
  0 siblings, 0 replies; 3+ messages in thread
From: devik @ 2002-12-27  6:42 UTC (permalink / raw)
  To: Richard Henderson; +Cc: gcc

> > Is there way to tell GCC that all registers can be zero_extended
> > just by pretending they already are ?
>
> Kind of, but you don't want to do that -- it'll get you into
> more trouble than you want.  What you want is to add patterns
> such that the composition of zero_extend and the original
> operation is visible to the combiner.

Hello Richard,

are you speaking about having almost all patterns
duplicated like:

(define_insn "*addsi2"
  [(set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI
           (plus:SI (match_operand:SI 1 "register_operand" "r")
                    (match_operand:SI 2 "register_operand" "r"))))]
  "" "add.32 %2,%1,%0")

? Hmm.. It should work even if it means at least twice of patterns.
I tried this (the same for other modes):

(define_expand "zero_extendhisi2"
 [(set (subreg:HI (match_operand:SI 0 "register_operand" "=r") 0)
        (match_operand:HI 1 "register_operand" "r"))]
 "" "")

And it seems to do the trick. Of course TRULY_NOOP_TRUNCATION must
be 0 (but it is ok for f-cpu) or it would allow thing like

uint i,j; i = (ushort)j;

to be replaced by simple 32 bit move. Do you know other scenario
where above definition of zero_extendhisi2 could do bad things ?

thanks,
devik

^ permalink raw reply	[flat|nested] 3+ messages in thread

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