From: Mark Rutland <mark.rutland@arm.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: linux-arch@vger.kernel.org, gcc@gcc.gnu.org,
catalin.marinas@arm.com, will@kernel.org, marcan@marcan.st,
maz@kernel.org, szabolcs.nagy@arm.com, f.fainelli@gmail.com,
opendmb@gmail.com, Andrew Pinski <pinskia@gmail.com>,
Ard Biesheuvel <ardb@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
x86@kernel.org, andrew.cooper3@citrix.com,
Jeremy Linton <jeremy.linton@arm.com>
Subject: Re: GCC 12 miscompilation of volatile asm (was: Re: [PATCH] arm64/io: Remind compiler that there is a memory side effect)
Date: Tue, 5 Apr 2022 14:04:45 +0100 [thread overview]
Message-ID: <Ykw+bVS9WY/JfoYO@FVFF77S0Q05N> (raw)
In-Reply-To: <Ykw7UnlTnx63z/Ca@FVFF77S0Q05N>
Sorry, I copied the wrong version of the x86_64 assembly as generated by GCC
11.2.0). Updated below.
On Tue, Apr 05, 2022 at 01:51:30PM +0100, Mark Rutland wrote:
> My x86_64 test case is:
>
> | unsigned long rdmsr(unsigned long reg)
> | {
> | unsigned int lo, hi;
> |
> | asm volatile(
> | "rdmsr"
> | : "=d" (hi), "=a" (lo)
> | : "c" (reg)
> | );
> |
> | return ((unsigned long)hi << 32) | lo;
> | }
> |
> | void wrmsr(unsigned long reg, unsigned long val)
> | {
> | unsigned int lo = val;
> | unsigned int hi = val >> 32;
> |
> | asm volatile(
> | "wrmsr"
> | :
> | : "d" (hi), "a" (lo), "c" (reg)
> | );
> | }
> |
> | void msr_rmw_set_bits(unsigned long reg, unsigned long bits)
> | {
> | unsigned long val;
> |
> | val = rdmsr(reg);
> | val |= bits;
> | wrmsr(reg, val);
> | }
> |
> | void func_with_msr_side_effects(unsigned long reg)
> | {
> | msr_rmw_set_bits(reg, 1UL << 0);
> | msr_rmw_set_bits(reg, 1UL << 1);
> | msr_rmw_set_bits(reg, 1UL << 2);
> | msr_rmw_set_bits(reg, 1UL << 3);
> | }
>
> Per compiler explorer (https://godbolt.org/z/cveff9hq5) GCC trunk currently
> compiles this as:
>
> | msr_rmw_set_bits:
> | mov rcx, rdi
> | rdmsr
> | sal rdx, 32
> | mov eax, eax
> | or rax, rsi
> | or rax, rdx
> | mov rdx, rax
> | shr rdx, 32
> | wrmsr
> | ret
> | func_with_msr_side_effects:
> | ret
>
GCC 11.2 compiles that as:
| rdmsr:
| mov rcx, rdi
| rdmsr
| sal rdx, 32
| mov eax, eax
| or rax, rdx
| ret
| wrmsr:
| mov rax, rsi
| mov rdx, rsi
| shr rdx, 32
| mov rcx, rdi
| wrmsr
| ret
| msr_rmw_set_bits:
| mov rcx, rdi
| rdmsr
| sal rdx, 32
| mov eax, eax
| or rax, rsi
| or rax, rdx
| mov rdx, rax
| shr rdx, 32
| wrmsr
| ret
| func_with_msr_side_effects:
| push rbx
| mov rbx, rdi
| mov esi, 1
| call msr_rmw_set_bits
| mov esi, 2
| mov rdi, rbx
| call msr_rmw_set_bits
| mov esi, 4
| mov rdi, rbx
| call msr_rmw_set_bits
| mov esi, 8
| mov rdi, rbx
| call msr_rmw_set_bits
| pop rbx
| ret
Thanks,
Mark.
next prev parent reply other threads:[~2022-04-05 13:04 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-01 16:44 [PATCH] arm64/io: Remind compiler that there is a memory side effect Jeremy Linton
2022-04-01 17:22 ` Mark Rutland
2022-04-03 7:36 ` Andrew Pinski
2022-04-03 7:47 ` Ard Biesheuvel
2022-04-03 7:47 ` Ard Biesheuvel
2022-04-04 9:14 ` Will Deacon
2022-04-03 17:40 ` Doug Berger
2022-04-05 12:51 ` GCC 12 miscompilation of volatile asm (was: Re: [PATCH] arm64/io: Remind compiler that there is a memory side effect) Mark Rutland
2022-04-05 13:04 ` Mark Rutland [this message]
2022-04-05 13:20 ` Andrew Cooper
2022-04-05 14:05 ` Peter Zijlstra
2022-04-11 10:22 ` Mark Rutland
2022-04-11 10:31 ` Mark Rutland
2022-04-11 19:02 ` Jeremy Linton
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