How to add a custom instruction to the RISC-V GCC tools?

How to add a custom instruction to the RISC-V GCC tools?

[hameeza ahmed]

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Hello,
I want to add an intrinsic in gcc toolchain that will generate the assembly
instruction. As it is said I need
to add a pattern to the gcc/config/riscv/riscv.md file to describe the
instruction. Can you please help me. Are there any tutorial that you can
recommend for this?

Re: How to add a custom instruction to the RISC-V GCC tools?

[Jeff Law]

On 2/5/24 20:57, hameeza ahmed via Gcc wrote:
> Hello,
> I want to add an intrinsic in gcc toolchain that will generate the assembly
> instruction. As it is said I need
> to add a pattern to the gcc/config/riscv/riscv.md file to describe the
> instruction. Can you please help me. Are there any tutorial that you can
> recommend for this?
The process of adding target specific intrinsics is fairly target 
specific.  There isn't any guide that I'm aware of; your best bet is 
going to be to find an existing intrinsic that roughly matches yours and 
copy how that intrinsic works.

The good news is intrinsics don't have to expose full semantics of the 
underlying instrution -- you can get away with just referencing any 
values read and values written, but not the semantics of the operation. 
Meaning that when you look for an intrinsic to copy-n-paste, you're 
mostly concerned about the number and types of arguments.

Having said that, there is a GCC internals manual which describes the 
RTL language, the format of backend patterns, expanders, etc.  While the 
vast majority will not be relevant to your effort, it is likely worth 
bookmarking it for future reference.

jeff