* Variable Length Execution Set?
@ 2009-05-27 15:30 Mohamed Shafi
2009-05-27 16:30 ` Ian Lance Taylor
0 siblings, 1 reply; 4+ messages in thread
From: Mohamed Shafi @ 2009-05-27 15:30 UTC (permalink / raw)
To: GCC
Hi all,
Does GCC support architectures that has Variable Length Execution Set (VLES)?
Are there any developments happening in this direction?
Regards,
Shafi
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Variable Length Execution Set?
2009-05-27 15:30 Variable Length Execution Set? Mohamed Shafi
@ 2009-05-27 16:30 ` Ian Lance Taylor
2009-05-27 17:12 ` Mohamed Shafi
0 siblings, 1 reply; 4+ messages in thread
From: Ian Lance Taylor @ 2009-05-27 16:30 UTC (permalink / raw)
To: Mohamed Shafi; +Cc: GCC
Mohamed Shafi <shafitvm@gmail.com> writes:
> Does GCC support architectures that has Variable Length Execution Set (VLES)?
> Are there any developments happening in this direction?
gcc supports many instruction sets whose instructions are not all the
same size, including x86. In particular, gcc supports ia64, which uses
bundling. If you mean something else, I think you need to give more
details.
Ian
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Variable Length Execution Set?
2009-05-27 16:30 ` Ian Lance Taylor
@ 2009-05-27 17:12 ` Mohamed Shafi
2009-05-27 17:16 ` Ian Lance Taylor
0 siblings, 1 reply; 4+ messages in thread
From: Mohamed Shafi @ 2009-05-27 17:12 UTC (permalink / raw)
To: Ian Lance Taylor; +Cc: GCC
2009/5/27 Ian Lance Taylor <iant@google.com>:
> Mohamed Shafi <shafitvm@gmail.com> writes:
>
>> Does GCC support architectures that has Variable Length Execution Set (VLES)?
>> Are there any developments happening in this direction?
>
> gcc supports many instruction sets whose instructions are not all the
> same size, including x86. In particular, gcc supports ia64, which uses
> bundling. If you mean something else, I think you need to give more
> details.
I know that GCC supports VLIW. VLES is similar to VLIW, except that in
a packet i can have variable number of instruction. ie. each packet
should contain at least one instruction with a max of 6 instructions
in a packet.
Shafi
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Variable Length Execution Set?
2009-05-27 17:12 ` Mohamed Shafi
@ 2009-05-27 17:16 ` Ian Lance Taylor
0 siblings, 0 replies; 4+ messages in thread
From: Ian Lance Taylor @ 2009-05-27 17:16 UTC (permalink / raw)
To: Mohamed Shafi; +Cc: GCC
Mohamed Shafi <shafitvm@gmail.com> writes:
> 2009/5/27 Ian Lance Taylor <iant@google.com>:
>> Mohamed Shafi <shafitvm@gmail.com> writes:
>>
>>> Does GCC support architectures that has Variable Length Execution Set (VLES)?
>>> Are there any developments happening in this direction?
>>
>> gcc supports many instruction sets whose instructions are not all the
>> same size, including x86. In particular, gcc supports ia64, which uses
>> bundling. If you mean something else, I think you need to give more
>> details.
>
> I know that GCC supports VLIW. VLES is similar to VLIW, except that in
> a packet i can have variable number of instruction. ie. each packet
> should contain at least one instruction with a max of 6 instructions
> in a packet.
Sounds like ia64 to me.
Ian
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2009-05-27 15:19 UTC | newest]
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2009-05-27 15:30 Variable Length Execution Set? Mohamed Shafi
2009-05-27 16:30 ` Ian Lance Taylor
2009-05-27 17:12 ` Mohamed Shafi
2009-05-27 17:16 ` Ian Lance Taylor
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