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From: Christophe Lyon <clyon@sourceware.org> To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/arm: Introduce arm_cache_init Date: Wed, 27 Apr 2022 14:51:27 +0000 (GMT) [thread overview] Message-ID: <20220427145127.35E183857C4D@sourceware.org> (raw) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=0824193fd31467b6ff39132d0d72aaa9c01cc9aa commit 0824193fd31467b6ff39132d0d72aaa9c01cc9aa Author: Christophe Lyon <christophe.lyon@arm.com> Date: Fri Apr 1 10:22:12 2022 +0100 gdb/arm: Introduce arm_cache_init This patch is a preparation for the rest of the series and adds two arm_cache_init helper functions. It updates every place that updates cache->saved_regs to call the helper instead. Signed-off-by: Torbjörn Svensson <torbjorn.svensson@st.com> Signed-off-by: Christophe Lyon <christophe.lyon@foss.st.com> Signed-off-by: Christophe Lyon <christophe.lyon@arm.com> Diff: --- gdb/arm-tdep.c | 33 +++++++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 6b4b00993fa..f393a3e4ad6 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -292,8 +292,29 @@ struct arm_prologue_cache /* Saved register offsets. */ trad_frame_saved_reg *saved_regs; + + arm_prologue_cache() = default; }; +/* Initialize CACHE fields for which zero is not adequate (CACHE is + expected to have been ZALLOC'ed before calling this function). */ + +static void +arm_cache_init (struct arm_prologue_cache *cache, struct gdbarch *gdbarch) +{ + cache->saved_regs = trad_frame_alloc_saved_regs (gdbarch); +} + +/* Similar to the previous function, but extracts GDBARCH from FRAME. */ + +static void +arm_cache_init (struct arm_prologue_cache *cache, struct frame_info *frame) +{ + struct gdbarch *gdbarch = get_frame_arch (frame); + + arm_cache_init (cache, gdbarch); +} + namespace { /* Abstract class to read ARM instructions from memory. */ @@ -1981,7 +2002,7 @@ arm_make_prologue_cache (struct frame_info *this_frame) CORE_ADDR unwound_fp; cache = FRAME_OBSTACK_ZALLOC (struct arm_prologue_cache); - cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); + arm_cache_init (cache, this_frame); arm_scan_prologue (this_frame, cache); @@ -2454,7 +2475,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) struct arm_prologue_cache *cache; cache = FRAME_OBSTACK_ZALLOC (struct arm_prologue_cache); - cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); + arm_cache_init (cache, this_frame); for (;;) { @@ -2848,7 +2869,7 @@ arm_make_epilogue_frame_cache (struct frame_info *this_frame) int reg; cache = FRAME_OBSTACK_ZALLOC (struct arm_prologue_cache); - cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); + arm_cache_init (cache, this_frame); /* Still rely on the offset calculated from prologue. */ arm_scan_prologue (this_frame, cache); @@ -3009,7 +3030,7 @@ arm_make_stub_cache (struct frame_info *this_frame) struct arm_prologue_cache *cache; cache = FRAME_OBSTACK_ZALLOC (struct arm_prologue_cache); - cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); + arm_cache_init (cache, this_frame); cache->prev_sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); @@ -3087,7 +3108,7 @@ arm_m_exception_cache (struct frame_info *this_frame) uint32_t secure_stack_used; cache = FRAME_OBSTACK_ZALLOC (struct arm_prologue_cache); - cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); + arm_cache_init (cache, this_frame); /* ARMv7-M Architecture Reference "B1.5.6 Exception entry behavior" describes which bits in LR that define which stack was used prior @@ -13851,7 +13872,7 @@ arm_analyze_prologue_test () test_arm_instruction_reader mem_reader (insns); arm_prologue_cache cache; - cache.saved_regs = trad_frame_alloc_saved_regs (gdbarch); + arm_cache_init (&cache, gdbarch); arm_analyze_prologue (gdbarch, 0, sizeof (insns) - 1, &cache, mem_reader); }
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