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* [binutils-gdb] sim: build: hoist lists of common objects up
@ 2022-12-22 3:23 Michael Frysinger
0 siblings, 0 replies; only message in thread
From: Michael Frysinger @ 2022-12-22 3:23 UTC (permalink / raw)
To: gdb-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=d47ea1b9c1fb6d57271697f186f7141ef4aa41c4
commit d47ea1b9c1fb6d57271697f186f7141ef4aa41c4
Author: Mike Frysinger <vapier@gentoo.org>
Date: Sun Nov 6 21:24:24 2022 +0700
sim: build: hoist lists of common objects up
In order to create libsim.a in the common dir, we need the list of
objects for each target. To avoid duplicating the list with the
recursive make in each port, pass it down as a variable. This is
a temporary hack until the top-level creates libsim.a for ports.
Diff:
---
sim/Makefile.in | 194 ++++++++++++++++++++++++++--------------------
sim/arch-subdir.mk.in | 3 +-
sim/common/Make-common.in | 47 +----------
sim/common/local.mk | 54 +++++++++++++
4 files changed, 167 insertions(+), 131 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index fd5faaf80cd..e465a6c4fdb 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -127,87 +127,92 @@ EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
@ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \
@ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h
-@SIM_ENABLE_IGEN_TRUE@am__append_2 = $(IGEN)
-@SIM_ENABLE_IGEN_TRUE@am__append_3 = igen/libigen.a
-@SIM_ENABLE_IGEN_TRUE@am__append_4 = $(igen_IGEN_TOOLS)
-@SIM_ENABLE_IGEN_TRUE@am__append_5 = $(igen_IGEN_TOOLS)
+@SIM_ENABLE_HW_TRUE@am__append_2 = \
+@SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \
+@SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER)
+
+@SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
+@SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
+@SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
+@SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
+@SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
TESTS = testsuite/common/bits32m0$(EXEEXT) \
testsuite/common/bits32m31$(EXEEXT) \
testsuite/common/bits64m0$(EXEEXT) \
testsuite/common/bits64m63$(EXEEXT) \
testsuite/common/alu-tst$(EXEEXT)
-@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_6 = aarch64/run
-@SIM_ENABLE_ARCH_arm_TRUE@am__append_7 = arm/run
-@SIM_ENABLE_ARCH_avr_TRUE@am__append_8 = avr/run
-@SIM_ENABLE_ARCH_bfin_TRUE@am__append_9 = bfin/run
-@SIM_ENABLE_ARCH_bpf_TRUE@am__append_10 = bpf/run
-@SIM_ENABLE_ARCH_bpf_TRUE@am__append_11 = $(bpf_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = $(bpf_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_13 = cr16/run
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_14 = $(cr16_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/gencode
+@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/run
+@SIM_ENABLE_ARCH_arm_TRUE@am__append_9 = arm/run
+@SIM_ENABLE_ARCH_avr_TRUE@am__append_10 = avr/run
+@SIM_ENABLE_ARCH_bfin_TRUE@am__append_11 = bfin/run
+@SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = bpf/run
+@SIM_ENABLE_ARCH_bpf_TRUE@am__append_13 = $(bpf_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_bpf_TRUE@am__append_14 = $(bpf_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/run
@SIM_ENABLE_ARCH_cr16_TRUE@am__append_16 = $(cr16_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_17 = cris/run
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_18 = cris/rvdummy
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_19 = $(cris_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = $(cris_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_21 = d10v/run
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_22 = $(d10v_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_23 = d10v/gencode
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_17 = cr16/gencode
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = $(cr16_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_19 = cris/run
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = cris/rvdummy
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_21 = $(cris_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_22 = $(cris_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_23 = d10v/run
@SIM_ENABLE_ARCH_d10v_TRUE@am__append_24 = $(d10v_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_25 = erc32/run erc32/sis
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_26 = sim-%D-install-exec-local
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_27 = sim-erc32-uninstall-local
-@SIM_ENABLE_ARCH_examples_TRUE@am__append_28 = example-synacor/run
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_29 = frv/run
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_30 = $(frv_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_31 = $(frv_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ft32_TRUE@am__append_32 = ft32/run
-@SIM_ENABLE_ARCH_h8300_TRUE@am__append_33 = h8300/run
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_34 = iq2000/run
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_35 = $(iq2000_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_36 = $(iq2000_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_37 = lm32/run
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_38 = $(lm32_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_39 = $(lm32_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_40 = m32c/run
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_41 = $(m32c_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_42 = m32c/opc2c
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_43 = \
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_25 = d10v/gencode
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = $(d10v_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_27 = erc32/run erc32/sis
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_28 = sim-%D-install-exec-local
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_29 = sim-erc32-uninstall-local
+@SIM_ENABLE_ARCH_examples_TRUE@am__append_30 = example-synacor/run
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_31 = frv/run
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_32 = $(frv_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_33 = $(frv_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ft32_TRUE@am__append_34 = ft32/run
+@SIM_ENABLE_ARCH_h8300_TRUE@am__append_35 = h8300/run
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_36 = iq2000/run
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_37 = $(iq2000_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_38 = $(iq2000_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_39 = lm32/run
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_40 = $(lm32_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_41 = $(lm32_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_42 = m32c/run
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_43 = $(m32c_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_44 = m32c/opc2c
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_45 = \
@SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_44 = m32r/run
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_45 = $(m32r_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_46 = $(m32r_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_47 = m68hc11/run
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_48 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_49 = m68hc11/gencode
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_46 = m32r/run
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_47 = $(m32r_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_48 = $(m32r_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_49 = m68hc11/run
@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_50 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mcore_TRUE@am__append_51 = mcore/run
-@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_52 = microblaze/run
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_53 = mips/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_54 = mn10300/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_55 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_56 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_57 = moxie/run
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_58 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_59 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_60 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_61 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_62 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_63 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_64 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_65 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_66 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_67 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_68 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_69 = sh/gencode
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_51 = m68hc11/gencode
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_52 = $(m68hc11_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mcore_TRUE@am__append_53 = mcore/run
+@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_54 = microblaze/run
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_55 = mips/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_56 = mn10300/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_57 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_58 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_59 = moxie/run
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_60 = msp430/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_61 = or1k/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_62 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_63 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_64 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_65 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_66 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_67 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_68 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_69 = sh/run
@SIM_ENABLE_ARCH_sh_TRUE@am__append_70 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_71 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_72 = $(v850_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_73 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_71 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_72 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_73 = v850/run
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_74 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_75 = $(v850_BUILD_OUTPUTS)
subdir = .
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -1170,20 +1175,21 @@ GNULIB_PARENT_DIR = ..
srccom = $(srcdir)/common
srcroot = $(srcdir)/..
SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
-AM_MAKEFLAGS =
+AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
+ $(am__append_3)
pkginclude_HEADERS = $(am__append_1)
-noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_3)
+noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_5)
CLEANFILES = common/version.c common/version.c-stamp \
testsuite/common/bits-gen testsuite/common/bits32m0.c \
testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
testsuite/common/bits64m63.c
DISTCLEANFILES =
-MOSTLYCLEANFILES = core $(am__append_5) site-sim-config.exp \
- testrun.log testrun.sum $(am__append_12) $(am__append_16) \
- $(am__append_20) $(am__append_24) $(am__append_31) \
- $(am__append_36) $(am__append_39) $(am__append_43) \
- $(am__append_46) $(am__append_50) $(am__append_56) \
- $(am__append_61) $(am__append_70) $(am__append_73)
+MOSTLYCLEANFILES = core $(am__append_7) site-sim-config.exp \
+ testrun.log testrun.sum $(am__append_14) $(am__append_18) \
+ $(am__append_22) $(am__append_26) $(am__append_33) \
+ $(am__append_38) $(am__append_41) $(am__append_45) \
+ $(am__append_48) $(am__append_52) $(am__append_58) \
+ $(am__append_63) $(am__append_72) $(am__append_75)
AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
@@ -1192,15 +1198,15 @@ AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
$(SIM_INLINE) -I$(srcdir)/common
COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
-SIM_ALL_RECURSIVE_DEPS = common/libcommon.a $(am__append_2) \
- $(am__append_11) $(am__append_14) $(am__append_19) \
- $(am__append_22) $(am__append_30) $(am__append_35) \
- $(am__append_38) $(am__append_41) $(am__append_45) \
- $(am__append_48) $(am__append_55) $(am__append_60) \
- $(am__append_68) $(am__append_72)
+SIM_ALL_RECURSIVE_DEPS = common/libcommon.a $(am__append_4) \
+ $(am__append_13) $(am__append_16) $(am__append_21) \
+ $(am__append_24) $(am__append_32) $(am__append_37) \
+ $(am__append_40) $(am__append_43) $(am__append_47) \
+ $(am__append_50) $(am__append_57) $(am__append_62) \
+ $(am__append_70) $(am__append_74)
SIM_INSTALL_DATA_LOCAL_DEPS =
-SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_26)
-SIM_UNINSTALL_LOCAL_DEPS = $(am__append_27)
+SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_28)
+SIM_UNINSTALL_LOCAL_DEPS = $(am__append_29)
SIM_COMMON_LIB = common/libcommon.a
common_libcommon_a_SOURCES = \
common/callback.c \
@@ -1213,6 +1219,26 @@ common_libcommon_a_SOURCES = \
common/target-newlib-syscall.c \
common/version.c
+SIM_COMMON_HW_OBJS = \
+ hw-alloc.o \
+ hw-base.o \
+ hw-device.o \
+ hw-events.o \
+ hw-handles.o \
+ hw-instances.o \
+ hw-ports.o \
+ hw-properties.o \
+ hw-tree.o \
+ sim-hw.o
+
+SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
+ sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
+ sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
+ sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
+ sim-options.o sim-profile.o sim-reason.o sim-reg.o \
+ sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
+ sim-watch.o $(am__append_2)
+SIM_HW_DEVICES = cfi core pal glue
LIBIBERTY_LIB = ../libiberty/libiberty.a
BFD_LIB = ../bfd/libbfd.la
OPCODES_LIB = ../opcodes/libopcodes.la
diff --git a/sim/arch-subdir.mk.in b/sim/arch-subdir.mk.in
index 251a9b684d9..cfde3f3fb78 100644
--- a/sim/arch-subdir.mk.in
+++ b/sim/arch-subdir.mk.in
@@ -71,6 +71,5 @@ CGENDIR = @cgendir@
SIM_INLINE = @SIM_INLINE@
SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
-SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
-SIM_HW_OBJS = $(SIM_COMMON_HW_OBJS) $(SIM_HW_DEVICES:%=dv-%.o) $(SIM_HW_SOCKSER)
+SIM_HW_OBJS = $(SIM_HW_DEVICES:%=dv-%.o)
@SIM_ENABLE_HW_FALSE@SIM_HW_OBJS =
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index 8e27795438a..684d7d847ab 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -114,50 +114,6 @@ SIM_EXTRA_DISTCLEAN =
# here. Some files are used by all simulators (e.g. callback.o).
# Those files are specified in LIB_OBJS below.
-SIM_COMMON_HW_OBJS = \
- hw-alloc.o \
- hw-base.o \
- hw-device.o \
- hw-events.o \
- hw-handles.o \
- hw-instances.o \
- hw-ports.o \
- hw-properties.o \
- hw-tree.o \
- sim-hw.o \
-
-SIM_NEW_COMMON_OBJS = \
- sim-arange.o \
- sim-bits.o \
- sim-close.o \
- sim-command.o \
- sim-config.o \
- sim-core.o \
- sim-cpu.o \
- sim-endian.o \
- sim-engine.o \
- sim-events.o \
- sim-fpu.o \
- sim-hload.o \
- sim-hrw.o \
- sim-io.o \
- sim-info.o \
- sim-memopt.o \
- sim-model.o \
- sim-module.o \
- sim-options.o \
- sim-profile.o \
- sim-reason.o \
- sim-reg.o \
- sim-signal.o \
- sim-stop.o \
- sim-syscall.o \
- sim-trace.o \
- sim-utils.o \
- sim-watch.o \
- \
- $(SIM_HW_OBJS) \
-
## End COMMON_PRE_CONFIG_FRAG
## COMMON_POST_CONFIG_FRAG
@@ -180,7 +136,8 @@ BUILD_CFLAGS = $(CFLAGS_FOR_BUILD) $(CSEARCH)
COMMON_DEP_CFLAGS = $(CONFIG_CFLAGS) $(CSEARCH) $(SIM_EXTRA_CFLAGS)
-SIM_HW_DEVICES = cfi core pal glue $(SIM_EXTRA_HW_DEVICES)
+SIM_HW_DEVICES = $(SIM_HW_DEVICES_) $(SIM_EXTRA_HW_DEVICES)
+SIM_NEW_COMMON_OBJS = $(SIM_NEW_COMMON_OBJS_) $(SIM_HW_OBJS)
LIBIBERTY_LIB = ../../libiberty/libiberty.a
BFD_LIB = ../../bfd/libbfd.la
diff --git a/sim/common/local.mk b/sim/common/local.mk
index c45af29d8c7..bf9b97d04d7 100644
--- a/sim/common/local.mk
+++ b/sim/common/local.mk
@@ -56,6 +56,60 @@ CLEANFILES += \
## For subdirs.
##
+SIM_COMMON_HW_OBJS = \
+ hw-alloc.o \
+ hw-base.o \
+ hw-device.o \
+ hw-events.o \
+ hw-handles.o \
+ hw-instances.o \
+ hw-ports.o \
+ hw-properties.o \
+ hw-tree.o \
+ sim-hw.o
+
+SIM_NEW_COMMON_OBJS = \
+ sim-arange.o \
+ sim-bits.o \
+ sim-close.o \
+ sim-command.o \
+ sim-config.o \
+ sim-core.o \
+ sim-cpu.o \
+ sim-endian.o \
+ sim-engine.o \
+ sim-events.o \
+ sim-fpu.o \
+ sim-hload.o \
+ sim-hrw.o \
+ sim-io.o \
+ sim-info.o \
+ sim-memopt.o \
+ sim-model.o \
+ sim-module.o \
+ sim-options.o \
+ sim-profile.o \
+ sim-reason.o \
+ sim-reg.o \
+ sim-signal.o \
+ sim-stop.o \
+ sim-syscall.o \
+ sim-trace.o \
+ sim-utils.o \
+ sim-watch.o
+
+AM_MAKEFLAGS += SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)"
+
+SIM_HW_DEVICES = cfi core pal glue
+
+if SIM_ENABLE_HW
+SIM_NEW_COMMON_OBJS += \
+ $(SIM_COMMON_HW_OBJS) \
+ $(SIM_HW_SOCKSER)
+
+AM_MAKEFLAGS += SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
+endif
+
LIBIBERTY_LIB = ../libiberty/libiberty.a
BFD_LIB = ../bfd/libbfd.la
OPCODES_LIB = ../opcodes/libopcodes.la
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