[binutils-gdb] sim: example-synacor: move arch-specific settings to internal header

[binutils-gdb] sim: example-synacor: move arch-specific settings to internal header

[Michael Frysinger]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=ca6fd350844c81c64cd145e50823bc806d446935

commit ca6fd350844c81c64cd145e50823bc806d446935
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Thu Dec 22 23:15:39 2022 -0500

    sim: example-synacor: move arch-specific settings to internal header
    
    There's no need for these settings to be in sim-main.h which is shared
    with common/ sim code, so move it all out to a new header which only
    this port will include.

Diff:
---
 sim/example-synacor/example-synacor-sim.h | 38 +++++++++++++++++++++++++++++++
 sim/example-synacor/interp.c              |  2 ++
 sim/example-synacor/sim-main.c            |  2 ++
 sim/example-synacor/sim-main.h            | 14 ------------
 4 files changed, 42 insertions(+), 14 deletions(-)

diff --git a/sim/example-synacor/example-synacor-sim.h b/sim/example-synacor/example-synacor-sim.h
new file mode 100644
index 00000000000..55701a7f0d5
--- /dev/null
+++ b/sim/example-synacor/example-synacor-sim.h
@@ -0,0 +1,38 @@
+/* Example synacor simulator.
+
+   Copyright (C) 2005-2022 Free Software Foundation, Inc.
+   Contributed by Mike Frysinger.
+
+   This file is part of the GNU simulators.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef EXAMPLE_SYNACOR_SIM_H
+#define EXAMPLE_SYNACOR_SIM_H
+
+struct example_sim_cpu {
+  uint16_t regs[8];
+  sim_cia pc;
+
+  /* This isn't a real register, and the stack is not directly addressable,
+     so use memory outside of the 16-bit address space.  */
+  uint32_t sp;
+};
+
+#define EXAMPLE_SIM_CPU(cpu) ((struct example_sim_cpu *) CPU_ARCH_DATA (cpu))
+
+extern void step_once (SIM_CPU *);
+extern void initialize_cpu (SIM_DESC, SIM_CPU *);
+
+#endif
diff --git a/sim/example-synacor/interp.c b/sim/example-synacor/interp.c
index cbde166c9b3..20ae057d43a 100644
--- a/sim/example-synacor/interp.c
+++ b/sim/example-synacor/interp.c
@@ -31,6 +31,8 @@
 #include "sim/callback.h"
 #include "sim-main.h"
 #include "sim-options.h"
+
+#include "example-synacor-sim.h"
 \f
 /* This function is the main loop.  It should process ticks and decode+execute
    a single instruction.
diff --git a/sim/example-synacor/sim-main.c b/sim/example-synacor/sim-main.c
index 0757d6925c8..2971c7ffd22 100644
--- a/sim/example-synacor/sim-main.c
+++ b/sim/example-synacor/sim-main.c
@@ -26,6 +26,8 @@
 
 #include "sim-main.h"
 #include "sim-signal.h"
+
+#include "example-synacor-sim.h"
 \f
 /* Get the register number from the number.  */
 static uint16_t
diff --git a/sim/example-synacor/sim-main.h b/sim/example-synacor/sim-main.h
index 258d61879cc..ffd695ea226 100644
--- a/sim/example-synacor/sim-main.h
+++ b/sim/example-synacor/sim-main.h
@@ -24,18 +24,4 @@
 #include "sim-basics.h"
 #include "sim-base.h"
 
-struct example_sim_cpu {
-  uint16_t regs[8];
-  sim_cia pc;
-
-  /* This isn't a real register, and the stack is not directly addressable,
-     so use memory outside of the 16-bit address space.  */
-  uint32_t sp;
-};
-
-#define EXAMPLE_SIM_CPU(cpu) ((struct example_sim_cpu *) CPU_ARCH_DATA (cpu))
-
-extern void step_once (SIM_CPU *);
-extern void initialize_cpu (SIM_DESC, SIM_CPU *);
-
 #endif