public inbox for gdb-cvs@sourceware.org
help / color / mirror / Atom feed
* [binutils-gdb] sim: mips: hoist "multi" igen rules up to common builds
@ 2022-12-27 5:39 Michael Frysinger
0 siblings, 0 replies; only message in thread
From: Michael Frysinger @ 2022-12-27 5:39 UTC (permalink / raw)
To: gdb-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f12c3c632eb72022b70098b3c972735558199d41
commit f12c3c632eb72022b70098b3c972735558199d41
Author: Mike Frysinger <vapier@gentoo.org>
Date: Sun Dec 25 03:13:24 2022 -0500
sim: mips: hoist "multi" igen rules up to common builds
Since these are the last mips igen rules, we can clean up a number of
bits in the local Makefile.in.
Diff:
---
sim/Makefile.in | 156 +++++++++++++++++++++++++++++++++++++++++---------
sim/configure | 18 +++++-
sim/mips/Makefile.in | 124 ---------------------------------------
sim/mips/acinclude.m4 | 1 +
sim/mips/local.mk | 102 +++++++++++++++++++++++++++++++++
5 files changed, 248 insertions(+), 153 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 947814ed909..65085cada9c 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -209,30 +209,35 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_64 = $(mips_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_64 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
+
@SIM_ENABLE_ARCH_mips_TRUE@am__append_65 = $(mips_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_66 = mips/multi-include.h mips/multi-run.c
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_67 = mn10300/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_68 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_69 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_66 = $(mips_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_67 = mips/multi-include.h mips/multi-run.c
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_68 = mn10300/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_69 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_70 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_71 = moxie/run
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_72 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_73 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_74 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_71 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_72 = moxie/run
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_73 = msp430/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_74 = or1k/run
@SIM_ENABLE_ARCH_or1k_TRUE@am__append_75 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_76 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_77 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_78 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_79 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_80 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_81 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_82 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_83 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_84 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_85 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_86 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_76 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_77 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_78 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_79 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_80 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_81 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_82 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_83 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_84 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_85 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_86 = v850/run
@SIM_ENABLE_ARCH_v850_TRUE@am__append_87 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_88 = $(v850_BUILD_OUTPUTS)
subdir = .
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -1211,22 +1216,22 @@ SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
$(am__append_3) $(am__append_12) $(am__append_21) \
$(am__append_42) $(am__append_50) $(am__append_54) \
- $(am__append_61) $(am__append_68)
+ $(am__append_61) $(am__append_69)
pkginclude_HEADERS = $(am__append_1)
noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_5)
CLEANFILES = common/version.c common/version.c-stamp \
testsuite/common/bits-gen testsuite/common/bits32m0.c \
testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
testsuite/common/bits64m63.c
-DISTCLEANFILES = $(am__append_66)
+DISTCLEANFILES = $(am__append_67)
MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
%,%/stamp-hw,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
site-sim-config.exp testrun.log testrun.sum $(am__append_15) \
$(am__append_19) $(am__append_24) $(am__append_28) \
$(am__append_35) $(am__append_40) $(am__append_44) \
$(am__append_48) $(am__append_52) $(am__append_57) \
- $(am__append_65) $(am__append_70) $(am__append_75) \
- $(am__append_84) $(am__append_87)
+ $(am__append_66) $(am__append_71) $(am__append_76) \
+ $(am__append_85) $(am__append_88)
AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
@@ -1240,8 +1245,8 @@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
$(am__append_17) $(am__append_23) $(am__append_26) \
$(am__append_34) $(am__append_39) $(am__append_43) \
$(am__append_46) $(am__append_51) $(am__append_55) \
- $(am__append_64) $(am__append_69) $(am__append_74) \
- $(am__append_82) $(am__append_86)
+ $(am__append_65) $(am__append_70) $(am__append_75) \
+ $(am__append_83) $(am__append_87)
SIM_INSTALL_DATA_LOCAL_DEPS =
SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_30)
SIM_UNINSTALL_LOCAL_DEPS = $(am__append_31)
@@ -1642,7 +1647,8 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
@SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_62) $(am__append_63)
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_62) $(am__append_63) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_64)
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
@@ -1662,6 +1668,8 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
@SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
+@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
+@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
@@ -3590,6 +3598,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
+@SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
@@ -3690,6 +3699,99 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c
@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
+@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
+@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
+@SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
+@SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \
+@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
+@SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \
+@SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \
+@SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
+@SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
+@SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
+@SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
+@SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
+@SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
+@SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
+@SIM_ENABLE_ARCH_mips_TRUE@ *) \
+@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
+@SIM_ENABLE_ARCH_mips_TRUE@ esac; \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $${e} \
+@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
+@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
+@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
+@SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \
+@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
+@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
+@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
+@SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \
+@SIM_ENABLE_ARCH_mips_TRUE@ -x \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \
+@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \
+@SIM_ENABLE_ARCH_mips_TRUE@ || exit; \
+@SIM_ENABLE_ARCH_mips_TRUE@ done
+@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
+
+@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
+@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
+@SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
+@SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \
+@SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
+@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \
+@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
+@SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
+@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
+@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
+@SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \
+@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
+@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
+@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \
+@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
+@SIM_ENABLE_ARCH_mips_TRUE@ esac \
+@SIM_ENABLE_ARCH_mips_TRUE@ done
+@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
+
@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
diff --git a/sim/configure b/sim/configure
index ef6cc0a6311..c31ff71c805 100755
--- a/sim/configure
+++ b/sim/configure
@@ -641,6 +641,8 @@ LTLIBOBJS
include_makefile
SIM_RX_CYCLE_ACCURATE_FLAGS
SIM_RISCV_BITSIZE
+SIM_MIPS_GEN_MODE_MULTI_FALSE
+SIM_MIPS_GEN_MODE_MULTI_TRUE
SIM_MIPS_GEN_MODE_M16_FALSE
SIM_MIPS_GEN_MODE_M16_TRUE
SIM_MIPS_GEN_MODE_SINGLE_FALSE
@@ -12448,7 +12450,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 12451 "configure"
+#line 12453 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -12554,7 +12556,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 12557 "configure"
+#line 12559 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -16636,6 +16638,14 @@ else
SIM_MIPS_GEN_MODE_M16_FALSE=
fi
+ if test "$SIM_MIPS_GEN" = "MULTI"; then
+ SIM_MIPS_GEN_MODE_MULTI_TRUE=
+ SIM_MIPS_GEN_MODE_MULTI_FALSE='#'
+else
+ SIM_MIPS_GEN_MODE_MULTI_TRUE='#'
+ SIM_MIPS_GEN_MODE_MULTI_FALSE=
+fi
+
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking riscv bitsize" >&5
$as_echo_n "checking riscv bitsize... " >&6; }
@@ -16962,6 +16972,10 @@ if test -z "${SIM_MIPS_GEN_MODE_M16_TRUE}" && test -z "${SIM_MIPS_GEN_MODE_M16_F
as_fn_error $? "conditional \"SIM_MIPS_GEN_MODE_M16\" was never defined.
Usually this means the macro was only invoked conditionally." "$LINENO" 5
fi
+if test -z "${SIM_MIPS_GEN_MODE_MULTI_TRUE}" && test -z "${SIM_MIPS_GEN_MODE_MULTI_FALSE}"; then
+ as_fn_error $? "conditional \"SIM_MIPS_GEN_MODE_MULTI\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi
: "${CONFIG_STATUS=./config.status}"
ac_write_fail=0
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 15016f94375..eb20977c5cc 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -4,8 +4,6 @@
## COMMON_PRE_CONFIG_FRAG
SIM_MIPS_GEN = @SIM_MIPS_GEN@
-SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
-SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
arch = mips
@@ -57,126 +55,4 @@ SIM_EXTRA_CFLAGS = @SIM_MIPS_SUBTARGET@
SIM_BITSIZE = -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1
SIM_FLOAT = -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
-SIM_EXTRA_CLEAN = clean-extra
-
-all: $(SIM_$(SIM_MIPS_GEN)_ALL)
-
## COMMON_POST_CONFIG_FRAG
-
-IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
-IGEN_INSN=$(srcdir)/mips.igen
-IGEN_DC=$(srcdir)/mips.dc
-M16_DC=$(srcdir)/m16.dc
-MICROMIPS32_DC=$(srcdir)/micromips.dc
-MICROMIPS16_DC=$(srcdir)/micromips16.dc
-IGEN_INCLUDE=\
- $(srcdir)/micromipsdsp.igen \
- $(srcdir)/micromips.igen \
- $(srcdir)/m16.igen \
- $(srcdir)/m16e.igen \
- $(srcdir)/mdmx.igen \
- $(srcdir)/mips3d.igen \
- $(srcdir)/sb1.igen \
- $(srcdir)/tx.igen \
- $(srcdir)/vr.igen \
- $(srcdir)/dsp.igen \
- $(srcdir)/dsp2.igen \
- $(srcdir)/mips3264r2.igen \
- $(srcdir)/mips3264r6.igen \
-
-SIM_SINGLE_ALL =
-SIM_M16_ALL =
-SIM_MULTI_ALL = tmp-multi
-
-BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
-
-$(BUILT_SRC_FROM_MULTI): tmp-multi
-tmp-multi: tmp-mach-multi tmp-run-multi
-tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
- for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
- p=`echo $${t} | sed -e 's/:.*//'` ; \
- m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
- f=`echo $${t} | sed -e 's/.*://'` ; \
- case $${p} in \
- micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \
- micromips32* | micromips64*) \
- e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \
- micromips_m32*) \
- e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
- m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
- micromips_m64*) \
- e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
- m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
- m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
- *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
- esac; \
- $(IGEN_RUN) \
- $(IGEN_TRACE) \
- $${e} \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- -M $${m} \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -i $(IGEN_INSN) \
- -P $${p}_ \
- -x \
- -n $${p}_icache.h -hc $${p}_icache.h \
- -n $${p}_icache.c -c $${p}_icache.c \
- -n $${p}_semantics.h -hs $${p}_semantics.h \
- -n $${p}_semantics.c -s $${p}_semantics.c \
- -n $${p}_idecode.h -hd $${p}_idecode.h \
- -n $${p}_idecode.c -d $${p}_idecode.c \
- -n $${p}_model.h -hm $${p}_model.h \
- -n $${p}_model.c -m $${p}_model.c \
- -n $${p}_support.h -hf $${p}_support.h \
- -n $${p}_support.c -f $${p}_support.c \
- -n $${p}_engine.h -he $${p}_engine.h \
- -n $${p}_engine.c -e $${p}_engine.c \
- || exit; \
- done
- $(SILENCE) touch $@
-tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
- for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
- case $${t} in \
- m16*) \
- m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
- sed < $(srcdir)/m16run.c > tmp-run \
- -e "s/^sim_/m16$${m}_/" \
- -e "/include/s/sim-engine/m16$${m}_engine/" \
- -e "s/m16_/m16$${m}_/" \
- -e "s/m32_/m32$${m}_/" ; \
- $(SHELL) $(srcdir)/../../move-if-change tmp-run \
- m16$${m}_run.c ; \
- ;;\
- micromips32*) \
- m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
- sed < $(srcdir)/micromipsrun.c > tmp-run \
- -e "s/^sim_/micromips32$${m}_/" \
- -e "/include/s/sim-engine/micromips32$${m}_engine/" \
- -e "s/micromips16_/micromips16$${m}_/" \
- -e "s/micromips32_/micromips32$${m}_/" \
- -e "s/m32_/m32$${m}_/" ; \
- $(SHELL) $(srcdir)/../../move-if-change tmp-run \
- micromips$${m}_run.c ; \
- ;;\
- micromips64*) \
- m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
- sed < $(srcdir)/micromipsrun.c > tmp-run \
- -e "s/^sim_/micromips64$${m}_/" \
- -e "/include/s/sim-engine/micromips64$${m}_engine/" \
- -e "s/micromips16_/micromips16$${m}_/" \
- -e "s/micromips32_/micromips64$${m}_/" \
- -e "s/m32_/m64$${m}_/" ; \
- $(SHELL) $(srcdir)/../../move-if-change tmp-run \
- micromips$${m}_run.c ; \
- ;;\
- esac \
- done
- $(SILENCE) touch $@
-
-clean-extra:
- rm -f $(BUILT_SRC_FROM_MULTI)
- rm -f tmp-*
- rm -f micromips16*.o micromips32*.o m16*.o m32*.o
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index efabd27e66b..cb53334ff78 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -335,3 +335,4 @@ AC_SUBST(SIM_MIPS_MULTI_SRC)
AC_SUBST(SIM_MIPS_MULTI_OBJ)
AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
AM_CONDITIONAL([SIM_MIPS_GEN_MODE_M16], [test "$SIM_MIPS_GEN" = "M16"])
+AM_CONDITIONAL([SIM_MIPS_GEN_MODE_MULTI], [test "$SIM_MIPS_GEN" = "MULTI"])
diff --git a/sim/mips/local.mk b/sim/mips/local.mk
index b6e482e0fda..9a0a5b59845 100644
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -81,6 +81,12 @@ if SIM_MIPS_GEN_MODE_M16
%D%/stamp-gen-mode-m16-m16 \
%D%/stamp-gen-mode-m16-m32
endif
+if SIM_MIPS_GEN_MODE_MULTI
+%C%_BUILD_OUTPUTS += \
+ $(SIM_MIPS_MULTI_SRC) \
+ %D%/stamp-gen-mode-multi-igen \
+ %D%/stamp-gen-mode-multi-run
+endif
## This makes sure build tools are available before building the arch-subdirs.
SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
@@ -89,6 +95,7 @@ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16): %D%/stamp-gen-mode-m16-m16
$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
+$(SIM_MIPS_MULTI_SRC): %D%/stamp-gen-mode-multi-igen %D%/stamp-gen-mode-multi-run
%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
%C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
@@ -108,6 +115,8 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
%D%/vr.igen
%C%_IGEN_DC = $(srcdir)/%D%/mips.dc
%C%_M16_DC = $(srcdir)/%D%/m16.dc
+%C%_MICROMIPS32_DC = $(srcdir)/%D%/micromips.dc
+%C%_MICROMIPS16_DC = $(srcdir)/%D%/micromips16.dc
## NB: Since these can be built by a number of generators, care
## must be taken to ensure that they are only dependant on
@@ -211,6 +220,99 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
-n m32_support.c -f %D%/m32_support.c
$(AM_V_at)touch $@
+%D%/stamp-gen-mode-multi-igen: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(%C%_M16_DC) $(%C%_MICROMIPS32_DC) $(%C%_MICROMIPS16_DC) $(IGEN)
+ $(AM_V_GEN)\
+ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
+ p=`echo $${t} | sed -e 's/:.*//'` ; \
+ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
+ f=`echo $${t} | sed -e 's/.*://'` ; \
+ case $${p} in \
+ micromips16*) \
+ e="-B 16 -H 15 -o $(%C%_MICROMIPS16_DC) -F 16" ;; \
+ micromips32* | micromips64*) \
+ e="-B 32 -H 31 -o $(%C%_MICROMIPS32_DC) -F $${f}" ;; \
+ micromips_m32*) \
+ e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
+ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
+ micromips_m64*) \
+ e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
+ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
+ m16*) \
+ e="-B 16 -H 15 -o $(%C%_M16_DC) -F 16" ;; \
+ *) \
+ e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}" ;; \
+ esac; \
+ $(IGEN_RUN) \
+ $(%C%_IGEN_TRACE) \
+ $${e} \
+ -I $(srcdir)/%D% \
+ -Werror \
+ -Wnodiscard \
+ -M $${m} \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -i $(%C%_IGEN_INSN) \
+ -P $${p}_ \
+ -x \
+ -n $${p}_icache.h -hc %D%/$${p}_icache.h \
+ -n $${p}_icache.c -c %D%/$${p}_icache.c \
+ -n $${p}_semantics.h -hs %D%/$${p}_semantics.h \
+ -n $${p}_semantics.c -s %D%/$${p}_semantics.c \
+ -n $${p}_idecode.h -hd %D%/$${p}_idecode.h \
+ -n $${p}_idecode.c -d %D%/$${p}_idecode.c \
+ -n $${p}_model.h -hm %D%/$${p}_model.h \
+ -n $${p}_model.c -m %D%/$${p}_model.c \
+ -n $${p}_support.h -hf %D%/$${p}_support.h \
+ -n $${p}_support.c -f %D%/$${p}_support.c \
+ -n $${p}_engine.h -he %D%/$${p}_engine.h \
+ -n $${p}_engine.c -e %D%/$${p}_engine.c \
+ || exit; \
+ done
+ $(AM_V_at)touch $@
+
+%D%/stamp-gen-mode-multi-run: %D%/m16run.c %D%/micromipsrun.c
+ $(AM_V_GEN)\
+ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
+ case $${t} in \
+ m16*) \
+ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
+ o=%D%/m16$${m}_run.c; \
+ sed < $(srcdir)/%D%/m16run.c > $$o.tmp \
+ -e "s/^sim_/m16$${m}_/" \
+ -e "/include/s/sim-engine/m16$${m}_engine/" \
+ -e "s/m16_/m16$${m}_/" \
+ -e "s/m32_/m32$${m}_/" \
+ || exit 1; \
+ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+ ;;\
+ micromips32*) \
+ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
+ o=%D%/micromips$${m}_run.c; \
+ sed < $(srcdir)/%D%/micromipsrun.c > $$o.tmp \
+ -e "s/^sim_/micromips32$${m}_/" \
+ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
+ -e "s/micromips16_/micromips16$${m}_/" \
+ -e "s/micromips32_/micromips32$${m}_/" \
+ -e "s/m32_/m32$${m}_/" \
+ || exit 1; \
+ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+ ;;\
+ micromips64*) \
+ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
+ o=%D%/micromips$${m}_run.c; \
+ sed < $(srcdir)/%D%/micromipsrun.c > $$o.tmp \
+ -e "s/^sim_/micromips64$${m}_/" \
+ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
+ -e "s/micromips16_/micromips16$${m}_/" \
+ -e "s/micromips32_/micromips64$${m}_/" \
+ -e "s/m32_/m64$${m}_/" \
+ || exit 1; \
+ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+ ;;\
+ esac \
+ done
+ $(AM_V_at)touch $@
+
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
## These are created by mips/acinclude.m4 during configure time.
DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2022-12-27 5:39 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-27 5:39 [binutils-gdb] sim: mips: hoist "multi" igen rules up to common builds Michael Frysinger
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).