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* [binutils-gdb] sim: m68hc11: move libsim.a creation to top-level
@ 2023-01-10 6:24 Michael Frysinger
0 siblings, 0 replies; only message in thread
From: Michael Frysinger @ 2023-01-10 6:24 UTC (permalink / raw)
To: gdb-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=ccb680718a351c5854046126d8ad66278ec8c457
commit ccb680718a351c5854046126d8ad66278ec8c457
Author: Mike Frysinger <vapier@gentoo.org>
Date: Mon Dec 26 22:00:16 2022 -0500
sim: m68hc11: move libsim.a creation to top-level
The objects are still compiled in the subdir, but the creation of the
archive itself is in the top-level. This is a required step before we
can move compilation itself up, and makes it easier to review.
The downside is that each object compile is a recursive make instead of
a single one. On my 4 core system, it adds ~100msec to the build per
port, so it's not great, but it shouldn't be a big deal. This will go
away of course once the top-level compiles objects.
Diff:
---
sim/Makefile.in | 168 ++++++++++++++++++++++++++++++------------------
sim/m68hc11/Makefile.in | 7 +-
sim/m68hc11/local.mk | 24 +++++++
3 files changed, 132 insertions(+), 67 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 62873ec5b40..40cddb4bbe6 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -225,38 +225,39 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/run
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = m68hc11/gencode
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mcore_TRUE@am__append_83 = mcore/run
-@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_84 = microblaze/run
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_85 = mips/run
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_86 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_87 = mips/itable.h \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/run
+@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_85 = microblaze/run
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_86 = mips/run
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_87 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_88 = mips/itable.h \
@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC)
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_89 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_90 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_91 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = $(mips_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = $(mips_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips/multi-include.h mips/multi-run.c
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94 = mn10300/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = \
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = $(mips_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/multi-include.h mips/multi-run.c
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95 = mn10300/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97 = \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
@@ -265,29 +266,29 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97 = $(mn10300_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_98 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_99 = moxie/run
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_100 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_101 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_102 = or1k/eng.h
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_103 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_99 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_100 = moxie/run
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_101 = msp430/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_102 = or1k/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_103 = or1k/eng.h
@SIM_ENABLE_ARCH_or1k_TRUE@am__append_104 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_105 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_106 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_107 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_108 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_109 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_110 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_111 = \
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_105 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_106 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_107 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_108 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_109 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_110 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_111 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_112 = \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_112 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_113 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_114 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_115 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_116 = \
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_113 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_114 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_115 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_116 = v850/run
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_117 = \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
@@ -296,8 +297,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_117 = $(v850_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_v850_TRUE@am__append_118 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_119 = $(v850_BUILD_OUTPUTS)
subdir = .
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -642,6 +643,24 @@ m32r_libsim_a_AR = $(AR) $(ARFLAGS)
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o
am_m32r_libsim_a_OBJECTS =
m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
+m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
+@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES = \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o $(patsubst \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
+am_m68hc11_libsim_a_OBJECTS =
+m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
@SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
@SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
@@ -974,12 +993,12 @@ SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
$(ft32_libsim_a_SOURCES) $(h8300_libsim_a_SOURCES) \
$(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \
$(lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \
- $(m32r_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
- $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
- $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
- $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
- $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
- $(erc32_run_SOURCES) erc32/sis.c \
+ $(m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \
+ $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \
+ $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \
+ $(cr16_run_SOURCES) $(cris_run_SOURCES) \
+ $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \
+ $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \
$(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
$(ft32_run_SOURCES) $(h8300_run_SOURCES) \
$(igen_filter_SOURCES) $(igen_gen_SOURCES) \
@@ -1531,8 +1550,8 @@ srcroot = $(srcdir)/..
SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
$(am__append_3) $(am__append_16) $(am__append_30) \
- $(am__append_63) $(am__append_74) $(am__append_79) \
- $(am__append_86) $(am__append_95)
+ $(am__append_63) $(am__append_74) $(am__append_80) \
+ $(am__append_87) $(am__append_96)
pkginclude_HEADERS = $(am__append_1)
noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
$(am__append_10) $(am__append_12) $(am__append_14) \
@@ -1540,17 +1559,17 @@ noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
$(am__append_35) $(am__append_41) $(am__append_45) \
$(am__append_47) $(am__append_52) $(am__append_54) \
$(am__append_56) $(am__append_61) $(am__append_67) \
- $(am__append_72)
+ $(am__append_72) $(am__append_78)
BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
$(am__append_37) $(am__append_49) $(am__append_58) \
- $(am__append_64) $(am__append_75) $(am__append_87) \
- $(am__append_96) $(am__append_102) $(am__append_111) \
- $(am__append_116)
+ $(am__append_64) $(am__append_75) $(am__append_88) \
+ $(am__append_97) $(am__append_103) $(am__append_112) \
+ $(am__append_117)
CLEANFILES = common/version.c common/version.c-stamp \
testsuite/common/bits-gen testsuite/common/bits32m0.c \
testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
testsuite/common/bits64m63.c
-DISTCLEANFILES = $(am__append_93)
+DISTCLEANFILES = $(am__append_94)
MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
%,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
$(common_GEN_MODULES_C_TARGETS) $(patsubst \
@@ -1558,9 +1577,9 @@ MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
$(am__append_27) $(am__append_34) $(am__append_40) \
$(am__append_51) $(am__append_60) $(am__append_66) \
- $(am__append_71) $(am__append_77) $(am__append_82) \
- $(am__append_92) $(am__append_98) $(am__append_104) \
- $(am__append_114) $(am__append_118)
+ $(am__append_71) $(am__append_77) $(am__append_83) \
+ $(am__append_93) $(am__append_99) $(am__append_105) \
+ $(am__append_115) $(am__append_119)
AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
@@ -1574,9 +1593,9 @@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
$(am__append_4) $(am__append_20) $(am__append_25) \
$(am__append_33) $(am__append_38) $(am__append_50) \
$(am__append_59) $(am__append_65) $(am__append_69) \
- $(am__append_76) $(am__append_80) $(am__append_91) \
- $(am__append_97) $(am__append_103) $(am__append_112) \
- $(am__append_117)
+ $(am__append_76) $(am__append_81) $(am__append_92) \
+ $(am__append_98) $(am__append_104) $(am__append_113) \
+ $(am__append_118)
SIM_INSTALL_DATA_LOCAL_DEPS =
SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
@@ -2247,6 +2266,21 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
+@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
+@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
+
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
@@ -2324,8 +2358,8 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
@SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_88) $(am__append_89) \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_90)
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) $(am__append_90) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_91)
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
@@ -2876,6 +2910,14 @@ m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m3
$(AM_V_at)-rm -f m32r/libsim.a
$(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
$(AM_V_at)$(RANLIB) m32r/libsim.a
+m68hc11/$(am__dirstamp):
+ @$(MKDIR_P) m68hc11
+ @: > m68hc11/$(am__dirstamp)
+
+m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
+ $(AM_V_at)-rm -f m68hc11/libsim.a
+ $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
+ $(AM_V_at)$(RANLIB) m68hc11/libsim.a
clean-checkPROGRAMS:
@list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
@@ -3037,9 +3079,6 @@ m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run
m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
@rm -f m32r/run$(EXEEXT)
$(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
-m68hc11/$(am__dirstamp):
- @$(MKDIR_P) m68hc11
- @: > m68hc11/$(am__dirstamp)
m68hc11/$(DEPDIR)/$(am__dirstamp):
@$(MKDIR_P) m68hc11/$(DEPDIR)
@: > m68hc11/$(DEPDIR)/$(am__dirstamp)
@@ -4557,6 +4596,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
+@SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
+
+@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
diff --git a/sim/m68hc11/Makefile.in b/sim/m68hc11/Makefile.in
index 04b926c48c2..f67a94cf940 100644
--- a/sim/m68hc11/Makefile.in
+++ b/sim/m68hc11/Makefile.in
@@ -19,12 +19,7 @@
arch = m68hc11
-M68HC11_OBJS = interp.o m68hc11int.o m68hc12int.o \
- emulos.o interrupts.o m68hc11_sim.o
-
-SIM_OBJS = $(M68HC11_OBJS) \
- $(SIM_NEW_COMMON_OBJS) \
- sim-resume.o
+SIM_LIBSIM =
# We must use 32-bit addresses to support memory bank switching.
# The WORD_BITSIZE is normally 16 but must be switched (temporarily)
diff --git a/sim/m68hc11/local.mk b/sim/m68hc11/local.mk
index d2e04576a77..9b52df6b533 100644
--- a/sim/m68hc11/local.mk
+++ b/sim/m68hc11/local.mk
@@ -16,6 +16,30 @@
## You should have received a copy of the GNU General Public License
## along with this program. If not, see <http://www.gnu.org/licenses/>.
+%C%_libsim_a_SOURCES =
+%C%_libsim_a_LIBADD = \
+ $(common_libcommon_a_OBJECTS) \
+ %D%/interp.o \
+ %D%/m68hc11int.o \
+ %D%/m68hc12int.o \
+ %D%/emulos.o \
+ %D%/interrupts.o \
+ %D%/m68hc11_sim.o \
+ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \
+ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \
+ $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \
+ %D%/modules.o \
+ %D%/sim-resume.o
+$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h
+
+noinst_LIBRARIES += %D%/libsim.a
+
+%D%/%.o: %D%/%.c
+ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+%D%/%.o: common/%.c
+ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
%C%_run_SOURCES =
%C%_run_LDADD = \
%D%/nrun.o \
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2023-01-10 6:24 [binutils-gdb] sim: m68hc11: move libsim.a creation to top-level Michael Frysinger
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