public inbox for gdb-cvs@sourceware.org
help / color / mirror / Atom feed
* [binutils-gdb] sim: or1k: move libsim.a creation to top-level
@ 2023-01-10 6:24 Michael Frysinger
0 siblings, 0 replies; only message in thread
From: Michael Frysinger @ 2023-01-10 6:24 UTC (permalink / raw)
To: gdb-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=4d998e1559ab9728597971325738a246857f8f6c
commit 4d998e1559ab9728597971325738a246857f8f6c
Author: Mike Frysinger <vapier@gentoo.org>
Date: Mon Dec 26 22:20:09 2022 -0500
sim: or1k: move libsim.a creation to top-level
The objects are still compiled in the subdir, but the creation of the
archive itself is in the top-level. This is a required step before we
can move compilation itself up, and makes it easier to review.
The downside is that each object compile is a recursive make instead of
a single one. On my 4 core system, it adds ~100msec to the build per
port, so it's not great, but it shouldn't be a big deal. This will go
away of course once the top-level compiles objects.
Diff:
---
sim/Makefile.in | 118 +++++++++++++++++++++++++++++++++++++--------------
sim/or1k/Makefile.in | 22 +---------
sim/or1k/local.mk | 34 +++++++++++++++
3 files changed, 122 insertions(+), 52 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 3d62ecca486..16f3dd68521 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -304,25 +304,26 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_moxie_TRUE@am__append_108 = moxie/run
@SIM_ENABLE_ARCH_msp430_TRUE@am__append_109 = msp430/libsim.a
@SIM_ENABLE_ARCH_msp430_TRUE@am__append_110 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/eng.h
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/libsim.a
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = or1k/eng.h
@SIM_ENABLE_ARCH_or1k_TRUE@am__append_114 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_115 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_116 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_117 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_118 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_119 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_120 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_121 = \
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_115 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_116 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_117 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_118 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_119 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_120 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_121 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_122 = \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_122 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_123 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_124 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_125 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_126 = \
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_123 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_124 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_126 = v850/run
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_127 = \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
@@ -331,8 +332,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_127 = $(v850_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_v850_TRUE@am__append_128 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_129 = $(v850_BUILD_OUTPUTS)
subdir = .
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -781,6 +782,23 @@ msp430_libsim_a_AR = $(AR) $(ARFLAGS)
@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o
am_msp430_libsim_a_OBJECTS =
msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS)
+or1k_libsim_a_AR = $(AR) $(ARFLAGS)
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = \
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.o or1k/cgen-accfp.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-fpu.o or1k/cgen-run.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-scache.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o or1k/cgen-utils.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o or1k/cpu.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o or1k/mloop.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o or1k/sem.o or1k/or1k.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o or1k/traps.o
+am_or1k_libsim_a_OBJECTS =
+or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS)
@SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
@SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
@@ -1116,11 +1134,12 @@ SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
$(mcore_libsim_a_SOURCES) $(microblaze_libsim_a_SOURCES) \
$(mips_libsim_a_SOURCES) $(mn10300_libsim_a_SOURCES) \
$(moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \
- $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \
- $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \
- $(cr16_run_SOURCES) $(cris_run_SOURCES) \
- $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \
- $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \
+ $(or1k_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
+ $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
+ $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
+ $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
+ $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
+ $(erc32_run_SOURCES) erc32/sis.c \
$(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
$(ft32_run_SOURCES) $(h8300_run_SOURCES) \
$(igen_filter_SOURCES) $(igen_gen_SOURCES) \
@@ -1683,12 +1702,12 @@ noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
$(am__append_56) $(am__append_61) $(am__append_67) \
$(am__append_72) $(am__append_78) $(am__append_84) \
$(am__append_86) $(am__append_91) $(am__append_101) \
- $(am__append_107) $(am__append_109)
+ $(am__append_107) $(am__append_109) $(am__append_111)
BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
$(am__append_37) $(am__append_49) $(am__append_58) \
$(am__append_64) $(am__append_75) $(am__append_94) \
- $(am__append_104) $(am__append_112) $(am__append_121) \
- $(am__append_126)
+ $(am__append_104) $(am__append_113) $(am__append_122) \
+ $(am__append_127)
CLEANFILES = common/version.c common/version.c-stamp \
testsuite/common/bits-gen testsuite/common/bits32m0.c \
testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
@@ -1702,8 +1721,8 @@ MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
$(am__append_27) $(am__append_34) $(am__append_40) \
$(am__append_51) $(am__append_60) $(am__append_66) \
$(am__append_71) $(am__append_77) $(am__append_83) \
- $(am__append_99) $(am__append_106) $(am__append_114) \
- $(am__append_124) $(am__append_128)
+ $(am__append_99) $(am__append_106) $(am__append_115) \
+ $(am__append_125) $(am__append_129)
AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
@@ -1718,8 +1737,8 @@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
$(am__append_33) $(am__append_38) $(am__append_50) \
$(am__append_59) $(am__append_65) $(am__append_69) \
$(am__append_76) $(am__append_81) $(am__append_98) \
- $(am__append_105) $(am__append_113) $(am__append_122) \
- $(am__append_127)
+ $(am__append_105) $(am__append_114) $(am__append_123) \
+ $(am__append_128)
SIM_INSTALL_DATA_LOCAL_DEPS =
SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
@@ -2623,6 +2642,31 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
@SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-accfp.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-fpu.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-run.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-scache.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-utils.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cpu.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sem.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/or1k.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o \
+@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/traps.o
+
@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
@@ -3162,6 +3206,14 @@ msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EX
$(AM_V_at)-rm -f msp430/libsim.a
$(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
$(AM_V_at)$(RANLIB) msp430/libsim.a
+or1k/$(am__dirstamp):
+ @$(MKDIR_P) or1k
+ @: > or1k/$(am__dirstamp)
+
+or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
+ $(AM_V_at)-rm -f or1k/libsim.a
+ $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
+ $(AM_V_at)$(RANLIB) or1k/libsim.a
clean-checkPROGRAMS:
@list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
@@ -3360,9 +3412,6 @@ moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie
msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
@rm -f msp430/run$(EXEEXT)
$(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
-or1k/$(am__dirstamp):
- @$(MKDIR_P) or1k
- @: > or1k/$(am__dirstamp)
or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
@rm -f or1k/run$(EXEEXT)
@@ -5126,6 +5175,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c
@SIM_ENABLE_ARCH_msp430_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+@SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
+
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: or1k/%.c
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c
+@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
index ca5bf1ae4ee..19eed022932 100644
--- a/sim/or1k/Makefile.in
+++ b/sim/or1k/Makefile.in
@@ -18,27 +18,7 @@
## COMMON_PRE_CONFIG_FRAG
-OR1K_OBJS = \
- or1k.o \
- arch.o \
- cpu.o \
- decode.o \
- model.o \
- sem.o \
- mloop.o \
- sim-if.o \
- traps.o
-
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- cgen-utils.o \
- cgen-trace.o \
- cgen-scache.o \
- cgen-run.o \
- cgen-fpu.o \
- cgen-accfp.o
-
-SIM_OBJS += $(OR1K_OBJS)
+SIM_LIBSIM =
SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
diff --git a/sim/or1k/local.mk b/sim/or1k/local.mk
index 7d999f6f3aa..a7412bfa07c 100644
--- a/sim/or1k/local.mk
+++ b/sim/or1k/local.mk
@@ -15,6 +15,40 @@
## You should have received a copy of the GNU General Public License
## along with this program. If not, see <http://www.gnu.org/licenses/>.
+%C%_libsim_a_SOURCES =
+%C%_libsim_a_LIBADD = \
+ $(common_libcommon_a_OBJECTS) \
+ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \
+ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \
+ %D%/modules.o \
+ \
+ %D%/cgen-accfp.o \
+ %D%/cgen-fpu.o \
+ %D%/cgen-run.o \
+ %D%/cgen-scache.o \
+ %D%/cgen-trace.o \
+ %D%/cgen-utils.o \
+ \
+ %D%/arch.o \
+ %D%/cpu.o \
+ %D%/decode.o \
+ %D%/mloop.o \
+ %D%/model.o \
+ %D%/sem.o \
+ \
+ %D%/or1k.o \
+ %D%/sim-if.o \
+ %D%/traps.o
+$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h
+
+noinst_LIBRARIES += %D%/libsim.a
+
+%D%/%.o: %D%/%.c
+ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+%D%/%.o: common/%.c
+ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
%C%_run_SOURCES =
%C%_run_LDADD = \
%D%/nrun.o \
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2023-01-10 6:24 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-10 6:24 [binutils-gdb] sim: or1k: move libsim.a creation to top-level Michael Frysinger
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).