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* [binutils-gdb] sim: riscv: Fix crash during instruction decoding
@ 2024-01-23  1:18 Michael Frysinger
  0 siblings, 0 replies; only message in thread
From: Michael Frysinger @ 2024-01-23  1:18 UTC (permalink / raw)
  To: gdb-cvs

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b783d068d969b5422ce60ecc6968a1a35ee92a7e

commit b783d068d969b5422ce60ecc6968a1a35ee92a7e
Author: Jaydeep Patil <jaydeep.patil@imgtec.com>
Date:   Thu Jan 11 05:28:21 2024 +0000

    sim: riscv: Fix crash during instruction decoding
    
    The match_never() function has been removed and thus step_once() crashes
    during instruction decoding. Fixed it by checking for null pointer before
    invoking function attached to match_func member of riscv_opcode structure

Diff:
---
 sim/riscv/sim-main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 52dca4ad282..0b05f1ce861 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -1040,7 +1040,7 @@ void step_once (SIM_CPU *cpu)
   for (; op->name; op++)
     {
       /* Does the opcode match?  */
-      if (! op->match_func (op, iw))
+      if (! op->match_func || ! op->match_func (op, iw))
 	continue;
       /* Is this a pseudo-instruction and may we print it as such?  */
       if (op->pinfo & INSN_ALIAS)

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