[binutils-gdb] sim: bpf: remove support for ldinddw and ldabsdw instructions

[binutils-gdb] sim: bpf: remove support for ldinddw and ldabsdw instructions

[Jose E. Marchesi]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=920d9f0b39e9e8e42134c0317e772dbb93cdf8c8

commit 920d9f0b39e9e8e42134c0317e772dbb93cdf8c8
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date:   Mon Jan 29 22:25:19 2024 +0100

    sim: bpf: remove support for ldinddw and ldabsdw instructions
    
    This patch removes support for the two instructions above from the GNU
    simulator, including the corresponding tests.  These instructions do
    not really exist in BPF and are not recognized as such by the kernel
    verifier.  This has now been pointed out during the standardization of
    the BPF ISA.
    
    Signed-off-by: Jose E. Marchesi <jose.marchesi@oracle.com>

Diff:
---
 sim/bpf/bpf-sim.c         | 13 -------------
 sim/testsuite/bpf/ldabs.s | 15 ---------------
 2 files changed, 28 deletions(-)

diff --git a/sim/bpf/bpf-sim.c b/sim/bpf/bpf-sim.c
index dbffa89bf88..c1f103823fb 100644
--- a/sim/bpf/bpf-sim.c
+++ b/sim/bpf/bpf-sim.c
@@ -943,13 +943,6 @@ execute (SIM_CPU *cpu, struct bpf_insn *insn)
                                        bpf_read_u64 (cpu, bpf_regs[BPF_R6] + skb_data_offset)
                                        + bpf_regs[insn->src] + insn->imm32);
       break;
-    case BPF_INSN_LDINDDW:
-      BPF_TRACE ("BPF_INSN_LDINDDW\n");
-      bpf_regs[BPF_R0] = bpf_read_u64 (cpu,
-                                       bpf_read_u64 (cpu, bpf_regs[BPF_R6] + skb_data_offset)
-                                       + bpf_regs[insn->src] + insn->imm32);
-      break;
-      /* Absolute load instructions.  */
     case BPF_INSN_LDABSB:
       BPF_TRACE ("BPF_INSN_LDABSB\n");
       bpf_regs[BPF_R0] = bpf_read_u8 (cpu,
@@ -968,12 +961,6 @@ execute (SIM_CPU *cpu, struct bpf_insn *insn)
                                        bpf_read_u64 (cpu, bpf_regs[BPF_R6] + skb_data_offset)
                                        + insn->imm32);
       break;
-    case BPF_INSN_LDABSDW:
-      BPF_TRACE ("BPF_INSN_LDABSDW\n");
-      bpf_regs[BPF_R0] = bpf_read_u64 (cpu,
-                                       bpf_read_u64 (cpu, bpf_regs[BPF_R6] + skb_data_offset)
-                                       + insn->imm32);
-      break;
       /* Generic load instructions (to register.)  */
     case BPF_INSN_LDXB:
       BPF_TRACE ("BPF_INSN_LDXB\n");
diff --git a/sim/testsuite/bpf/ldabs.s b/sim/testsuite/bpf/ldabs.s
index 16f89ced97c..fb0e36b2d31 100644
--- a/sim/testsuite/bpf/ldabs.s
+++ b/sim/testsuite/bpf/ldabs.s
@@ -52,14 +52,6 @@ main:
     ldabsb      0x10
     fail_ne32   %r0, 0x5a
 
-    /* Repeat for a double-word (8-byte)
-       (note: fail_ne macro uses r0, so copy to another r1 to compare)  */
-    lddw        %r2, 0x1234deadbeef5678
-    stxdw       [%r6+0x1018], %r2
-    ldabsdw     0x18
-    mov         %r1, %r0
-    fail_ne     %r1, 0x1234deadbeef5678
-
     /* Now, we do the same for the indirect loads  */
     mov         %r7, 0x100
     stw         [%r6+0x1100], 0x0eedbeef
@@ -77,11 +69,4 @@ main:
     ldindb      %r7, 0x8
     fail_ne32   %r0, 0x5f
 
-    /* double-word  */
-    lddw        %r2, 0xcafe12345678d00d
-    stxdw       [%r6+0x1110], %r2
-    ldinddw     %r7, 0x10
-    mov         %r1, %r0
-    fail_ne     %r1, 0xcafe12345678d00d
-
     pass