Re: [PING] [PATCH 0/5] Improve support for regcache_map_entry with variable register base

[John Baldwin <jhb@FreeBSD.org>]

On 7/21/22 7:53 AM, John Baldwin wrote:
> On 7/7/22 5:58 PM, John Baldwin wrote:
>> When I added support for TLS to the ARM and AArch64 architectures on
>> FreeBSD, I had to construct register maps and associated register sets
>> on the fly in both the callback for processing register core dump
>> notes and in the native target routines to fetch and store registers.
>>
>> The reason I had to create these on the fly is that the register
>> number was not known at compile time, so the register map and register
>> set could not be constant structures shared among the -tdep and -nat
>> code the way other register sets were.
>>
>> This series aims to rectify that.  The first patch adds new variants
>> of regcache::collect_regset and regcache::supply_regset that accept an
>> additional 'regbase' argument.  When these functions iterate over
>> regcache map entries, the effective register number for the entry is
>> computed by adding the value in the entry to 'regbase' permittting the
>> regcache map entries to hold relative register numbers for a block of
>> registers.
>>
>> The rest of the series then makes use of this to use a single, shared
>> register map and register set for TLS on FreeBSD/ARM and
>> FreeBSD/AArch64.  Using this requires custom supply and collect regset
>> routines for the TLS regsets that extract the base register number
>> from the gdbarch's tdep and invoke the new regcache class methods, so
>> patch 2 updates the wrappers for dealing with regsets in fbsd-nat to
>> always invoke the regset routines from the regset instead of directly
>> calling the default functions.  Patch 3 is another change to fbsd-nat
>> to cope with the fact that regcache_map_supplies() needs to pass in
>> the relative register number in the wrapper routines rather than the
>> absolute register number.
>>
>> Patches 4 and 5 are the updates to the ARM and AArch64 FreeBSD
>> architectures and targets.
>>
>> I have not done the work to make use of this in the Linux AArch64
>> architecture, though I think it would apply to at least the TLS and
>> MTE register sets there in a similar fashion.  SVE is harder because
>> the register sizes change (though SVE might be able to make use of
>> this if register_size() returns the right value by using a register
>> size of 0 in the relevant register cache map entries).
>>
>> John Baldwin (5):
>>     regcache: Add collect/supply_regset variants that accept a register
>>       base.
>>     fbsd-nat: Use regset supply/collect methods.
>>     fbsd-nat: Pass an optional register base to the register set helpers.
>>     arm-fbsd: Use a static regset for the TLS register set.
>>     aarch64-fbsd: Use a static regset for the TLS register set.
>>
>>    gdb/aarch64-fbsd-nat.c  | 36 +++------------------------
>>    gdb/aarch64-fbsd-tdep.c | 54 ++++++++++++++++++++++++++++-------------
>>    gdb/aarch64-fbsd-tdep.h |  1 +
>>    gdb/arm-fbsd-nat.c      | 34 +++-----------------------
>>    gdb/arm-fbsd-tdep.c     | 52 +++++++++++++++++++++++++++------------
>>    gdb/arm-fbsd-tdep.h     |  1 +
>>    gdb/fbsd-nat.c          | 42 +++++++++++++++++---------------
>>    gdb/fbsd-nat.h          | 49 +++++++++++++++++++++----------------
>>    gdb/regcache.c          | 28 ++++++++++++++++++---
>>    gdb/regcache.h          | 24 ++++++++++++++++--
>>    10 files changed, 181 insertions(+), 140 deletions(-)
> 
> Ping.
> 


-- 
John Baldwin