* [PATCH v3 1/1] Documentation for MPX.
@ 2013-12-03 12:37 ` Walfred Tedeschi
2013-12-03 12:52 ` Eli Zaretskii
2014-08-04 16:57 ` Incorrect placement of two Intel gdb/NEWS items Jan Kratochvil
0 siblings, 2 replies; 16+ messages in thread
From: Walfred Tedeschi @ 2013-12-03 12:37 UTC (permalink / raw)
To: eliz; +Cc: gdb-patches, Walfred Tedeschi
Eli,
Thanks for your review!
Phrase starting with: "Architecture registers BND0 through ..."
now reads: "BND0 through ..."
Thanks again and regards,
-Fred
2013-12-03 Walfred Tedeschi <walfred.tedeschi@intel.com>
* NEWS: Add section for Intel(R) Architecture Instructions
Extesions mentioning MPX.
doc/
* gdb.texinfo (i386 Features): Add MPX feature registers.
(x86 Specific featuresx86 Architecture-specific Issues): Adds
a subsubsection for MPX and describes the display of the
boundary registers.
---
gdb/NEWS | 2 ++
gdb/doc/gdb.texinfo | 43 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/gdb/NEWS b/gdb/NEWS
index 5110b27..dbc72a6 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -5563,3 +5563,5 @@ GDB now handles cross debugging. If you are remotely debugging between
two different machines, type ``./configure host -target=targ''.
Host is the machine where GDB will run; targ is the machine
where the program that you are debugging will run.
+
+ * GDB now supports access to Intel(R) MPX registers on GNU/Linux.
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 004c376..ad496d0 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -21376,6 +21376,39 @@ be returned in a register.
@kindex show struct-convention
Show the current setting of the convention to return @code{struct}s
from functions.
+
+@cindex Intel(R) Memory Protection Extensions (MPX).
+@subsubsection Intel(R) @dfn{Memory Protection Extensions} (MPX).
+
+@item bnd0raw..bnd3raw and bnd0@dots{}bnd3 registers display.
+Memory Protection Extension (MPX) adds the bound registers @samp{BND0}
+@footnote{The register named with capital letters represent the architecture
+registers.} through @samp{BND3}. Bound registers store a pair of 64-bit values
+which are the lower bound and upper bound. Bounds are effective addresses or
+memory locations. The upper bounds are architecturally represented in 1's
+complement form. A bound having lower bound = 0, and upper bound = 0
+(1's complement of all bits set) will allow access to the entire address space.
+
+@samp{BND0} through @samp{BND3} are represented in @value{GDBN} as @samp{bnd0raw}
+through @samp{bnd3raw}. Pseudo registers @samp{bnd0} through @samp{bnd3}
+display the upper bound performing the complement of one operation on the
+upper bound value, i.e.@ when upper bound in @samp{bnd0raw} is 0 in the
+@value{GDBN} @samp{bnd0} it will be @code{0xfff@dots{}}. In this sense it
+can also be noted that the upper bounds are inclusive.
+
+As an example, assume that the register BND0 holds bounds for a pointer having
+access allowed for the range between 0x32 and 0x71. The values present on
+bnd0raw and bnd registers are presented as follows:
+
+@smallexample
+ bnd0raw = @{0x32, 0xffffffff8e@}
+ bnd0 = @{lbound = 0x32, ubound = 0x71@} : size 64
+@end smallexample
+
+This way the raw value can be accessed via bnd0raw@dots{}bnd3raw. Any change
+on bnd0@dots{}bnd3 or bnd0raw@dots{}bnd3raw is reflect on its counterpart. When the
+bnd0@dots{}bnd3 registers are displayed via Python, the display includes the memory size,
+in bits, accessible to the pointer.
@end table
@node Alpha
@@ -43162,6 +43195,16 @@ describe the upper 128 bits of @sc{ymm} registers:
@samp{ymm0h} through @samp{ymm15h} for amd64
@end itemize
+The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing Intel(R)
+Memory Protection Extension (MPX). It should describe the following registers:
+
+@itemize @minus
+@item
+@samp{bnd0raw} through @samp{bnd3raw} for i386 and amd64.
+@item
+@samp{bndcfgu} and @samp{bndstatus} for i386 and amd64.
+@end itemize
+
The @samp{org.gnu.gdb.i386.linux} feature is optional. It should
describe a single register, @samp{orig_eax}.
--
1.8.3.2
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 1/1] Documentation for MPX.
2013-12-03 12:37 ` [PATCH v3 1/1] Documentation for MPX Walfred Tedeschi
@ 2013-12-03 12:52 ` Eli Zaretskii
2014-08-04 16:57 ` Incorrect placement of two Intel gdb/NEWS items Jan Kratochvil
1 sibling, 0 replies; 16+ messages in thread
From: Eli Zaretskii @ 2013-12-03 12:52 UTC (permalink / raw)
To: Walfred Tedeschi; +Cc: gdb-patches, walfred.tedeschi
> From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> Cc: gdb-patches@sourceware.org, Walfred Tedeschi <walfred.tedeschi@intel.com>
> Date: Tue, 3 Dec 2013 13:36:12 +0100
>
> Eli,
>
> Thanks for your review!
>
> Phrase starting with: "Architecture registers BND0 through ..."
> now reads: "BND0 through ..."
Looks good to me, thanks.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH V5 3/3] Add AVX512 feature description to GDB manual
2014-04-23 13:03 [PATCH V5 0/3] Intel(R) AVX-512 register support Michael Sturm
@ 2014-04-23 13:03 ` Michael Sturm
2013-12-03 12:37 ` [PATCH v3 1/1] Documentation for MPX Walfred Tedeschi
2014-04-23 13:03 ` [PATCH V5 2/3] Add AVX512 register support to gdbserver Michael Sturm
` (2 subsequent siblings)
3 siblings, 1 reply; 16+ messages in thread
From: Michael Sturm @ 2014-04-23 13:03 UTC (permalink / raw)
To: palves, eliz, mark.kettenis, walfred.tedeschi; +Cc: gdb-patches, Michael Sturm
2013-09-11 Michael Sturm <michael.sturm@intel.com>
Walfred Tedeschi <walfred.tedeschi@intel.com>
* NEWS: Add note about new support for AVX512.
doc/
* gdb.texinfo (i386 Features): Add description of AVX512
registers.
---
gdb/NEWS | 5 +++++
gdb/doc/gdb.texinfo | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 39 insertions(+)
diff --git a/gdb/NEWS b/gdb/NEWS
index 2a384ba..e079766 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -5684,3 +5684,8 @@ Host is the machine where GDB will run; targ is the machine
where the program that you are debugging will run.
* GDB now supports access to Intel(R) MPX registers on GNU/Linux.
+
+ * Support for Intel(R) AVX-512 registers on GNU/Linux.
+
+Support displaying and modifying Intel(R) AVX-512 registers $zmm0 - $zmm31 and
+$k0 - $k7 on GNU/Linux.
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index de5ac63..14383c5 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -39041,6 +39041,40 @@ Memory Protection Extension (MPX). It should describe the following registers:
The @samp{org.gnu.gdb.i386.linux} feature is optional. It should
describe a single register, @samp{orig_eax}.
+The @samp{org.gnu.gdb.i386.avx512} feature is optional and requires the
+@samp{org.gnu.gdb.i386.avx} feature. It should
+describe additional @sc{xmm} registers:
+
+@itemize @minus
+@item
+@samp{xmm16h} through @samp{xmm31h}, only valid for amd64.
+@end itemize
+
+It should describe the upper 128 bits of additional @sc{ymm} registers:
+
+@itemize @minus
+@item
+@samp{ymm16h} through @samp{ymm31h}, only valid for amd64.
+@end itemize
+
+It should
+describe the upper 256 bits of @sc{zmm} registers:
+
+@itemize @minus
+@item
+@samp{zmm0h} through @samp{zmm7h} for i386.
+@item
+@samp{zmm0h} through @samp{zmm15h} for amd64.
+@end itemize
+
+It should
+describe the additional @sc{zmm} registers:
+
+@itemize @minus
+@item
+@samp{zmm16h} through @samp{zmm31h}, only valid for amd64.
+@end itemize
+
@node MIPS Features
@subsection @acronym{MIPS} Features
@cindex target descriptions, @acronym{MIPS} features
--
1.8.4.2
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH V5 2/3] Add AVX512 register support to gdbserver.
2014-04-23 13:03 [PATCH V5 0/3] Intel(R) AVX-512 register support Michael Sturm
2014-04-23 13:03 ` [PATCH V5 3/3] Add AVX512 feature description to GDB manual Michael Sturm
@ 2014-04-23 13:03 ` Michael Sturm
2014-11-21 10:21 ` Andreas Arnez
2014-04-23 13:04 ` [PATCH V5 1/3] Add AVX512 registers support to GDB Michael Sturm
2014-04-24 11:49 ` [PATCH V5 0/3] Intel(R) AVX-512 register support Pedro Alves
3 siblings, 1 reply; 16+ messages in thread
From: Michael Sturm @ 2014-04-23 13:03 UTC (permalink / raw)
To: palves, eliz, mark.kettenis, walfred.tedeschi; +Cc: gdb-patches, Michael Sturm
2013-09-11 Michael Sturm <michael.sturm@mintel.com>
Walfred Tedeschi <walfred.tedeschi@intel.com>
gdbserver/
* Makefile.in: Added rules to handle new files
i386-avx512.c i386-avx512-linux.c amd64-avx512.c
amd64-avx512-linux.c x32-avx512.c x32-avx512-linux.c.
* configure.srv (srv_i386_regobj): Add i386-avx512.o.
(srv_i386_linux_regobj): Add i386-avx512-linux.o.
(srv_amd64_regobj): Add amd64-avx512.o and x32-avx512.o.
(srv_amd64_linux_regobj): Add amd64-avx512-linux.o and
x32-avx512-linux.o.
(srv_i386_32bit_xmlfiles): Add i386/32bit-avx512.xml.
(srv_i386_64bit_xmlfiles): Add i386/64bit-avx512.xml.
(srv_amd64_xmlfiles): Add i386/amd64-avx512.xml and
i386/x32-avx512.xml.
(srv_i386_linux_xmlfiles): Add i386/i386-avx512-linux.xml.
(srv_amd64_linux_xmlfiles): Add i386/amd64-avx512-linux.xml and
i386/x32-avx512-linux.xml.
* i387-fp.c (num_avx512_k_registers): New constant for number
of K registers.
(num_avx512_zmmh_low_registers): New constant for number of
lower ZMM registers (0-15).
(num_avx512_zmmh_high_registers): New constant for number of
higher ZMM registers (16-31).
(num_avx512_ymmh_registers): New contant for number of higher
YMM registers (ymm16-31 added by avx521 on x86_64).
(num_avx512_xmm_registers): New constant for number of higher
XMM registers (xmm16-31 added by AVX512 on x86_64).
(struct i387_xsave): Add space for AVX512 registers.
(i387_cache_to_xsave): Change raw buffer size to 64 characters.
Add code to handle AVX512 registers.
(i387_xsave_to_cache): Add code to handle AVX512 registers.
* linux-x86-low.c (init_registers_amd64_avx512_linux): New
prototypei from generated file.
(tdesc_amd64_avx512_linux): Likewise.
(init_registers_x32_avx512_linux): Likewise.
(tdesc_x32_avx512_linux): Likewise.
(init_registers_i386_avx512_linux): Likewise.
(tdesc_i386_avx512_linux): Likewise.
(x86_64_regmap): Add AVX512 registers.
(x86_linux_read_description): Add code to handle AVX512 XSTATE
mask.
(initialize_low_arch): Add code to initialize AVX512 registers.
---
gdb/gdbserver/Makefile.in | 19 ++++-
gdb/gdbserver/configure.srv | 20 ++---
gdb/gdbserver/i387-fp.c | 182 +++++++++++++++++++++++++++++++++++++++++-
gdb/gdbserver/linux-x86-low.c | 35 +++++++-
4 files changed, 242 insertions(+), 14 deletions(-)
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 663deb6..c7ea042 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -344,11 +344,14 @@ clean:
rm -f xml-builtin.c stamp-xml
rm -f i386-avx.c i386-avx-linux.c
rm -f i386-mpx.c i386-mpx-linux.c
+ rm -f i386-avx512.c i386-avx512-linux.c
rm -f amd64-avx.c amd64-avx-linux.c
rm -f amd64-mpx.c amd64-mpx-linux.c
+ rm -f amd64-avx512.c amd64-avx512-linux.c
rm -f i386-mmx.c i386-mmx-linux.c
rm -f x32.c x32-linux.c
rm -f x32-avx.c x32-avx-linux.c
+ rm -f x32-avx512.c x32-avx512-linux.c
@$(MAKE) $(FLAGS_TO_PASS) DO=$@ "DODIRS=$(SUBDIRS)" subdir_do
maintainer-clean realclean distclean: clean
@@ -589,6 +592,10 @@ i386-avx.c : $(srcdir)/../regformats/i386/i386-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-avx.dat i386-avx.c
i386-avx-linux.c : $(srcdir)/../regformats/i386/i386-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-avx-linux.dat i386-avx-linux.c
+i386-avx512.c : $(srcdir)/../regformats/i386/i386-avx512.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-avx512.dat i386-avx.c
+i386-avx512-linux.c : $(srcdir)/../regformats/i386/i386-avx512-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-avx512-linux.dat i386-avx512-linux.c
i386-mpx.c : $(srcdir)/../regformats/i386/i386-mpx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-mpx.dat i386-mpx.c
i386-mpx-linux.c : $(srcdir)/../regformats/i386/i386-mpx-linux.dat $(regdat_sh)
@@ -689,10 +696,14 @@ amd64-linux.c : $(srcdir)/../regformats/i386/amd64-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-linux.dat amd64-linux.c
amd64-avx.c : $(srcdir)/../regformats/i386/amd64-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-avx.dat amd64-avx.c
-amd64-mpx.c : $(srcdir)/../regformats/i386/amd64-mpx.dat $(regdat_sh)
- $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-mpx.dat amd64-mpx.c
amd64-avx-linux.c : $(srcdir)/../regformats/i386/amd64-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-avx-linux.dat amd64-avx-linux.c
+amd64-avx512.c : $(srcdir)/../regformats/i386/amd64-avx512.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-avx512.dat amd64-avx512.c
+amd64-avx512-linux.c : $(srcdir)/../regformats/i386/amd64-avx512-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-avx512-linux.dat amd64-avx512-linux.c
+amd64-mpx.c : $(srcdir)/../regformats/i386/amd64-mpx.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-mpx.dat amd64-mpx.c
amd64-mpx-linux.c : $(srcdir)/../regformats/i386/amd64-mpx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-mpx-linux.dat amd64-mpx-linux.c
x32.c : $(srcdir)/../regformats/i386/x32.dat $(regdat_sh)
@@ -703,6 +714,10 @@ x32-avx.c : $(srcdir)/../regformats/i386/x32-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx.dat x32-avx.c
x32-avx-linux.c : $(srcdir)/../regformats/i386/x32-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx-linux.dat x32-avx-linux.c
+x32-avx512.c : $(srcdir)/../regformats/i386/x32-avx512.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx512.dat x32-avx512.c
+x32-avx512-linux.c : $(srcdir)/../regformats/i386/x32-avx512-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx512-linux.dat x32-avx512-linux.c
reg-xtensa.c : $(srcdir)/../regformats/reg-xtensa.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-xtensa.dat reg-xtensa.c
reg-tilegx.c : $(srcdir)/../regformats/reg-tilegx.dat $(regdat_sh)
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index f4e6154..cc4f53d 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -24,20 +24,20 @@
# Default hostio_last_error implementation
srv_hostio_err_objs="hostio-errno.o"
-srv_i386_regobj="i386.o i386-avx.o i386-mpx.o i386-mmx.o"
-srv_i386_linux_regobj="i386-linux.o i386-avx-linux.o i386-mpx-linux.o i386-mmx-linux.o"
-srv_amd64_regobj="amd64.o amd64-avx.o amd64-mpx.o x32.o x32-avx.o"
-srv_amd64_linux_regobj="amd64-linux.o amd64-avx-linux.o amd64-mpx-linux.o x32-linux.o x32-avx-linux.o"
+srv_i386_regobj="i386.o i386-avx.o i386-avx512.o i386-mpx.o i386-mmx.o"
+srv_i386_linux_regobj="i386-linux.o i386-avx-linux.o i386-avx512-linux.o i386-mpx-linux.o i386-mmx-linux.o"
+srv_amd64_regobj="amd64.o amd64-avx.o amd64-avx512.o amd64-mpx.o x32.o x32-avx.o x32-avx512.o"
+srv_amd64_linux_regobj="amd64-linux.o amd64-avx-linux.o amd64-avx512-linux.o amd64-mpx-linux.o x32-linux.o x32-avx-linux.o x32-avx512-linux.o"
ipa_i386_linux_regobj=i386-linux-ipa.o
ipa_amd64_linux_regobj=amd64-linux-ipa.o
-srv_i386_32bit_xmlfiles="i386/32bit-core.xml i386/32bit-sse.xml i386/32bit-avx.xml i386/32bit-mpx.xml"
-srv_i386_64bit_xmlfiles="i386/64bit-core.xml i386/64bit-sse.xml i386/64bit-avx.xml i386/x32-core.xml i386/64bit-mpx.xml"
-srv_i386_xmlfiles="i386/i386.xml i386/i386-avx.xml i386/i386-mpx.xml i386/i386-mmx.xml $srv_i386_32bit_xmlfiles"
-srv_amd64_xmlfiles="i386/amd64.xml i386/amd64-avx.xml i386/x32.xml i386/x32-avx.xml i386/amd64-mpx.xml $srv_i386_64bit_xmlfiles"
-srv_i386_linux_xmlfiles="i386/i386-linux.xml i386/i386-avx-linux.xml i386/i386-mmx-linux.xml i386/32bit-linux.xml i386/i386-mpx-linux.xml $srv_i386_32bit_xmlfiles"
-srv_amd64_linux_xmlfiles="i386/amd64-linux.xml i386/amd64-avx-linux.xml i386/64bit-linux.xml i386/amd64-mpx-linux.xml i386/x32-linux.xml i386/x32-avx-linux.xml $srv_i386_64bit_xmlfiles"
+srv_i386_32bit_xmlfiles="i386/32bit-core.xml i386/32bit-sse.xml i386/32bit-avx.xml i386/32bit-avx512.xml i386/32bit-mpx.xml"
+srv_i386_64bit_xmlfiles="i386/64bit-core.xml i386/64bit-sse.xml i386/64bit-avx.xml i386/64bit-avx512.xml i386/x32-core.xml i386/64bit-mpx.xml"
+srv_i386_xmlfiles="i386/i386.xml i386/i386-avx.xml i386/i386-avx512.xml i386/i386-mpx.xml i386/i386-mmx.xml $srv_i386_32bit_xmlfiles"
+srv_amd64_xmlfiles="i386/amd64.xml i386/amd64-avx.xml i386/amd64-avx512.xml i386/x32.xml i386/x32-avx.xml i386/x32-avx512.xml i386/amd64-mpx.xml $srv_i386_64bit_xmlfiles"
+srv_i386_linux_xmlfiles="i386/i386-linux.xml i386/i386-avx-linux.xml i386/i386-avx512-linux.xml i386/i386-mmx-linux.xml i386/32bit-linux.xml i386/i386-mpx-linux.xml $srv_i386_32bit_xmlfiles"
+srv_amd64_linux_xmlfiles="i386/amd64-linux.xml i386/amd64-avx-linux.xml i386/amd64-avx512-linux.xml i386/64bit-linux.xml i386/amd64-mpx-linux.xml i386/x32-linux.xml i386/x32-avx-linux.xml i386/x32-avx512-linux.xml $srv_i386_64bit_xmlfiles"
# Linux object files. This is so we don't have to repeat
diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
index e655f74..c2d0bdf 100644
--- a/gdb/gdbserver/i387-fp.c
+++ b/gdb/gdbserver/i387-fp.c
@@ -22,6 +22,11 @@
static const int num_mpx_bnd_registers = 4;
static const int num_mpx_cfg_registers = 2;
+static const int num_avx512_k_registers = 8;
+static const int num_avx512_zmmh_low_registers = 16;
+static const int num_avx512_zmmh_high_registers = 16;
+static const int num_avx512_ymmh_registers = 16;
+static const int num_avx512_xmm_registers = 16;
/* Note: These functions preserve the reserved bits in control registers.
However, gdbserver promptly throws away that information. */
@@ -120,6 +125,17 @@ struct i387_xsave {
/* Space for 2 MPX configuration registers of 64 bits
plus reserved space. */
unsigned char mpx_cfg_space[16];
+
+ unsigned char reserved5[48];
+
+ /* Space for 8 OpMask register values of 64 bits. */
+ unsigned char k_space[64];
+
+ /* Space for 16 256-bit zmm0-15. */
+ unsigned char zmmh_low_space[512];
+
+ /* Space for 16 512-bit zmm16-31 values. */
+ unsigned char zmmh_high_space[1024];
};
void
@@ -259,7 +275,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
unsigned long val, val2;
unsigned int clear_bv;
unsigned long long xstate_bv = 0;
- char raw[16];
+ char raw[64];
char *p;
/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
@@ -291,6 +307,24 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
if ((clear_bv & I386_XSTATE_BNDCFG))
for (i = 0; i < num_mpx_cfg_registers; i++)
memset (((char *) &fp->mpx_cfg_space[0]) + i * 8, 0, 8);
+
+ if ((clear_bv & I386_XSTATE_K))
+ for (i = 0; i < num_avx512_k_registers; i++)
+ memset (((char *) &fp->k_space[0]) + i * 8, 0, 8);
+
+ if ((clear_bv & I386_XSTATE_ZMM_H))
+ for (i = 0; i < num_avx512_zmmh_low_registers; i++)
+ memset (((char *) &fp->zmmh_low_space[0]) + i * 32, 0, 32);
+
+ if ((clear_bv & I386_XSTATE_ZMM))
+ {
+ for (i = 0; i < num_avx512_zmmh_high_registers; i++)
+ memset (((char *) &fp->zmmh_low_space[0]) + 32 + i * 64, 0, 32);
+ for (i = 0; i < num_avx512_xmm_registers; i++)
+ memset (((char *) &fp->zmmh_high_space[0]) + i * 64, 0, 16);
+ for (i = 0; i < num_avx512_ymmh_registers; i++)
+ memset (((char *) &fp->zmmh_high_space[0]) + 16 + i * 64, 0, 16);
+ }
}
/* Check if any x87 registers are changed. */
@@ -378,6 +412,91 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
}
}
+ /* Check if any K registers are changed. */
+ if ((x86_xcr0 & I386_XSTATE_K))
+ {
+ int k0_regnum = find_regno (regcache->tdesc, "k0");
+
+ for (i = 0; i < num_avx512_k_registers; i++)
+ {
+ collect_register (regcache, i + k0_regnum, raw);
+ p = ((char *) &fp->k_space[0]) + i * 8;
+ if (memcmp (raw, p, 8) != 0)
+ {
+ xstate_bv |= I386_XSTATE_K;
+ memcpy (p, raw, 8);
+ }
+ }
+ }
+
+ /* Check if any of ZMM0H-ZMM15H registers are changed. */
+ if ((x86_xcr0 & I386_XSTATE_ZMM_H))
+ {
+ int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
+
+ for (i = 0; i < num_avx512_zmmh_low_registers; i++)
+ {
+ collect_register (regcache, i + zmm0h_regnum, raw);
+ p = ((char *) &fp->zmmh_low_space[0]) + i * 32;
+ if (memcmp (raw, p, 32) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM_H;
+ memcpy (p, raw, 32);
+ }
+ }
+ }
+
+ /* Check if any of ZMM16H-ZMM31H registers are changed. */
+ if ((x86_xcr0 & I386_XSTATE_ZMM))
+ {
+ int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
+
+ for (i = 0; i < num_avx512_zmmh_high_registers; i++)
+ {
+ collect_register (regcache, i + zmm16h_regnum, raw);
+ p = ((char *) &fp->zmmh_low_space[0]) + 32 + i * 64;
+ if (memcmp (raw, p, 32) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 32);
+ }
+ }
+ }
+
+ /* Check if any XMM_AVX512 registers are changed. */
+ if ((x86_xcr0 & I386_XSTATE_ZMM))
+ {
+ int xmm_avx512_regnum = find_regno (regcache->tdesc, "xmm16");
+
+ for (i = 0; i < num_avx512_xmm_registers; i++)
+ {
+ collect_register (regcache, i + xmm_avx512_regnum, raw);
+ p = ((char *) &fp->zmmh_high_space[0]) + i * 64;
+ if (memcmp (raw, p, 16) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 16);
+ }
+ }
+ }
+
+ /* Check if any YMMH_AVX512 registers are changed. */
+ if ((x86_xcr0 & I386_XSTATE_ZMM))
+ {
+ int ymmh_avx512_regnum = find_regno (regcache->tdesc, "ymm16h");
+
+ for (i = 0; i < num_avx512_ymmh_registers; i++)
+ {
+ collect_register (regcache, i + ymmh_avx512_regnum, raw);
+ p = ((char *) &fp->zmmh_high_space[0]) + 16 + i * 64;
+ if (memcmp (raw, p, 16) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 16);
+ }
+ }
+ }
+
/* Update the corresponding bits in xstate_bv if any SSE/AVX
registers are changed. */
fp->xstate_bv |= xstate_bv;
@@ -621,6 +740,67 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
}
+ if ((x86_xcr0 & I386_XSTATE_K) != 0)
+ {
+ int k0_regnum = find_regno (regcache->tdesc, "k0");
+
+ if ((clear_bv & I386_XSTATE_K) != 0)
+ {
+ for (i = 0; i < num_avx512_k_registers; i++)
+ supply_register_zeroed (regcache, i + k0_regnum);
+ }
+ else
+ {
+ p = (gdb_byte *) &fp->k_space[0];
+ for (i = 0; i < num_avx512_k_registers; i++)
+ supply_register (regcache, i + k0_regnum, p + i * 8);
+ }
+ }
+
+ if ((x86_xcr0 & I386_XSTATE_ZMM_H) != 0)
+ {
+ int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
+
+ if ((clear_bv & I386_XSTATE_ZMM_H) != 0)
+ {
+ for (i = 0; i < num_avx512_zmmh_low_registers; i++)
+ supply_register_zeroed (regcache, i + zmm0h_regnum);
+ }
+ else
+ {
+ p = (gdb_byte *) &fp->zmmh_low_space[0];
+ for (i = 0; i < num_avx512_zmmh_low_registers; i++)
+ supply_register (regcache, i + zmm0h_regnum, p + i * 32);
+ }
+ }
+
+ if ((x86_xcr0 & I386_XSTATE_ZMM) != 0)
+ {
+ int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
+ int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h");
+ int xmm16_regnum = find_regno (regcache->tdesc, "xmm16");
+
+ if ((clear_bv & I386_XSTATE_ZMM) != 0)
+ {
+ for (i = 0; i < num_avx512_zmmh_high_registers; i++)
+ supply_register_zeroed (regcache, i + zmm16h_regnum);
+ for (i = 0; i < num_avx512_ymmh_registers; i++)
+ supply_register_zeroed (regcache, i + ymm16h_regnum);
+ for (i = 0; i < num_avx512_xmm_registers; i++)
+ supply_register_zeroed (regcache, i + xmm16_regnum);
+ }
+ else
+ {
+ p = (gdb_byte *) &fp->zmmh_high_space[0];
+ for (i = 0; i < num_avx512_zmmh_high_registers; i++)
+ supply_register (regcache, i + zmm16h_regnum, p + 32 + i * 64);
+ for (i = 0; i < num_avx512_ymmh_registers; i++)
+ supply_register (regcache, i + ymm16h_regnum, p + 16 + i * 64);
+ for (i = 0; i < num_avx512_xmm_registers; i++)
+ supply_register (regcache, i + xmm16_regnum, p + i * 64);
+ }
+ }
+
supply_register_by_name (regcache, "fioff", &fp->fioff);
supply_register_by_name (regcache, "fooff", &fp->fooff);
supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
diff --git a/gdb/gdbserver/linux-x86-low.c b/gdb/gdbserver/linux-x86-low.c
index 33b5f26..fa79ad4 100644
--- a/gdb/gdbserver/linux-x86-low.c
+++ b/gdb/gdbserver/linux-x86-low.c
@@ -48,6 +48,10 @@ extern const struct target_desc *tdesc_amd64_linux;
void init_registers_amd64_avx_linux (void);
extern const struct target_desc *tdesc_amd64_avx_linux;
+/* Defined in auto-generated file amd64-avx512-linux.c. */
+void init_registers_amd64_avx512_linux (void);
+extern const struct target_desc *tdesc_amd64_avx512_linux;
+
/* Defined in auto-generated file amd64-mpx-linux.c. */
void init_registers_amd64_mpx_linux (void);
extern const struct target_desc *tdesc_amd64_mpx_linux;
@@ -60,6 +64,10 @@ extern const struct target_desc *tdesc_x32_linux;
void init_registers_x32_avx_linux (void);
extern const struct target_desc *tdesc_x32_avx_linux;
+/* Defined in auto-generated file x32-avx512-linux.c. */
+void init_registers_x32_avx512_linux (void);
+extern const struct target_desc *tdesc_x32_avx512_linux;
+
#endif
/* Defined in auto-generated file i386-linux.c. */
@@ -74,6 +82,10 @@ extern const struct target_desc *tdesc_i386_mmx_linux;
void init_registers_i386_avx_linux (void);
extern const struct target_desc *tdesc_i386_avx_linux;
+/* Defined in auto-generated file i386-avx512-linux.c. */
+void init_registers_i386_avx512_linux (void);
+extern const struct target_desc *tdesc_i386_avx512_linux;
+
/* Defined in auto-generated file i386-mpx-linux.c. */
void init_registers_i386_mpx_linux (void);
extern const struct target_desc *tdesc_i386_mpx_linux;
@@ -181,7 +193,16 @@ static const int x86_64_regmap[] =
-1, -1, -1, -1, -1, -1, -1, -1,
ORIG_RAX * 8,
-1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
- -1, -1 /* MPX registers BNDCFGU, BNDSTATUS. */
+ -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1
};
#define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
@@ -1343,6 +1364,9 @@ x86_linux_read_description (void)
{
switch (xcr0 & I386_XSTATE_ALL_MASK)
{
+ case I386_XSTATE_AVX512_MASK:
+ return tdesc_amd64_avx512_linux;
+
case I386_XSTATE_MPX_MASK:
return tdesc_amd64_mpx_linux;
@@ -1362,6 +1386,9 @@ x86_linux_read_description (void)
{
switch (xcr0 & I386_XSTATE_ALL_MASK)
{
+ case I386_XSTATE_AVX512_MASK:
+ return tdesc_x32_avx512_linux;
+
case I386_XSTATE_MPX_MASK: /* No MPX on x32. */
case I386_XSTATE_AVX_MASK:
return tdesc_x32_avx_linux;
@@ -1381,6 +1408,9 @@ x86_linux_read_description (void)
{
switch (xcr0 & I386_XSTATE_ALL_MASK)
{
+ case (I386_XSTATE_AVX512_MASK):
+ return tdesc_i386_avx512_linux;
+
case (I386_XSTATE_MPX_MASK):
return tdesc_i386_mpx_linux;
@@ -3387,10 +3417,12 @@ initialize_low_arch (void)
#ifdef __x86_64__
init_registers_amd64_linux ();
init_registers_amd64_avx_linux ();
+ init_registers_amd64_avx512_linux ();
init_registers_amd64_mpx_linux ();
init_registers_x32_linux ();
init_registers_x32_avx_linux ();
+ init_registers_x32_avx512_linux ();
tdesc_amd64_linux_no_xml = xmalloc (sizeof (struct target_desc));
copy_target_description (tdesc_amd64_linux_no_xml, tdesc_amd64_linux);
@@ -3399,6 +3431,7 @@ initialize_low_arch (void)
init_registers_i386_linux ();
init_registers_i386_mmx_linux ();
init_registers_i386_avx_linux ();
+ init_registers_i386_avx512_linux ();
init_registers_i386_mpx_linux ();
tdesc_i386_linux_no_xml = xmalloc (sizeof (struct target_desc));
--
1.8.4.2
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH V5 0/3] Intel(R) AVX-512 register support
@ 2014-04-23 13:03 Michael Sturm
2014-04-23 13:03 ` [PATCH V5 3/3] Add AVX512 feature description to GDB manual Michael Sturm
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Michael Sturm @ 2014-04-23 13:03 UTC (permalink / raw)
To: palves, eliz, mark.kettenis, walfred.tedeschi; +Cc: gdb-patches, Michael Sturm
Pedro,
thanks for your review. We've addressed the comments you made regarding the
test case and the manual content. We do agree to your comment
regarding sharing code between GDB and GDBserver. We would prefer to
make this change in a patch dedicated to unify XSAVE buffer access
between GDB and GDBserver.
Would you agree to that and approve committing this series?
Thanks and regards,
Michael and Fred.
This patch series adds support for the Intel(R) Advanced Vector Extensions 512
(Intel(R) AVX-512) registers. Native and remote debugging are covered by this
patch series.
Intel(R) AVX-512 is an extension to AVX to support 512-bit wide SIMD registers
in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31). The number of available
registers in 32-bit mode is still 8 (XMM0-7, YMM0-7, ZMM0-7). The lower
256-bits of the ZMM registers are aliased to the respective 256-bit YMM
registers. The lower 128-bits are aliased to the respective 128-bit XMM
registers.
There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit mode
and 64-bit mode.
For more information please see
Intel(R) Developer Zone: Intel(R) AVX
http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495
Intel(R) Architecture Instruction Set Extensions Programming Reference:
http://software.intel.com/en-us/file/319433-017pdf
Changes between V4 and V5:
* Addressed comment by Pedro:
i386-avx512.c: Fixed formatting to follow GNU coding style. Removed
depdendency to stdio.h.
i386-avx512.exp: Changed test for AVX512 CPU support to probe test
following Pedro's proposal. Fixed indentation.
gdb.textinfo: Changed wording to makeit clearer which of the new
registers are present in 64-bit mode only.
Changes between V3 and V4:
* Addressed comments by Pedro:
All: Fixed year in copyright notice .
i386-linux-tdep.h: Added parens to I386_LINUX_ORIG_EAX_REGNUM define.
i386-tdep.c: Removed spurious new line.
Several places: Compare return value of memcmp to 0.
i386-avx512.exp: Chanegs to ensure test case returns "unsupported" on
machines that don't have AVX-512. Redesigned test case.
i386-avx512.c: Changes following redesign of test case.
Changes between V2 and V3:
* Following feeback by Mark Kettenis, the follwing changes were made
in i386-tdep.c:
Changed a reference to "amd64" to "in 64-bit mode" in the comment
explaining the need for a constant. Also, refactored is_AVX512,
is_AVX, is_SSE in i386_register_reggroup_p to avx512_p, avx_p, sse_p.
Changes between V1 and V2:
* Following feedback by Pedro Alves, i386-avx512.exp now using
gdb_test_multiple when checking if AVX512 is supported by the
CPU. If CPU does not support AVX512, return unsupported.
Simplified test as timeout is handled by framework. Added newline
at the end of file.
Note:
* Documentation patch V1 already approved by Eli.
* AVX512 register patch for GDB V3 pre-approved by Mark.
* Add AVX512 register support to gdbserver V3 approved by Pedro.
Michael Sturm (3):
Add AVX512 registers support to GDB.
Add AVX512 register support to gdbserver.
Add AVX512 feature description to GDB manual
gdb/NEWS | 5 +
gdb/amd64-linux-nat.c | 19 +-
gdb/amd64-linux-tdep.c | 23 +-
gdb/amd64-linux-tdep.h | 5 +-
gdb/amd64-tdep.c | 80 +++++
gdb/amd64-tdep.h | 12 +-
gdb/common/i386-xstate.h | 20 +-
gdb/doc/gdb.texinfo | 34 +++
gdb/features/Makefile | 22 ++
gdb/features/i386/32bit-avx512.xml | 30 ++
gdb/features/i386/64bit-avx512.xml | 102 +++++++
gdb/features/i386/amd64-avx512-linux.c | 321 ++++++++++++++++++++
gdb/features/i386/amd64-avx512-linux.xml | 20 ++
gdb/features/i386/amd64-avx512.c | 316 ++++++++++++++++++++
gdb/features/i386/amd64-avx512.xml | 18 ++
gdb/features/i386/i386-avx512-linux.c | 208 +++++++++++++
gdb/features/i386/i386-avx512-linux.xml | 20 ++
gdb/features/i386/i386-avx512.c | 203 +++++++++++++
gdb/features/i386/i386-avx512.xml | 18 ++
gdb/features/i386/x32-avx512-linux.c | 321 ++++++++++++++++++++
gdb/features/i386/x32-avx512-linux.xml | 20 ++
gdb/features/i386/x32-avx512.c | 316 ++++++++++++++++++++
gdb/features/i386/x32-avx512.xml | 18 ++
gdb/gdbserver/Makefile.in | 19 +-
gdb/gdbserver/configure.srv | 20 +-
gdb/gdbserver/i387-fp.c | 182 ++++++++++-
gdb/gdbserver/linux-x86-low.c | 35 ++-
gdb/i386-linux-nat.c | 5 +-
gdb/i386-linux-tdep.c | 16 +-
gdb/i386-linux-tdep.h | 7 +-
gdb/i386-tdep.c | 465 +++++++++++++++++++++++++++--
gdb/i386-tdep.h | 64 +++-
gdb/i387-tdep.c | 384 +++++++++++++++++++++++-
gdb/i387-tdep.h | 21 ++
gdb/regformats/i386/amd64-avx512-linux.dat | 156 ++++++++++
gdb/regformats/i386/amd64-avx512.dat | 155 ++++++++++
gdb/regformats/i386/i386-avx512-linux.dat | 76 +++++
gdb/regformats/i386/i386-avx512.dat | 75 +++++
gdb/regformats/i386/x32-avx512-linux.dat | 156 ++++++++++
gdb/regformats/i386/x32-avx512.dat | 155 ++++++++++
gdb/testsuite/gdb.arch/Makefile.in | 2 +-
gdb/testsuite/gdb.arch/i386-avx512.c | 255 ++++++++++++++++
gdb/testsuite/gdb.arch/i386-avx512.exp | 177 +++++++++++
43 files changed, 4515 insertions(+), 61 deletions(-)
create mode 100644 gdb/features/i386/32bit-avx512.xml
create mode 100644 gdb/features/i386/64bit-avx512.xml
create mode 100644 gdb/features/i386/amd64-avx512-linux.c
create mode 100644 gdb/features/i386/amd64-avx512-linux.xml
create mode 100644 gdb/features/i386/amd64-avx512.c
create mode 100644 gdb/features/i386/amd64-avx512.xml
create mode 100644 gdb/features/i386/i386-avx512-linux.c
create mode 100644 gdb/features/i386/i386-avx512-linux.xml
create mode 100644 gdb/features/i386/i386-avx512.c
create mode 100644 gdb/features/i386/i386-avx512.xml
create mode 100644 gdb/features/i386/x32-avx512-linux.c
create mode 100644 gdb/features/i386/x32-avx512-linux.xml
create mode 100644 gdb/features/i386/x32-avx512.c
create mode 100644 gdb/features/i386/x32-avx512.xml
create mode 100644 gdb/regformats/i386/amd64-avx512-linux.dat
create mode 100644 gdb/regformats/i386/amd64-avx512.dat
create mode 100644 gdb/regformats/i386/i386-avx512-linux.dat
create mode 100644 gdb/regformats/i386/i386-avx512.dat
create mode 100644 gdb/regformats/i386/x32-avx512-linux.dat
create mode 100644 gdb/regformats/i386/x32-avx512.dat
create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.c
create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.exp
--
1.8.4.2
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH V5 1/3] Add AVX512 registers support to GDB.
2014-04-23 13:03 [PATCH V5 0/3] Intel(R) AVX-512 register support Michael Sturm
2014-04-23 13:03 ` [PATCH V5 3/3] Add AVX512 feature description to GDB manual Michael Sturm
2014-04-23 13:03 ` [PATCH V5 2/3] Add AVX512 register support to gdbserver Michael Sturm
@ 2014-04-23 13:04 ` Michael Sturm
2014-04-24 11:33 ` Pedro Alves
2014-04-24 11:48 ` Pedro Alves
2014-04-24 11:49 ` [PATCH V5 0/3] Intel(R) AVX-512 register support Pedro Alves
3 siblings, 2 replies; 16+ messages in thread
From: Michael Sturm @ 2014-04-23 13:04 UTC (permalink / raw)
To: palves, eliz, mark.kettenis, walfred.tedeschi; +Cc: gdb-patches, Michael Sturm
2013-09-11 Michael Sturm <michael.sturm@mintel.com>
Walfred Tedeschi <walfred.tedeschi@intel.com>
* amd64-linux-nat.c (amd64_linux_gregset32_reg_offset): Add
AVX512 registers.
(amd64_linux_read_description): Add code to handle AVX512 xstate
mask and return respective tdesc.
* amd64-linux-tdep.c: Include features/i386/amd64-avx512-linux.c
and features/i386/x32-avx512-linux.c.
(amd64_linux_gregset_reg_offset): Add AVX512 registers.
(amd64_linux_core_read_description): Add code to handle AVX512
xstate mask and return respective tdesc.
(_initialize_amd64_linux_tdep): Initialize AVX512 tdesc.
* amd64-linux-tdep.h (AMD64_LINUX_ORIG_RAX_REGNUM): Adjust regnum
calculation.
(AMD64_LINUX_NUM_REGS): Adjust to new number of registers.
(tdesc_amd64_avx512_linux): New prototype.
(tdesc_x32_avx512_linux): Likewise.
* amd64-tdep.c: Include features/i386/amd64-avx512.c and
features/i386/x32-avx512.c.
(amd64_ymm_avx512_names): New register names for pseudo
registers YMM16-31.
(amd64_ymmh_avx512_names): New register names for raw registers
YMMH16-31.
(amd64_k_names): New register names for K registers.
(amd64_zmmh_names): New register names for ZMM raw registers.
(amd64_zmm_names): New registers names for ZMM pseudo registers.
(amd64_xmm_avx512_names): New register names for XMM16-31
registers.
(amd64_pseudo_register_name): Add code to return AVX512 pseudo
registers.
(amd64_init_abi): Add code to intitialize AVX512 tdep variables
if feature is present.
(_initialize_amd64_tdep): Call AVX512 tdesc initializers.
* amd64-tdep.h (enum amd64_regnum): Add AVX512 registers.
(AMD64_NUM_REGS): Adjust to new number of registers.
* i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Extend range of
registers supplied via XSTATE by AVX512 registers.
(i386_linux_read_description): Add case for AVX512.
* i386-linux-tdep.c: Include i386-avx512-linux.c.
(i386_linux_gregset_reg_offset): Add AVX512 registers.
(i386_linux_core_read_description): Add case for AVX512.
(i386_linux_init_abi): Install supported register note section
for AVX512.
(_initialize_i386_linux_tdep): Add call to tdesc init function for
AVX512.
* i386-linux-tdep.h (I386_LINUX_NUM_REGS): Set number of
registers to be number of zmm7h + 1.
(tdesc_i386_avx512_linux): Add tdesc for AVX512 registers.
* i386-tdep.c: Include features/i386/i386-avx512.c.
(i386_zmm_names): Add ZMM pseudo register names array.
(i386_zmmh_names): Add ZMM raw register names array.
(i386_k_names): Add K raw register names array.
(num_lower_zmm_regs): Add constant for the number of lower ZMM
registers. AVX512 has 16 more ZMM registers than there are YMM
registers.
(i386_zmmh_regnum_p): Add function to look up register number of
ZMM raw registers.
(i386_zmm_regnum_p): Likewise for ZMM pseudo registers.
(i386_k_regnum_p): Likewise for K raw registers.
(i386_ymmh_avx512_regnum_p): Likewise for additional YMM raw
registers added by AVX512.
(i386_ymm_avx512_regnum_p): Likewise for additional YMM pseudo
registers added by AVX512.
(i386_xmm_avx512_regnum_p): Likewise for additional XMM registers
added by AVX512.
(i386_register_name): Add code to hide YMMH16-31 and ZMMH0-31.
(i386_pseudo_register_name): Add ZMM pseudo registers.
(i386_zmm_type): Construct and return vector registers type for ZMM
registers.
(i386_pseudo_register_type): Return appropriate type for YMM16-31,
ZMM0-31 pseudo registers and K registers.
(i386_pseudo_register_read_into_value): Add code to read K, ZMM
and YMM16-31 registers from register cache.
(i386_pseudo_register_write): Add code to write K, ZMM and
YMM16-31 registers.
(i386_register_reggroup_p): Add code to include/exclude AVX512
registers in/from respective register groups.
(i386_validate_tdesc_p): Handle AVX512 feature, add AVX512
registers if feature is present in xcr0.
(i386_gdbarch_init): Add code to initialize AVX512 feature
variables in tdep structure, wire in pseudo registers and call
initialize_tdesc_i386_avx512.
* i386-tdep.h (struct gdbarch_tdep): Add AVX512 related
variables.
(i386_regnum): Add AVX512 registers.
(I386_SSE_NUM_REGS): New define for number of SSE registers.
(I386_AVX_NUM_REGS): Likewise for AVX registers.
(I386_AVX512_NUM_REGS): Likewise for AVX512 registers.
(I386_MAX_REGISTER_SIZE): Change to 64 bytes, ZMM registers are
512 bits wide.
(i386_xmm_avx512_regnum_p): New prototype for register look up.
(i386_ymm_avx512_regnum_p): Likewise.
(i386_k_regnum_p): Likewise.
(i386_zmm_regnum_p): Likewise.
(i386_zmmh_regnum_p): Likewise.
* i387-tdep.c : Update year in copyright notice.
(xsave_ymm_avx512_offset): New table for YMM16-31 offsets in
XSAVE buffer.
(XSAVE_YMM_AVX512_ADDR): New macro.
(xsave_xmm_avx512_offset): New table for XMM16-31 offsets in
XSAVE buffer.
(XSAVE_XMM_AVX512_ADDR): New macro.
(xsave_avx512_k_offset): New table for K register offsets in
XSAVE buffer.
(XSAVE_AVX512_K_ADDR): New macro.
(xsave_avx512_zmm_h_offset): New table for ZMM register offsets
in XSAVE buffer.
(XSAVE_AVX512_ZMM_H_ADDR): New macro.
(i387_supply_xsave): Add code to supply AVX512 registers to XSAVE
buffer.
(i387_collect_xsave): Add code to collect AVX512 registers from
XSAVE buffer.
* i387-tdep.h (I387_NUM_XMM_AVX512_REGS): New define for number
of XMM16-31 registers.
(I387_NUM_K_REGS): New define for number of K registers.
(I387_K0_REGNUM): New define for K0 register number.
(I387_NUM_ZMMH_REGS): New define for number of ZMMH registers.
(I387_ZMM0H_REGNUM): New define for ZMM0H register number.
(I387_NUM_YMM_AVX512_REGS): New define for number of YMM16-31
registers.
(I387_YMM16H_REGNUM): New define for YMM16H register number.
(I387_XMM16_REGNUM): New define for XMM16 register number.
(I387_YMM0_REGNUM): New define for YMM0 register number.
(I387_KEND_REGNUM): New define for last K register number.
(I387_ZMMENDH_REGNUM): New define for last ZMMH register number.
(I387_YMMH_AVX512_END_REGNUM): New define for YMM31 register
number.
(I387_XMM_AVX512_END_REGNUM): New define for XMM31 register
number.
* common/i386-xstate.h: Add AVX 3.1 feature bits, mask and XSTATE
size.
* features/Makefile: Add AVX512 related files.
* features/i386/32bit-avx512.xml: New file.
* features/i386/64bit-avx512.xml: Likewise.
* features/i386/amd64-avx512-linux.c: Likewise.
* features/i386/amd64-avx512-linux.xml: Likewise.
* features/i386/amd64-avx512.c: Likewise.
* features/i386/amd64-avx512.xml: Likewise.
* features/i386/i386-avx512-linux.c: Likewise.
* features/i386/i386-avx512-linux.xml: Likewise.
* features/i386/i386-avx512.c: Likewise.
* features/i386/i386-avx512.xml: Likewise.
* features/i386/x32-avx512-linux.c: Likewise.
* features/i386/x32-avx512-linux.xml: Likewise.
* features/i386/x32-avx512.c: Likewise.
* features/i386/x32-avx512.xml: Likewise.
* regformats/i386/amd64-avx512-linux.dat: New file.
* regformats/i386/amd64-avx512.dat: Likewise.
* regformats/i386/i386-avx512-linux.dat: Likewise.
* regformats/i386/i386-avx512.dat: Likewise.
* regformats/i386/x32-avx512-linux.dat: Likewise.
* regformats/i386/x32-avx512.dat: Likewise.
testsuite/
* Makefile.in (EXECUTABLES): Added i386-avx512.
* gdb.arch/i386-avx512.c: New file.
* gdb.arch/i386-avx512.exp: Likewise.
---
gdb/amd64-linux-nat.c | 19 +-
gdb/amd64-linux-tdep.c | 23 +-
gdb/amd64-linux-tdep.h | 5 +-
gdb/amd64-tdep.c | 80 +++++
gdb/amd64-tdep.h | 12 +-
gdb/common/i386-xstate.h | 20 +-
gdb/features/Makefile | 22 ++
gdb/features/i386/32bit-avx512.xml | 30 ++
gdb/features/i386/64bit-avx512.xml | 102 +++++++
gdb/features/i386/amd64-avx512-linux.c | 321 ++++++++++++++++++++
gdb/features/i386/amd64-avx512-linux.xml | 20 ++
gdb/features/i386/amd64-avx512.c | 316 ++++++++++++++++++++
gdb/features/i386/amd64-avx512.xml | 18 ++
gdb/features/i386/i386-avx512-linux.c | 208 +++++++++++++
gdb/features/i386/i386-avx512-linux.xml | 20 ++
gdb/features/i386/i386-avx512.c | 203 +++++++++++++
gdb/features/i386/i386-avx512.xml | 18 ++
gdb/features/i386/x32-avx512-linux.c | 321 ++++++++++++++++++++
gdb/features/i386/x32-avx512-linux.xml | 20 ++
gdb/features/i386/x32-avx512.c | 316 ++++++++++++++++++++
gdb/features/i386/x32-avx512.xml | 18 ++
gdb/i386-linux-nat.c | 5 +-
gdb/i386-linux-tdep.c | 16 +-
gdb/i386-linux-tdep.h | 7 +-
gdb/i386-tdep.c | 465 +++++++++++++++++++++++++++--
gdb/i386-tdep.h | 64 +++-
gdb/i387-tdep.c | 384 +++++++++++++++++++++++-
gdb/i387-tdep.h | 21 ++
gdb/regformats/i386/amd64-avx512-linux.dat | 156 ++++++++++
gdb/regformats/i386/amd64-avx512.dat | 155 ++++++++++
gdb/regformats/i386/i386-avx512-linux.dat | 76 +++++
gdb/regformats/i386/i386-avx512.dat | 75 +++++
gdb/regformats/i386/x32-avx512-linux.dat | 156 ++++++++++
gdb/regformats/i386/x32-avx512.dat | 155 ++++++++++
gdb/testsuite/gdb.arch/Makefile.in | 2 +-
gdb/testsuite/gdb.arch/i386-avx512.c | 255 ++++++++++++++++
gdb/testsuite/gdb.arch/i386-avx512.exp | 177 +++++++++++
37 files changed, 4234 insertions(+), 47 deletions(-)
create mode 100644 gdb/features/i386/32bit-avx512.xml
create mode 100644 gdb/features/i386/64bit-avx512.xml
create mode 100644 gdb/features/i386/amd64-avx512-linux.c
create mode 100644 gdb/features/i386/amd64-avx512-linux.xml
create mode 100644 gdb/features/i386/amd64-avx512.c
create mode 100644 gdb/features/i386/amd64-avx512.xml
create mode 100644 gdb/features/i386/i386-avx512-linux.c
create mode 100644 gdb/features/i386/i386-avx512-linux.xml
create mode 100644 gdb/features/i386/i386-avx512.c
create mode 100644 gdb/features/i386/i386-avx512.xml
create mode 100644 gdb/features/i386/x32-avx512-linux.c
create mode 100644 gdb/features/i386/x32-avx512-linux.xml
create mode 100644 gdb/features/i386/x32-avx512.c
create mode 100644 gdb/features/i386/x32-avx512.xml
create mode 100644 gdb/regformats/i386/amd64-avx512-linux.dat
create mode 100644 gdb/regformats/i386/amd64-avx512.dat
create mode 100644 gdb/regformats/i386/i386-avx512-linux.dat
create mode 100644 gdb/regformats/i386/i386-avx512.dat
create mode 100644 gdb/regformats/i386/x32-avx512-linux.dat
create mode 100644 gdb/regformats/i386/x32-avx512.dat
create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.c
create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.exp
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index b7b889b..06199af 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -100,9 +100,11 @@ static int amd64_linux_gregset32_reg_offset[] =
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
- -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
- -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
- ORIG_RAX * 8, /* "orig_eax" */
+ -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
+ -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
+ ORIG_RAX * 8 /* "orig_eax" */
};
\f
@@ -1101,6 +1103,17 @@ amd64_linux_read_description (struct target_ops *ops)
{
switch (xcr0 & I386_XSTATE_ALL_MASK)
{
+ case I386_XSTATE_MPX_AVX512_MASK:
+ case I386_XSTATE_AVX512_MASK:
+ if (is_64bit)
+ {
+ if (is_x32)
+ return tdesc_x32_avx512_linux;
+ else
+ return tdesc_amd64_avx512_linux;
+ }
+ else
+ return tdesc_i386_avx512_linux;
case I386_XSTATE_MPX_MASK:
if (is_64bit)
{
diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c
index d2a78f2..9699c12 100644
--- a/gdb/amd64-linux-tdep.c
+++ b/gdb/amd64-linux-tdep.c
@@ -43,8 +43,11 @@
#include "features/i386/amd64-linux.c"
#include "features/i386/amd64-avx-linux.c"
#include "features/i386/amd64-mpx-linux.c"
+#include "features/i386/amd64-avx512-linux.c"
+
#include "features/i386/x32-linux.c"
#include "features/i386/x32-avx-linux.c"
+#include "features/i386/x32-avx512-linux.c"
/* The syscall's XML filename for i386. */
#define XML_SYSCALL_FILENAME_AMD64 "syscalls/amd64-linux.xml"
@@ -99,7 +102,16 @@ int amd64_linux_gregset_reg_offset[] =
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
-1, -1, /* MPX registers BNDCFGU and BNDSTATUS. */
- 15 * 8 /* "orig_rax" */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ 15 * 8 /* "orig_rax" */
};
\f
@@ -1575,6 +1587,12 @@ amd64_linux_core_read_description (struct gdbarch *gdbarch,
switch (xcr0 & I386_XSTATE_ALL_MASK)
{
+ case I386_XSTATE_MPX_AVX512_MASK:
+ case I386_XSTATE_AVX512_MASK:
+ if (gdbarch_ptr_bit (gdbarch) == 32)
+ return tdesc_x32_avx512_linux;
+ else
+ return tdesc_amd64_avx512_linux;
case I386_XSTATE_MPX_MASK:
if (gdbarch_ptr_bit (gdbarch) == 32)
return tdesc_x32_avx_linux; /* No x32 MPX falling back to AVX. */
@@ -2083,6 +2101,9 @@ _initialize_amd64_linux_tdep (void)
initialize_tdesc_amd64_linux ();
initialize_tdesc_amd64_avx_linux ();
initialize_tdesc_amd64_mpx_linux ();
+ initialize_tdesc_amd64_avx512_linux ();
+
initialize_tdesc_x32_linux ();
initialize_tdesc_x32_avx_linux ();
+ initialize_tdesc_x32_avx512_linux ();
}
diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h
index 2c8e7bb..25563b8 100644
--- a/gdb/amd64-linux-tdep.h
+++ b/gdb/amd64-linux-tdep.h
@@ -26,7 +26,7 @@
/* Register number for the "orig_rax" register. If this register
contains a value >= 0 it is interpreted as the system call number
that the kernel is supposed to restart. */
-#define AMD64_LINUX_ORIG_RAX_REGNUM (AMD64_BNDSTATUS_REGNUM + 1)
+#define AMD64_LINUX_ORIG_RAX_REGNUM (AMD64_ZMM31H_REGNUM + 1)
/* Total number of registers for GNU/Linux. */
#define AMD64_LINUX_NUM_REGS (AMD64_LINUX_ORIG_RAX_REGNUM + 1)
@@ -35,8 +35,11 @@
extern struct target_desc *tdesc_amd64_linux;
extern struct target_desc *tdesc_amd64_avx_linux;
extern struct target_desc *tdesc_amd64_mpx_linux;
+extern struct target_desc *tdesc_amd64_avx512_linux;
+
extern struct target_desc *tdesc_x32_linux;
extern struct target_desc *tdesc_x32_avx_linux;
+extern struct target_desc *tdesc_x32_avx512_linux;
/* Enum that defines the syscall identifiers for amd64 linux.
Used for process record/replay, these will be translated into
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 72d748e..035b460 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -44,8 +44,11 @@
#include "features/i386/amd64.c"
#include "features/i386/amd64-avx.c"
#include "features/i386/amd64-mpx.c"
+#include "features/i386/amd64-avx512.c"
+
#include "features/i386/x32.c"
#include "features/i386/x32-avx.c"
+#include "features/i386/x32-avx512.c"
#include "ax.h"
#include "ax-gdb.h"
@@ -85,6 +88,14 @@ static const char *amd64_ymm_names[] =
"ymm12", "ymm13", "ymm14", "ymm15"
};
+static const char *amd64_ymm_avx512_names[] =
+{
+ "ymm16", "ymm17", "ymm18", "ymm19",
+ "ymm20", "ymm21", "ymm22", "ymm23",
+ "ymm24", "ymm25", "ymm26", "ymm27",
+ "ymm28", "ymm29", "ymm30", "ymm31"
+};
+
static const char *amd64_ymmh_names[] =
{
"ymm0h", "ymm1h", "ymm2h", "ymm3h",
@@ -93,11 +104,56 @@ static const char *amd64_ymmh_names[] =
"ymm12h", "ymm13h", "ymm14h", "ymm15h"
};
+static const char *amd64_ymmh_avx512_names[] =
+{
+ "ymm16h", "ymm17h", "ymm18h", "ymm19h",
+ "ymm20h", "ymm21h", "ymm22h", "ymm23h",
+ "ymm24h", "ymm25h", "ymm26h", "ymm27h",
+ "ymm28h", "ymm29h", "ymm30h", "ymm31h"
+};
+
static const char *amd64_mpx_names[] =
{
"bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
};
+static const char *amd64_k_names[] =
+{
+ "k0", "k1", "k2", "k3",
+ "k4", "k5", "k6", "k7"
+};
+
+static const char *amd64_zmmh_names[] =
+{
+ "zmm0h", "zmm1h", "zmm2h", "zmm3h",
+ "zmm4h", "zmm5h", "zmm6h", "zmm7h",
+ "zmm8h", "zmm9h", "zmm10h", "zmm11h",
+ "zmm12h", "zmm13h", "zmm14h", "zmm15h",
+ "zmm16h", "zmm17h", "zmm18h", "zmm19h",
+ "zmm20h", "zmm21h", "zmm22h", "zmm23h",
+ "zmm24h", "zmm25h", "zmm26h", "zmm27h",
+ "zmm28h", "zmm29h", "zmm30h", "zmm31h"
+};
+
+static const char *amd64_zmm_names[] =
+{
+ "zmm0", "zmm1", "zmm2", "zmm3",
+ "zmm4", "zmm5", "zmm6", "zmm7",
+ "zmm8", "zmm9", "zmm10", "zmm11",
+ "zmm12", "zmm13", "zmm14", "zmm15",
+ "zmm16", "zmm17", "zmm18", "zmm19",
+ "zmm20", "zmm21", "zmm22", "zmm23",
+ "zmm24", "zmm25", "zmm26", "zmm27",
+ "zmm28", "zmm29", "zmm30", "zmm31"
+};
+
+static const char *amd64_xmm_avx512_names[] = {
+ "xmm16", "xmm17", "xmm18", "xmm19",
+ "xmm20", "xmm21", "xmm22", "xmm23",
+ "xmm24", "xmm25", "xmm26", "xmm27",
+ "xmm28", "xmm29", "xmm30", "xmm31"
+};
+
/* DWARF Register Number Mapping as defined in the System V psABI,
section 3.6. */
@@ -272,8 +328,12 @@ amd64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (i386_byte_regnum_p (gdbarch, regnum))
return amd64_byte_names[regnum - tdep->al_regnum];
+ else if (i386_zmm_regnum_p (gdbarch, regnum))
+ return amd64_zmm_names[regnum - tdep->zmm0_regnum];
else if (i386_ymm_regnum_p (gdbarch, regnum))
return amd64_ymm_names[regnum - tdep->ymm0_regnum];
+ else if (i386_ymm_avx512_regnum_p (gdbarch, regnum))
+ return amd64_ymm_avx512_names[regnum - tdep->ymm16_regnum];
else if (i386_word_regnum_p (gdbarch, regnum))
return amd64_word_names[regnum - tdep->ax_regnum];
else if (i386_dword_regnum_p (gdbarch, regnum))
@@ -2920,6 +2980,23 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
tdep->num_core_regs = AMD64_NUM_GREGS + I387_NUM_REGS;
tdep->register_names = amd64_register_names;
+ if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512") != NULL)
+ {
+ tdep->zmmh_register_names = amd64_zmmh_names;
+ tdep->k_register_names = amd64_k_names;
+ tdep->xmm_avx512_register_names = amd64_xmm_avx512_names;
+ tdep->ymm16h_register_names = amd64_ymmh_avx512_names;
+
+ tdep->num_zmm_regs = 32;
+ tdep->num_xmm_avx512_regs = 16;
+ tdep->num_ymm_avx512_regs = 16;
+
+ tdep->zmm0h_regnum = AMD64_ZMM0H_REGNUM;
+ tdep->k0_regnum = AMD64_K0_REGNUM;
+ tdep->xmm16_regnum = AMD64_XMM16_REGNUM;
+ tdep->ymm16h_regnum = AMD64_YMM16H_REGNUM;
+ }
+
if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx") != NULL)
{
tdep->ymmh_register_names = amd64_ymmh_names;
@@ -3081,8 +3158,11 @@ _initialize_amd64_tdep (void)
initialize_tdesc_amd64 ();
initialize_tdesc_amd64_avx ();
initialize_tdesc_amd64_mpx ();
+ initialize_tdesc_amd64_avx512 ();
+
initialize_tdesc_x32 ();
initialize_tdesc_x32_avx ();
+ initialize_tdesc_x32_avx512 ();
}
\f
diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h
index 250c5dd..f1b039e 100644
--- a/gdb/amd64-tdep.h
+++ b/gdb/amd64-tdep.h
@@ -68,13 +68,21 @@ enum amd64_regnum
AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
AMD64_BNDCFGU_REGNUM,
- AMD64_BNDSTATUS_REGNUM
+ AMD64_BNDSTATUS_REGNUM,
+ AMD64_XMM16_REGNUM,
+ AMD64_XMM31_REGNUM = AMD64_XMM16_REGNUM + 15,
+ AMD64_YMM16H_REGNUM,
+ AMD64_YMM31H_REGNUM = AMD64_YMM16H_REGNUM + 15,
+ AMD64_K0_REGNUM,
+ AMD64_K7_REGNUM = AMD64_K0_REGNUM + 7,
+ AMD64_ZMM0H_REGNUM,
+ AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31
};
/* Number of general purpose registers. */
#define AMD64_NUM_GREGS 24
-#define AMD64_NUM_REGS (AMD64_BNDSTATUS_REGNUM + 1)
+#define AMD64_NUM_REGS (AMD64_ZMM31H_REGNUM + 1)
extern struct displaced_step_closure *amd64_displaced_step_copy_insn
(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
diff --git a/gdb/common/i386-xstate.h b/gdb/common/i386-xstate.h
index 3638142..610eaa1 100644
--- a/gdb/common/i386-xstate.h
+++ b/gdb/common/i386-xstate.h
@@ -28,28 +28,40 @@
#define I386_XSTATE_BNDCFG (1ULL << 4)
#define I386_XSTATE_MPX (I386_XSTATE_BNDREGS | I386_XSTATE_BNDCFG)
+/* AVX 512 adds three feature bits. All three must be enabled. */
+#define I386_XSTATE_K (1ULL << 5)
+#define I386_XSTATE_ZMM_H (1ULL << 6)
+#define I386_XSTATE_ZMM (1ULL << 7)
+#define I386_XSTATE_AVX512 (I386_XSTATE_K | I386_XSTATE_ZMM_H \
+ | I386_XSTATE_ZMM)
+
/* Supported mask and size of the extended state. */
#define I386_XSTATE_X87_MASK I386_XSTATE_X87
#define I386_XSTATE_SSE_MASK (I386_XSTATE_X87 | I386_XSTATE_SSE)
#define I386_XSTATE_AVX_MASK (I386_XSTATE_SSE_MASK | I386_XSTATE_AVX)
#define I386_XSTATE_MPX_MASK (I386_XSTATE_AVX_MASK | I386_XSTATE_MPX)
+#define I386_XSTATE_AVX512_MASK (I386_XSTATE_AVX_MASK | I386_XSTATE_AVX512)
+#define I386_XSTATE_MPX_AVX512_MASK (I386_XSTATE_MPX_MASK | I386_XSTATE_AVX512)
-#define I386_XSTATE_ALL_MASK I386_XSTATE_MPX_MASK
+#define I386_XSTATE_ALL_MASK (I386_XSTATE_MPX_AVX512_MASK)
#define I386_XSTATE_SSE_SIZE 576
#define I386_XSTATE_AVX_SIZE 832
#define I386_XSTATE_BNDREGS_SIZE 1024
#define I386_XSTATE_BNDCFG_SIZE 1088
+#define I386_XSTATE_AVX512_SIZE 2688
+#define I386_XSTATE_MAX_SIZE 2688
-#define I386_XSTATE_MAX_SIZE 1088
/* In case one of the MPX XCR0 bits is set we consider we have MPX. */
#define HAS_MPX(XCR0) (((XCR0) & I386_XSTATE_MPX) != 0)
#define HAS_AVX(XCR0) (((XCR0) & I386_XSTATE_AVX) != 0)
+#define HAS_AVX512(XCR0) (((XCR0) & I386_XSTATE_AVX512) != 0)
/* Get I386 XSAVE extended state size. */
#define I386_XSTATE_SIZE(XCR0) \
- (HAS_MPX (XCR0) ? I386_XSTATE_BNDCFG_SIZE : \
- (HAS_AVX (XCR0) ? I386_XSTATE_AVX_SIZE : I386_XSTATE_SSE_SIZE))
+ (HAS_AVX512 (XCR0) ? I386_XSTATE_AVX512_SIZE : \
+ (HAS_MPX (XCR0) ? I386_XSTATE_BNDCFG_SIZE : \
+ (HAS_AVX (XCR0) ? I386_XSTATE_AVX_SIZE : I386_XSTATE_SSE_SIZE)))
#endif /* I386_XSTATE_H */
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index d43963d..dbf4963 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -38,10 +38,13 @@ WHICH = aarch64 \
i386/amd64 i386/amd64-linux \
i386/i386-avx i386/i386-avx-linux \
i386/i386-mpx i386/i386-mpx-linux \
+ i386/i386-avx512 i386/i386-avx512-linux \
i386/amd64-avx i386/amd64-avx-linux \
i386/amd64-mpx i386/amd64-mpx-linux \
+ i386/amd64-avx512 i386/amd64-avx512-linux \
i386/x32 i386/x32-linux \
i386/x32-avx i386/x32-avx-linux \
+ i386/x32-avx512 i386/x32-avx512-linux \
mips-linux mips-dsp-linux \
mips64-linux mips64-dsp-linux \
nios2-linux \
@@ -67,16 +70,22 @@ i386/i386-avx-expedite = ebp,esp,eip
i386/i386-avx-linux-expedite = ebp,esp,eip
i386/i386-mpx-expedite = ebp,esp,eip
i386/i386-mpx-linux-expedite = ebp,esp,eip
+i386/i386-avx512-expedite = ebp,esp,eip
+i386/i386-avx512-linux-expedite = ebp,esp,eip
i386/i386-mmx-expedite = ebp,esp,eip
i386/i386-mmx-linux-expedite = ebp,esp,eip
i386/amd64-avx-expedite = rbp,rsp,rip
i386/amd64-avx-linux-expedite = rbp,rsp,rip
i386/amd64-mpx-expedite = rbp,rsp,rip
i386/amd64-mpx-linux-expedite = rbp,rsp,rip
+i386/amd64-avx512-expedite = rbp,rsp,rip
+i386/amd64-avx512-linux-expedite = rbp,rsp,rip
i386/x32-expedite = rbp,rsp,rip
i386/x32-linux-expedite = rbp,rsp,rip
i386/x32-avx-expedite = rbp,rsp,rip
i386/x32-avx-linux-expedite = rbp,rsp,rip
+i386/x32-avx512-expedite = rbp,rsp,rip
+i386/x32-avx512-linux-expedite = rbp,rsp,rip
mips-expedite = r29,pc
mips-dsp-expedite = r29,pc
mips64-expedite = r29,pc
@@ -146,6 +155,10 @@ $(outdir)/i386/i386-mpx.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-mpx.xml
$(outdir)/i386/i386-mpx-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-linux.xml i386/32bit-mpx.xml
+$(outdir)/i386/i386-avx512.dat: i386/32bit-core.xml i386/32bit-avx.xml \
+ i386/32bit-mpx.xml i386/32bit-avx512.xml
+$(outdir)/i386/i386-avx512-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
+ i386/32bit-linux.xml i386/32bit-mpx.xml i386/32bit-avx512.xml
$(outdir)/i386/i386-mmx.dat: i386/32bit-core.xml
$(outdir)/i386/i386-mmx-linux.dat: i386/32bit-core.xml i386/32bit-linux.xml
$(outdir)/i386/amd64-avx.dat: i386/64bit-core.xml i386/64bit-avx.xml
@@ -155,9 +168,18 @@ $(outdir)/i386/amd64-mpx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-linux.xml i386/64bit-mpx.xml
$(outdir)/i386/amd64-mpx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-mpx.xml
+$(outdir)/i386/amd64-avx512.dat: i386/64bit-core.xml i386/64bit-avx.xml \
+ i386/64bit-mpx.xml i386/64bit-avx512.xml
+$(outdir)/i386/amd64-avx512-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
+ i386/64bit-mpx.xml i386/64bit-avx512.xml \
+ i386/64bit-linux.xml
$(outdir)/i386/x32.dat: i386/x32-core.xml i386/64bit-sse.xml
$(outdir)/i386/x32-linux.dat: i386/x32-core.xml i386/64bit-sse.xml \
i386/64bit-linux.xml
$(outdir)/i386/x32-avx.dat: i386/x32-core.xml i386/64bit-avx.xml
$(outdir)/i386/x32-avx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
i386/64bit-linux.xml
+$(outdir)/i386/x32-avx512.dat: i386/x32-core.xml i386/64bit-avx.xml \
+ i386/64bit-mpx.xml i386/64bit-avx512.xml
+$(outdir)/i386/x32-avx512-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
+ i386/64bit-mpx.xml i386/64bit-avx512.xml i386/64bit-linux.xml
diff --git a/gdb/features/i386/32bit-avx512.xml b/gdb/features/i386/32bit-avx512.xml
new file mode 100644
index 0000000..b9b59b7
--- /dev/null
+++ b/gdb/features/i386/32bit-avx512.xml
@@ -0,0 +1,30 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.i386.avx512">
+ <vector id="v2ui128" type="uint128" count="2"/>
+
+ <reg name="k0" bitsize="64" type="uint64"/>
+ <reg name="k1" bitsize="64" type="uint64"/>
+ <reg name="k2" bitsize="64" type="uint64"/>
+ <reg name="k3" bitsize="64" type="uint64"/>
+ <reg name="k4" bitsize="64" type="uint64"/>
+ <reg name="k5" bitsize="64" type="uint64"/>
+ <reg name="k6" bitsize="64" type="uint64"/>
+ <reg name="k7" bitsize="64" type="uint64"/>
+
+ <reg name="zmm0h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm1h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm2h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm3h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm4h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm5h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm6h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm7h" bitsize="256" type="v2ui128"/>
+
+</feature>
diff --git a/gdb/features/i386/64bit-avx512.xml b/gdb/features/i386/64bit-avx512.xml
new file mode 100644
index 0000000..5e2bf9f
--- /dev/null
+++ b/gdb/features/i386/64bit-avx512.xml
@@ -0,0 +1,102 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.i386.avx512">
+<vector id="v4f" type="ieee_single" count="4"/>
+ <vector id="v2d" type="ieee_double" count="2"/>
+ <vector id="v16i8" type="int8" count="16"/>
+ <vector id="v8i16" type="int16" count="8"/>
+ <vector id="v4i32" type="int32" count="4"/>
+ <vector id="v2i64" type="int64" count="2"/>
+ <union id="vec128">
+ <field name="v4_float" type="v4f"/>
+ <field name="v2_double" type="v2d"/>
+ <field name="v16_int8" type="v16i8"/>
+ <field name="v8_int16" type="v8i16"/>
+ <field name="v4_int32" type="v4i32"/>
+ <field name="v2_int64" type="v2i64"/>
+ <field name="uint128" type="uint128"/>
+ </union>
+ <reg name="xmm16" bitsize="128" type="vec128"/>
+ <reg name="xmm17" bitsize="128" type="vec128"/>
+ <reg name="xmm18" bitsize="128" type="vec128"/>
+ <reg name="xmm19" bitsize="128" type="vec128"/>
+ <reg name="xmm20" bitsize="128" type="vec128"/>
+ <reg name="xmm21" bitsize="128" type="vec128"/>
+ <reg name="xmm22" bitsize="128" type="vec128"/>
+ <reg name="xmm23" bitsize="128" type="vec128"/>
+ <reg name="xmm24" bitsize="128" type="vec128"/>
+ <reg name="xmm25" bitsize="128" type="vec128"/>
+ <reg name="xmm26" bitsize="128" type="vec128"/>
+ <reg name="xmm27" bitsize="128" type="vec128"/>
+ <reg name="xmm28" bitsize="128" type="vec128"/>
+ <reg name="xmm29" bitsize="128" type="vec128"/>
+ <reg name="xmm30" bitsize="128" type="vec128"/>
+ <reg name="xmm31" bitsize="128" type="vec128"/>
+
+ <reg name="ymm16h" bitsize="128" type="uint128"/>
+ <reg name="ymm17h" bitsize="128" type="uint128"/>
+ <reg name="ymm18h" bitsize="128" type="uint128"/>
+ <reg name="ymm19h" bitsize="128" type="uint128"/>
+ <reg name="ymm20h" bitsize="128" type="uint128"/>
+ <reg name="ymm21h" bitsize="128" type="uint128"/>
+ <reg name="ymm22h" bitsize="128" type="uint128"/>
+ <reg name="ymm23h" bitsize="128" type="uint128"/>
+ <reg name="ymm24h" bitsize="128" type="uint128"/>
+ <reg name="ymm25h" bitsize="128" type="uint128"/>
+ <reg name="ymm26h" bitsize="128" type="uint128"/>
+ <reg name="ymm27h" bitsize="128" type="uint128"/>
+ <reg name="ymm28h" bitsize="128" type="uint128"/>
+ <reg name="ymm29h" bitsize="128" type="uint128"/>
+ <reg name="ymm30h" bitsize="128" type="uint128"/>
+ <reg name="ymm31h" bitsize="128" type="uint128"/>
+
+ <vector id="v2ui128" type="uint128" count="2"/>
+
+ <reg name="k0" bitsize="64" type="uint64"/>
+ <reg name="k1" bitsize="64" type="uint64"/>
+ <reg name="k2" bitsize="64" type="uint64"/>
+ <reg name="k3" bitsize="64" type="uint64"/>
+ <reg name="k4" bitsize="64" type="uint64"/>
+ <reg name="k5" bitsize="64" type="uint64"/>
+ <reg name="k6" bitsize="64" type="uint64"/>
+ <reg name="k7" bitsize="64" type="uint64"/>
+
+ <reg name="zmm0h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm1h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm2h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm3h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm4h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm5h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm6h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm7h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm8h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm9h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm10h" bitsize="256" type="v2ui128/>
+ <reg name="zmm11h" bitsize="256" type="v2ui128/>
+ <reg name="zmm12h" bitsize="256" type="v2ui128/>
+ <reg name="zmm13h" bitsize="256" type="v2ui128/>
+ <reg name="zmm14h" bitsize="256" type="v2ui128/>
+ <reg name="zmm15h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm16h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm17h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm18h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm19h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm20h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm21h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm22h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm23h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm24h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm25h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm26h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm27h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm28h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm29h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm30h" bitsize="256" type="v2ui128"/>
+ <reg name="zmm31h" bitsize="256" type="v2ui128"/>
+</feature>
diff --git a/gdb/features/i386/amd64-avx512-linux.c b/gdb/features/i386/amd64-avx512-linux.c
new file mode 100644
index 0000000..144f636
--- /dev/null
+++ b/gdb/features/i386/amd64-avx512-linux.c
@@ -0,0 +1,321 @@
+/* THIS FILE IS GENERATED. Original: amd64-avx512-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_amd64_avx512_linux;
+static void
+initialize_tdesc_amd64_avx512_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x86-64"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
+ tdesc_create_reg (feature, "orig_rax", 57, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 72, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 73, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 77, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 78, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 79, 1, NULL, 64, "status");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx512");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_create_vector (feature, "v2ui128", field_type, 2);
+
+ tdesc_create_reg (feature, "xmm16", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm17", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm18", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm19", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm20", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm21", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm22", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm23", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm24", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm25", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm26", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm27", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm28", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm29", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm30", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm31", 95, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "ymm16h", 96, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm17h", 97, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm18h", 98, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm19h", 99, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm20h", 100, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm21h", 101, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm22h", 102, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm23h", 103, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm24h", 104, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm25h", 105, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm26h", 106, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm27h", 107, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm28h", 108, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm29h", 109, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm30h", 110, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm31h", 111, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "k0", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k1", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k2", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k3", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k4", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k5", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k6", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k7", 119, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "zmm0h", 120, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm1h", 121, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm2h", 122, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm3h", 123, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm4h", 124, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm5h", 125, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm6h", 126, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm7h", 127, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm8h", 128, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm9h", 129, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm10h", 130, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm11h", 131, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm12h", 132, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm13h", 133, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm14h", 134, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm15h", 135, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm16h", 136, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm17h", 137, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm18h", 138, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm19h", 139, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm20h", 140, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm21h", 141, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm22h", 142, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm23h", 143, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm24h", 144, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm25h", 145, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm26h", 146, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm27h", 147, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm28h", 148, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm29h", 149, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm30h", 150, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm31h", 151, 1, NULL, 256, "v2ui128");
+
+ tdesc_amd64_avx512_linux = result;
+}
diff --git a/gdb/features/i386/amd64-avx512-linux.xml b/gdb/features/i386/amd64-avx512-linux.xml
new file mode 100644
index 0000000..5abdf3f
--- /dev/null
+++ b/gdb/features/i386/amd64-avx512-linux.xml
@@ -0,0 +1,20 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- AMD64 with AVX512 - Includes Linux-only special "register". -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x86-64</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="64bit-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-linux.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+ <xi:include href="64bit-avx512.xml"/>
+</target>
diff --git a/gdb/features/i386/amd64-avx512.c b/gdb/features/i386/amd64-avx512.c
new file mode 100644
index 0000000..a1c7c76
--- /dev/null
+++ b/gdb/features/i386/amd64-avx512.c
@@ -0,0 +1,316 @@
+/* THIS FILE IS GENERATED. Original: amd64-avx512.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_amd64_avx512;
+static void
+initialize_tdesc_amd64_avx512 (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x86-64"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 57, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 72, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 73, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 77, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 78, 1, NULL, 64, "status");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx512");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_create_vector (feature, "v2ui128", field_type, 2);
+
+ tdesc_create_reg (feature, "xmm16", 79, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm17", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm18", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm19", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm20", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm21", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm22", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm23", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm24", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm25", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm26", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm27", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm28", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm29", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm30", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm31", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "ymm16h", 95, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm17h", 96, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm18h", 97, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm19h", 98, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm20h", 99, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm21h", 100, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm22h", 101, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm23h", 102, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm24h", 103, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm25h", 104, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm26h", 105, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm27h", 106, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm28h", 107, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm29h", 108, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm30h", 109, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm31h", 110, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "k0", 111, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k1", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k2", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k3", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k4", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k5", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k6", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k7", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "zmm0h", 119, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm1h", 120, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm2h", 121, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm3h", 122, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm4h", 123, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm5h", 124, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm6h", 125, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm7h", 126, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm8h", 127, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm9h", 128, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm10h", 129, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm11h", 130, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm12h", 131, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm13h", 132, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm14h", 133, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm15h", 134, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm16h", 135, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm17h", 136, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm18h", 137, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm19h", 138, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm20h", 139, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm21h", 140, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm22h", 141, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm23h", 142, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm24h", 143, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm25h", 144, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm26h", 145, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm27h", 146, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm28h", 147, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm29h", 148, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm30h", 149, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm31h", 150, 1, NULL, 256, "v2ui128");
+
+ tdesc_amd64_avx512 = result;
+}
diff --git a/gdb/features/i386/amd64-avx512.xml b/gdb/features/i386/amd64-avx512.xml
new file mode 100644
index 0000000..5763115
--- /dev/null
+++ b/gdb/features/i386/amd64-avx512.xml
@@ -0,0 +1,18 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- AMD64 with AVX512 -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x86-64</architecture>
+ <xi:include href="64bit-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+ <xi:include href="64bit-avx512.xml"/>
+</target>
diff --git a/gdb/features/i386/i386-avx512-linux.c b/gdb/features/i386/i386-avx512-linux.c
new file mode 100644
index 0000000..53926b2
--- /dev/null
+++ b/gdb/features/i386/i386-avx512-linux.c
@@ -0,0 +1,208 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: i386-avx512-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_i386_avx512_linux;
+static void
+initialize_tdesc_i386_avx512_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "eax", 0, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ecx", 1, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edx", 2, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ebx", 3, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "esp", 4, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "ebp", 5, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "esi", 6, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edi", 7, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "eip", 8, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 9, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 10, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 11, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 12, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 13, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 14, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 15, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 16, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 17, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 18, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 19, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 20, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 21, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 22, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 23, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 24, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 25, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 26, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 27, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 28, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 29, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 30, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 31, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 32, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 33, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 34, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 35, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 36, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 37, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 38, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 39, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 40, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
+ tdesc_create_reg (feature, "orig_eax", 41, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 42, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 43, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 44, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 45, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 46, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 47, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 48, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 49, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 31);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 31);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 1);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 50, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 51, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 52, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 53, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 54, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 55, 1, NULL, 64, "status");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx512");
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_create_vector (feature, "v2ui128", field_type, 2);
+
+ tdesc_create_reg (feature, "k0", 56, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k1", 57, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k2", 58, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k3", 59, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k4", 60, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k5", 61, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k6", 62, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k7", 63, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "zmm0h", 64, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm1h", 65, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm2h", 66, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm3h", 67, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm4h", 68, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm5h", 69, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm6h", 70, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm7h", 71, 1, NULL, 256, "v2ui128");
+
+ tdesc_i386_avx512_linux = result;
+}
diff --git a/gdb/features/i386/i386-avx512-linux.xml b/gdb/features/i386/i386-avx512-linux.xml
new file mode 100644
index 0000000..d0e57e5
--- /dev/null
+++ b/gdb/features/i386/i386-avx512-linux.xml
@@ -0,0 +1,20 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- I386 with AVX512 - Includes Linux-only special "register". -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="32bit-core.xml"/>
+ <xi:include href="32bit-sse.xml"/>
+ <xi:include href="32bit-linux.xml"/>
+ <xi:include href="32bit-avx.xml"/>
+ <xi:include href="32bit-mpx.xml"/>
+ <xi:include href="32bit-avx512.xml"/>
+</target>
diff --git a/gdb/features/i386/i386-avx512.c b/gdb/features/i386/i386-avx512.c
new file mode 100644
index 0000000..2f99499
--- /dev/null
+++ b/gdb/features/i386/i386-avx512.c
@@ -0,0 +1,203 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: i386-avx512.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_i386_avx512;
+static void
+initialize_tdesc_i386_avx512 (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "eax", 0, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ecx", 1, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edx", 2, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ebx", 3, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "esp", 4, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "ebp", 5, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "esi", 6, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edi", 7, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "eip", 8, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 9, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 10, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 11, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 12, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 13, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 14, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 15, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 16, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 17, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 18, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 19, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 20, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 21, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 22, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 23, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 24, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 25, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 26, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 27, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 28, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 29, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 30, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 31, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 32, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 33, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 34, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 35, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 36, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 37, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 38, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 39, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 40, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 41, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 42, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 43, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 44, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 45, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 46, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 47, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 48, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 31);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 31);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 1);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 49, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 50, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 51, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 52, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 53, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 54, 1, NULL, 64, "status");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx512");
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_create_vector (feature, "v2ui128", field_type, 2);
+
+ tdesc_create_reg (feature, "k0", 55, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k1", 56, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k2", 57, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k3", 58, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k4", 59, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k5", 60, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k6", 61, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k7", 62, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "zmm0h", 63, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm1h", 64, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm2h", 65, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm3h", 66, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm4h", 67, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm5h", 68, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm6h", 69, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm7h", 70, 1, NULL, 256, "v2ui128");
+
+ tdesc_i386_avx512 = result;
+}
diff --git a/gdb/features/i386/i386-avx512.xml b/gdb/features/i386/i386-avx512.xml
new file mode 100644
index 0000000..0382c47
--- /dev/null
+++ b/gdb/features/i386/i386-avx512.xml
@@ -0,0 +1,18 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- I386 with AVX512 -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386</architecture>
+ <xi:include href="32bit-core.xml"/>
+ <xi:include href="32bit-sse.xml"/>
+ <xi:include href="32bit-avx.xml"/>
+ <xi:include href="32bit-mpx.xml"/>
+ <xi:include href="32bit-avx512.xml"/>
+</target>
diff --git a/gdb/features/i386/x32-avx512-linux.c b/gdb/features/i386/x32-avx512-linux.c
new file mode 100644
index 0000000..7aa52b2
--- /dev/null
+++ b/gdb/features/i386/x32-avx512-linux.c
@@ -0,0 +1,321 @@
+/* THIS FILE IS GENERATED. Original: x32-avx512-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_x32_avx512_linux;
+static void
+initialize_tdesc_x32_avx512_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x64-32"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
+ tdesc_create_reg (feature, "orig_rax", 57, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 72, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 73, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 77, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 78, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 79, 1, NULL, 64, "status");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx512");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_create_vector (feature, "v2ui128", field_type, 2);
+
+ tdesc_create_reg (feature, "xmm16", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm17", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm18", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm19", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm20", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm21", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm22", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm23", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm24", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm25", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm26", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm27", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm28", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm29", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm30", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm31", 95, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "ymm16h", 96, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm17h", 97, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm18h", 98, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm19h", 99, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm20h", 100, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm21h", 101, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm22h", 102, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm23h", 103, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm24h", 104, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm25h", 105, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm26h", 106, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm27h", 107, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm28h", 108, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm29h", 109, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm30h", 110, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm31h", 111, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "k0", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k1", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k2", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k3", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k4", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k5", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k6", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k7", 119, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "zmm0h", 120, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm1h", 121, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm2h", 122, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm3h", 123, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm4h", 124, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm5h", 125, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm6h", 126, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm7h", 127, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm8h", 128, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm9h", 129, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm10h", 130, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm11h", 131, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm12h", 132, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm13h", 133, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm14h", 134, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm15h", 135, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm16h", 136, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm17h", 137, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm18h", 138, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm19h", 139, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm20h", 140, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm21h", 141, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm22h", 142, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm23h", 143, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm24h", 144, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm25h", 145, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm26h", 146, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm27h", 147, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm28h", 148, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm29h", 149, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm30h", 150, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm31h", 151, 1, NULL, 256, "v2ui128");
+
+ tdesc_x32_avx512_linux = result;
+}
diff --git a/gdb/features/i386/x32-avx512-linux.xml b/gdb/features/i386/x32-avx512-linux.xml
new file mode 100644
index 0000000..0fbf86e
--- /dev/null
+++ b/gdb/features/i386/x32-avx512-linux.xml
@@ -0,0 +1,20 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- X32 with AVX512 - Includes Linux-only special "register". -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x64-32</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="x32-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-linux.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+ <xi:include href="64bit-avx512.xml"/>
+</target>
diff --git a/gdb/features/i386/x32-avx512.c b/gdb/features/i386/x32-avx512.c
new file mode 100644
index 0000000..3848e5a
--- /dev/null
+++ b/gdb/features/i386/x32-avx512.c
@@ -0,0 +1,316 @@
+/* THIS FILE IS GENERATED. Original: x32-avx512.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_x32_avx512;
+static void
+initialize_tdesc_x32_avx512 (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x64-32"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 57, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 72, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 73, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 77, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 78, 1, NULL, 64, "status");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx512");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_create_vector (feature, "v2ui128", field_type, 2);
+
+ tdesc_create_reg (feature, "xmm16", 79, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm17", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm18", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm19", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm20", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm21", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm22", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm23", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm24", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm25", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm26", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm27", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm28", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm29", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm30", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm31", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "ymm16h", 95, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm17h", 96, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm18h", 97, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm19h", 98, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm20h", 99, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm21h", 100, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm22h", 101, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm23h", 102, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm24h", 103, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm25h", 104, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm26h", 105, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm27h", 106, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm28h", 107, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm29h", 108, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm30h", 109, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm31h", 110, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "k0", 111, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k1", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k2", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k3", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k4", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k5", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k6", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "k7", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "zmm0h", 119, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm1h", 120, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm2h", 121, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm3h", 122, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm4h", 123, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm5h", 124, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm6h", 125, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm7h", 126, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm8h", 127, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm9h", 128, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm10h", 129, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm11h", 130, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm12h", 131, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm13h", 132, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm14h", 133, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm15h", 134, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm16h", 135, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm17h", 136, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm18h", 137, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm19h", 138, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm20h", 139, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm21h", 140, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm22h", 141, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm23h", 142, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm24h", 143, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm25h", 144, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm26h", 145, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm27h", 146, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm28h", 147, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm29h", 148, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm30h", 149, 1, NULL, 256, "v2ui128");
+ tdesc_create_reg (feature, "zmm31h", 150, 1, NULL, 256, "v2ui128");
+
+ tdesc_x32_avx512 = result;
+}
diff --git a/gdb/features/i386/x32-avx512.xml b/gdb/features/i386/x32-avx512.xml
new file mode 100644
index 0000000..0244da4
--- /dev/null
+++ b/gdb/features/i386/x32-avx512.xml
@@ -0,0 +1,18 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- X32 with AVX512 -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x64-32</architecture>
+ <xi:include href="x32-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+ <xi:include href="64bit-avx512.xml"/>
+</target>
diff --git a/gdb/i386-linux-nat.c b/gdb/i386-linux-nat.c
index 84f20ab..bb2b911 100644
--- a/gdb/i386-linux-nat.c
+++ b/gdb/i386-linux-nat.c
@@ -102,7 +102,7 @@ static int have_ptrace_getregset = -1;
(I386_ST0_REGNUM <= (regno) && (regno) < I386_SSE_NUM_REGS)
#define GETXSTATEREGS_SUPPLIES(regno) \
- (I386_ST0_REGNUM <= (regno) && (regno) < I386_MPX_NUM_REGS)
+ (I386_ST0_REGNUM <= (regno) && (regno) < I386_AVX512_NUM_REGS)
/* Does the current host support the GETREGS request? */
int have_ptrace_getregs =
@@ -1046,6 +1046,9 @@ i386_linux_read_description (struct target_ops *ops)
{
switch ((xcr0 & I386_XSTATE_ALL_MASK))
{
+ case I386_XSTATE_MPX_AVX512_MASK:
+ case I386_XSTATE_AVX512_MASK:
+ return tdesc_i386_avx512_linux;
case I386_XSTATE_MPX_MASK:
return tdesc_i386_mpx_linux;
case I386_XSTATE_AVX_MASK:
diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c
index bcd8dcd..8ab8954 100644
--- a/gdb/i386-linux-tdep.c
+++ b/gdb/i386-linux-tdep.c
@@ -52,6 +52,7 @@
#include "features/i386/i386-mmx-linux.c"
#include "features/i386/i386-mpx-linux.c"
#include "features/i386/i386-avx-linux.c"
+#include "features/i386/i386-avx512-linux.c"
/* Supported register note sections. */
static struct core_regset_section i386_linux_regset_sections[] =
@@ -570,9 +571,11 @@ int i386_linux_gregset_reg_offset[] =
-1, -1, -1, -1, -1, -1, -1, -1,
-1,
-1, -1, -1, -1, -1, -1, -1, -1,
- -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
- -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
- 11 * 4 /* "orig_eax" */
+ -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
+ -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
+ -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
+ 11 * 4, /* "orig_eax" */
};
/* Mapping between the general-purpose registers in `struct
@@ -648,6 +651,9 @@ i386_linux_core_read_description (struct gdbarch *gdbarch,
switch ((xcr0 & I386_XSTATE_ALL_MASK))
{
+ case I386_XSTATE_MPX_AVX512_MASK:
+ case I386_XSTATE_AVX512_MASK:
+ return tdesc_i386_avx512_linux;
case I386_XSTATE_MPX_MASK:
return tdesc_i386_mpx_linux;
case I386_XSTATE_AVX_MASK:
@@ -945,7 +951,8 @@ i386_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
svr4_fetch_objfile_link_map);
/* Install supported register note sections. */
- if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx"))
+ if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512")
+ || tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx"))
set_gdbarch_core_regset_sections (gdbarch, i386_linux_avx_regset_sections);
else if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse"))
set_gdbarch_core_regset_sections (gdbarch, i386_linux_sse_regset_sections);
@@ -986,4 +993,5 @@ _initialize_i386_linux_tdep (void)
initialize_tdesc_i386_mmx_linux ();
initialize_tdesc_i386_avx_linux ();
initialize_tdesc_i386_mpx_linux ();
+ initialize_tdesc_i386_avx512_linux ();
}
diff --git a/gdb/i386-linux-tdep.h b/gdb/i386-linux-tdep.h
index d6ab9ca..1dc146e 100644
--- a/gdb/i386-linux-tdep.h
+++ b/gdb/i386-linux-tdep.h
@@ -29,7 +29,7 @@
/* Register number for the "orig_eax" pseudo-register. If this
pseudo-register contains a value >= 0 it is interpreted as the
system call number that the kernel is supposed to restart. */
-#define I386_LINUX_ORIG_EAX_REGNUM I386_MPX_NUM_REGS
+#define I386_LINUX_ORIG_EAX_REGNUM (I386_ZMM7H_REGNUM + 1)
/* Total number of registers for GNU/Linux. */
#define I386_LINUX_NUM_REGS (I386_LINUX_ORIG_EAX_REGNUM + 1)
@@ -42,6 +42,7 @@ extern struct target_desc *tdesc_i386_linux;
extern struct target_desc *tdesc_i386_mmx_linux;
extern struct target_desc *tdesc_i386_avx_linux;
extern struct target_desc *tdesc_i386_mpx_linux;
+extern struct target_desc *tdesc_i386_avx512_linux;
/* Format of XSAVE extended state is:
struct
@@ -51,6 +52,10 @@ extern struct target_desc *tdesc_i386_mpx_linux;
xstate_hdr_bytes[512..575]
avx_bytes[576..831]
mpx_bytes [960..1032]
+ avx512_k_regs[1088..1152]
+ avx512_zmmh_regs0-7[1153..1407]
+ avx512_zmmh_regs8-15[1408..1663]
+ avx512_zmm_regs16-31[1664..2687]
future_state etc
};
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index be40b20..627b486 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -58,6 +58,7 @@
#include "features/i386/i386.c"
#include "features/i386/i386-avx.c"
#include "features/i386/i386-mpx.c"
+#include "features/i386/i386-avx512.c"
#include "features/i386/i386-mmx.c"
#include "ax.h"
@@ -87,6 +88,24 @@ static const char *i386_register_names[] =
"mxcsr"
};
+static const char *i386_zmm_names[] =
+{
+ "zmm0", "zmm1", "zmm2", "zmm3",
+ "zmm4", "zmm5", "zmm6", "zmm7"
+};
+
+static const char *i386_zmmh_names[] =
+{
+ "zmm0h", "zmm1h", "zmm2h", "zmm3h",
+ "zmm4h", "zmm5h", "zmm6h", "zmm7h"
+};
+
+static const char *i386_k_names[] =
+{
+ "k0", "k1", "k2", "k3",
+ "k4", "k5", "k6", "k7"
+};
+
static const char *i386_ymm_names[] =
{
"ymm0", "ymm1", "ymm2", "ymm3",
@@ -135,6 +154,12 @@ static const char *i386_word_names[] =
"", "bp", "si", "di"
};
+/* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
+ 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
+ we have 16 upper ZMM regs that have to be handled differently. */
+
+const int num_lower_zmm_regs = 16;
+
/* MMX register? */
static int
@@ -187,6 +212,47 @@ i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum)
return regnum >= 0 && regnum < tdep->num_dword_regs;
}
+/* AVX512 register? */
+
+int
+i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int zmm0h_regnum = tdep->zmm0h_regnum;
+
+ if (zmm0h_regnum < 0)
+ return 0;
+
+ regnum -= zmm0h_regnum;
+ return regnum >= 0 && regnum < tdep->num_zmm_regs;
+}
+
+int
+i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int zmm0_regnum = tdep->zmm0_regnum;
+
+ if (zmm0_regnum < 0)
+ return 0;
+
+ regnum -= zmm0_regnum;
+ return regnum >= 0 && regnum < tdep->num_zmm_regs;
+}
+
+int
+i386_k_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int k0_regnum = tdep->k0_regnum;
+
+ if (k0_regnum < 0)
+ return 0;
+
+ regnum -= k0_regnum;
+ return regnum >= 0 && regnum < I387_NUM_K_REGS;
+}
+
static int
i386_ymmh_regnum_p (struct gdbarch *gdbarch, int regnum)
{
@@ -215,6 +281,32 @@ i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum)
return regnum >= 0 && regnum < tdep->num_ymm_regs;
}
+static int
+i386_ymmh_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int ymm16h_regnum = tdep->ymm16h_regnum;
+
+ if (ymm16h_regnum < 0)
+ return 0;
+
+ regnum -= ymm16h_regnum;
+ return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
+}
+
+int
+i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int ymm16_regnum = tdep->ymm16_regnum;
+
+ if (ymm16_regnum < 0)
+ return 0;
+
+ regnum -= ymm16_regnum;
+ return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
+}
+
/* BND register? */
int
@@ -245,6 +337,21 @@ i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum)
return regnum >= 0 && regnum < num_xmm_regs;
}
+/* XMM_512 register? */
+
+int
+i386_xmm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int num_xmm_avx512_regs = I387_NUM_XMM_AVX512_REGS (tdep);
+
+ if (num_xmm_avx512_regs == 0)
+ return 0;
+
+ regnum -= I387_XMM16_REGNUM (tdep);
+ return regnum >= 0 && regnum < num_xmm_avx512_regs;
+}
+
static int
i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
{
@@ -320,6 +427,14 @@ i386_register_name (struct gdbarch *gdbarch, int regnum)
if (i386_ymmh_regnum_p (gdbarch, regnum))
return "";
+ /* Hide the upper YMM16-31 registers. */
+ if (i386_ymmh_avx512_regnum_p (gdbarch, regnum))
+ return "";
+
+ /* Hide the upper ZMM registers. */
+ if (i386_zmmh_regnum_p (gdbarch, regnum))
+ return "";
+
return tdesc_register_name (gdbarch, regnum);
}
@@ -335,6 +450,8 @@ i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
else if (i386_ymm_regnum_p (gdbarch, regnum))
return i386_ymm_names[regnum - tdep->ymm0_regnum];
+ else if (i386_zmm_regnum_p (gdbarch, regnum))
+ return i386_zmm_names[regnum - tdep->zmm0_regnum];
else if (i386_byte_regnum_p (gdbarch, regnum))
return i386_byte_names[regnum - tdep->al_regnum];
else if (i386_word_regnum_p (gdbarch, regnum))
@@ -2908,6 +3025,59 @@ i386_bnd_type (struct gdbarch *gdbarch)
return tdep->i386_bnd_type;
}
+/* Construct vector type for pseudo ZMM registers. We can't use
+ tdesc_find_type since ZMM isn't described in target description. */
+
+static struct type *
+i386_zmm_type (struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (!tdep->i386_zmm_type)
+ {
+ const struct builtin_type *bt = builtin_type (gdbarch);
+
+ /* The type we're building is this: */
+#if 0
+ union __gdb_builtin_type_vec512i
+ {
+ int128_t uint128[4];
+ int64_t v4_int64[8];
+ int32_t v8_int32[16];
+ int16_t v16_int16[32];
+ int8_t v32_int8[64];
+ double v4_double[8];
+ float v8_float[16];
+ };
+#endif
+
+ struct type *t;
+
+ t = arch_composite_type (gdbarch,
+ "__gdb_builtin_type_vec512i", TYPE_CODE_UNION);
+ append_composite_type_field (t, "v16_float",
+ init_vector_type (bt->builtin_float, 16));
+ append_composite_type_field (t, "v8_double",
+ init_vector_type (bt->builtin_double, 8));
+ append_composite_type_field (t, "v64_int8",
+ init_vector_type (bt->builtin_int8, 64));
+ append_composite_type_field (t, "v32_int16",
+ init_vector_type (bt->builtin_int16, 32));
+ append_composite_type_field (t, "v16_int32",
+ init_vector_type (bt->builtin_int32, 16));
+ append_composite_type_field (t, "v8_int64",
+ init_vector_type (bt->builtin_int64, 8));
+ append_composite_type_field (t, "v4_int128",
+ init_vector_type (bt->builtin_int128, 4));
+
+ TYPE_VECTOR (t) = 1;
+ TYPE_NAME (t) = "builtin_type_vec512i";
+ tdep->i386_zmm_type = t;
+ }
+
+ return tdep->i386_zmm_type;
+}
+
/* Construct vector type for pseudo YMM registers. We can't use
tdesc_find_type since YMM isn't described in target description. */
@@ -3015,6 +3185,10 @@ i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
return i386_mmx_type (gdbarch);
else if (i386_ymm_regnum_p (gdbarch, regnum))
return i386_ymm_type (gdbarch);
+ else if (i386_ymm_avx512_regnum_p (gdbarch, regnum))
+ return i386_ymm_type (gdbarch);
+ else if (i386_zmm_regnum_p (gdbarch, regnum))
+ return i386_zmm_type (gdbarch);
else
{
const struct builtin_type *bt = builtin_type (gdbarch);
@@ -3024,6 +3198,8 @@ i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
return bt->builtin_int16;
else if (i386_dword_regnum_p (gdbarch, regnum))
return bt->builtin_int32;
+ else if (i386_k_regnum_p (gdbarch, regnum))
+ return bt->builtin_int64;
}
internal_error (__FILE__, __LINE__, _("invalid regnum"));
@@ -3101,6 +3277,75 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
memcpy (buf + size, &upper, size);
}
}
+ else if (i386_k_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->k0_regnum;
+
+ /* Extract (always little endian). */
+ status = regcache_raw_read (regcache,
+ tdep->k0_regnum + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 8);
+ else
+ memcpy (buf, raw_buf, 8);
+ }
+ else if (i386_zmm_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->zmm0_regnum;
+
+ if (regnum < num_lower_zmm_regs)
+ {
+ /* Extract (always little endian). Read lower 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_XMM0_REGNUM (tdep) + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ memcpy (buf, raw_buf, 16);
+
+ /* Extract (always little endian). Read upper 128bits. */
+ status = regcache_raw_read (regcache,
+ tdep->ymm0h_regnum + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 16, 16);
+ else
+ memcpy (buf + 16, raw_buf, 16);
+ }
+ else
+ {
+ /* Extract (always little endian). Read lower 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_XMM16_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ memcpy (buf, raw_buf, 16);
+
+ /* Extract (always little endian). Read upper 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_YMM16H_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 16, 16);
+ else
+ memcpy (buf + 16, raw_buf, 16);
+ }
+
+ /* Read upper 256bits. */
+ status = regcache_raw_read (regcache,
+ tdep->zmm0h_regnum + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 32, 32);
+ else
+ memcpy (buf + 32, raw_buf, 32);
+ }
else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
@@ -3122,6 +3367,26 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
else
memcpy (buf + 16, raw_buf, 16);
}
+ else if (i386_ymm_avx512_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->ymm16_regnum;
+ /* Extract (always little endian). Read lower 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_XMM16_REGNUM (tdep) + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ memcpy (buf, raw_buf, 16);
+ /* Read upper 128bits. */
+ status = regcache_raw_read (regcache,
+ tdep->ymm16h_regnum + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 16, 16);
+ else
+ memcpy (buf + 16, raw_buf, 16);
+ }
else if (i386_word_regnum_p (gdbarch, regnum))
{
int gpnum = regnum - tdep->ax_regnum;
@@ -3221,6 +3486,47 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
I387_BND0R_REGNUM (tdep) + regnum,
raw_buf);
}
+ else if (i386_k_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->k0_regnum;
+
+ regcache_raw_write (regcache,
+ tdep->k0_regnum + regnum,
+ buf);
+ }
+ else if (i386_zmm_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->zmm0_regnum;
+
+ if (regnum < num_lower_zmm_regs)
+ {
+ /* Write lower 128bits. */
+ regcache_raw_write (regcache,
+ I387_XMM0_REGNUM (tdep) + regnum,
+ buf);
+ /* Write upper 128bits. */
+ regcache_raw_write (regcache,
+ I387_YMM0_REGNUM (tdep) + regnum,
+ buf + 16);
+ }
+ else
+ {
+ /* Write lower 128bits. */
+ regcache_raw_write (regcache,
+ I387_XMM16_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs,
+ buf);
+ /* Write upper 128bits. */
+ regcache_raw_write (regcache,
+ I387_YMM16H_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs,
+ buf + 16);
+ }
+ /* Write upper 256bits. */
+ regcache_raw_write (regcache,
+ tdep->zmm0h_regnum + regnum,
+ buf + 32);
+ }
else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
@@ -3234,6 +3540,19 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
tdep->ymm0h_regnum + regnum,
buf + 16);
}
+ else if (i386_ymm_avx512_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->ymm16_regnum;
+
+ /* ... Write lower 128bits. */
+ regcache_raw_write (regcache,
+ I387_XMM16_REGNUM (tdep) + regnum,
+ buf);
+ /* ... Write upper 128bits. */
+ regcache_raw_write (regcache,
+ tdep->ymm16h_regnum + regnum,
+ buf + 16);
+ }
else if (i386_word_regnum_p (gdbarch, regnum))
{
int gpnum = regnum - tdep->ax_regnum;
@@ -4121,8 +4440,10 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
{
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
- ymm_regnum_p, ymmh_regnum_p, bndr_regnum_p, bnd_regnum_p,
- mpx_ctrl_regnum_p;
+ ymm_regnum_p, ymmh_regnum_p, ymm_avx512_regnum_p, ymmh_avx512_regnum_p,
+ bndr_regnum_p, bnd_regnum_p, k_regnum_p, zmm_regnum_p, zmmh_regnum_p,
+ zmm_avx512_regnum_p, mpx_ctrl_regnum_p, xmm_avx512_regnum_p,
+ avx512_p, avx_p, sse_p;
/* Don't include pseudo registers, except for MMX, in any register
groups. */
@@ -4140,18 +4461,28 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
return mmx_regnum_p;
xmm_regnum_p = i386_xmm_regnum_p (gdbarch, regnum);
+ xmm_avx512_regnum_p = i386_xmm_avx512_regnum_p (gdbarch, regnum);
mxcsr_regnum_p = i386_mxcsr_regnum_p (gdbarch, regnum);
if (group == i386_sse_reggroup)
- return xmm_regnum_p || mxcsr_regnum_p;
+ return xmm_regnum_p || xmm_avx512_regnum_p || mxcsr_regnum_p;
ymm_regnum_p = i386_ymm_regnum_p (gdbarch, regnum);
+ ymm_avx512_regnum_p = i386_ymm_avx512_regnum_p (gdbarch, regnum);
+ zmm_regnum_p = i386_zmm_regnum_p (gdbarch, regnum);
+
+ avx512_p = ((tdep->xcr0 & I386_XSTATE_AVX512_MASK)
+ == I386_XSTATE_AVX512_MASK);
+ avx_p = ((tdep->xcr0 & I386_XSTATE_AVX512_MASK)
+ == I386_XSTATE_AVX_MASK) && !avx512_p;
+ sse_p = ((tdep->xcr0 & I386_XSTATE_AVX512_MASK)
+ == I386_XSTATE_SSE_MASK) && !avx512_p && ! avx_p;
+
if (group == vector_reggroup)
return (mmx_regnum_p
- || ymm_regnum_p
- || mxcsr_regnum_p
- || (xmm_regnum_p
- && ((tdep->xcr0 & I386_XSTATE_AVX_MASK)
- == I386_XSTATE_SSE_MASK)));
+ || (zmm_regnum_p && avx512_p)
+ || ((ymm_regnum_p || ymm_avx512_regnum_p) && avx_p)
+ || ((xmm_regnum_p || xmm_avx512_regnum_p) && sse_p)
+ || mxcsr_regnum_p);
fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum)
|| i386_fpc_regnum_p (gdbarch, regnum));
@@ -4161,10 +4492,14 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
/* For "info reg all", don't include upper YMM registers nor XMM
registers when AVX is supported. */
ymmh_regnum_p = i386_ymmh_regnum_p (gdbarch, regnum);
+ ymmh_avx512_regnum_p = i386_ymmh_avx512_regnum_p (gdbarch, regnum);
+ zmmh_regnum_p = i386_zmmh_regnum_p (gdbarch, regnum);
if (group == all_reggroup
- && ((xmm_regnum_p
- && (tdep->xcr0 & I386_XSTATE_AVX))
- || ymmh_regnum_p))
+ && (((xmm_regnum_p || xmm_avx512_regnum_p) && !sse_p)
+ || ((ymm_regnum_p || ymm_avx512_regnum_p) && !avx_p)
+ || ymmh_regnum_p
+ || ymmh_avx512_regnum_p
+ || zmmh_regnum_p))
return 0;
bnd_regnum_p = i386_bnd_regnum_p (gdbarch, regnum);
@@ -4187,11 +4522,16 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
&& !mmx_regnum_p
&& !mxcsr_regnum_p
&& !xmm_regnum_p
+ && !xmm_avx512_regnum_p
&& !ymm_regnum_p
&& !ymmh_regnum_p
+ && !ymm_avx512_regnum_p
+ && !ymmh_avx512_regnum_p
&& !bndr_regnum_p
&& !bnd_regnum_p
- && !mpx_ctrl_regnum_p);
+ && !mpx_ctrl_regnum_p
+ && !zmm_regnum_p
+ && !zmmh_regnum_p);
return default_register_reggroup_p (gdbarch, regnum, group);
}
@@ -7778,7 +8118,9 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
{
const struct target_desc *tdesc = tdep->tdesc;
const struct tdesc_feature *feature_core;
- const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx;
+
+ const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
+ *feature_avx512;
int i, num_regs, valid_p;
if (! tdesc_has_registers (tdesc))
@@ -7798,16 +8140,62 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
/* Try MPX registers. */
feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
+ /* Try AVX512 registers. */
+ feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
+
valid_p = 1;
/* The XCR0 bits. */
+ if (feature_avx512)
+ {
+ /* AVX512 register description requires AVX register description. */
+ if (!feature_avx)
+ return 0;
+
+ tdep->xcr0 = I386_XSTATE_MPX_AVX512_MASK;
+
+ /* It may have been set by OSABI initialization function. */
+ if (tdep->k0_regnum < 0)
+ {
+ tdep->k_register_names = i386_k_names;
+ tdep->k0_regnum = I386_K0_REGNUM;
+ }
+
+ for (i = 0; i < I387_NUM_K_REGS; i++)
+ valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
+ tdep->k0_regnum + i,
+ i386_k_names[i]);
+
+ if (tdep->num_zmm_regs == 0)
+ {
+ tdep->zmmh_register_names = i386_zmmh_names;
+ tdep->num_zmm_regs = 8;
+ tdep->zmm0h_regnum = I386_ZMM0H_REGNUM;
+ }
+
+ for (i = 0; i < tdep->num_zmm_regs; i++)
+ valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
+ tdep->zmm0h_regnum + i,
+ tdep->zmmh_register_names[i]);
+
+ for (i = 0; i < tdep->num_xmm_avx512_regs; i++)
+ valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
+ tdep->xmm16_regnum + i,
+ tdep->xmm_avx512_register_names[i]);
+
+ for (i = 0; i < tdep->num_ymm_avx512_regs; i++)
+ valid_p &= tdesc_numbered_register (feature_avx512, tdesc_data,
+ tdep->ymm16h_regnum + i,
+ tdep->ymm16h_register_names[i]);
+ }
if (feature_avx)
{
/* AVX register description requires SSE register description. */
if (!feature_sse)
return 0;
- tdep->xcr0 = I386_XSTATE_AVX_MASK;
+ if (!feature_avx512)
+ tdep->xcr0 = I386_XSTATE_AVX_MASK;
/* It may have been set by OSABI initialization function. */
if (tdep->num_ymm_regs == 0)
@@ -7846,7 +8234,7 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
if (feature_mpx)
{
- tdep->xcr0 = I386_XSTATE_MPX_MASK;
+ tdep->xcr0 |= I386_XSTATE_MPX_MASK;
if (tdep->bnd0r_regnum < 0)
{
@@ -7876,6 +8264,8 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
int ymm0_regnum;
int bnd0_regnum;
int num_bnd_cooked;
+ int k0_regnum;
+ int zmm0_regnum;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -8049,8 +8439,8 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Even though the default ABI only includes general-purpose registers,
floating-point registers and the SSE registers, we have to leave a
- gap for the upper AVX registers and the MPX registers. */
- set_gdbarch_num_regs (gdbarch, I386_MPX_NUM_REGS);
+ gap for the upper AVX, MPX and AVX512 registers. */
+ set_gdbarch_num_regs (gdbarch, I386_AVX512_NUM_REGS);
/* Get the x86 target description from INFO. */
tdesc = info.target_desc;
@@ -8065,6 +8455,18 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->ymmh_register_names = NULL;
tdep->ymm0h_regnum = -1;
+ /* No upper ZMM registers. */
+ tdep->zmmh_register_names = NULL;
+ tdep->zmm0h_regnum = -1;
+
+ /* No high XMM registers. */
+ tdep->xmm_avx512_register_names = NULL;
+ tdep->xmm16_regnum = -1;
+
+ /* No upper YMM16-31 registers. */
+ tdep->ymm16h_register_names = NULL;
+ tdep->ymm16h_regnum = -1;
+
tdep->num_byte_regs = 8;
tdep->num_word_regs = 8;
tdep->num_dword_regs = 0;
@@ -8075,6 +8477,12 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->bnd0r_regnum = -1;
tdep->bndcfgu_regnum = -1;
+ /* No AVX512 registers. */
+ tdep->k0_regnum = -1;
+ tdep->num_zmm_regs = 0;
+ tdep->num_ymm_avx512_regs = 0;
+ tdep->num_xmm_avx512_regs = 0;
+
tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
@@ -8106,7 +8514,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ tdep->num_dword_regs
+ tdep->num_mmx_regs
+ tdep->num_ymm_regs
- + num_bnd_cooked));
+ + num_bnd_cooked
+ + tdep->num_ymm_avx512_regs
+ + tdep->num_zmm_regs));
/* Target description may be changed. */
tdesc = tdep->tdesc;
@@ -8140,6 +8550,24 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
else
tdep->ymm0_regnum = -1;
+ if (tdep->num_ymm_avx512_regs)
+ {
+ /* Support YMM16-31 pseudo registers if available. */
+ tdep->ymm16_regnum = mm0_regnum;
+ mm0_regnum += tdep->num_ymm_avx512_regs;
+ }
+ else
+ tdep->ymm16_regnum = -1;
+
+ if (tdep->num_zmm_regs)
+ {
+ /* Support ZMM pseudo-register if it is available. */
+ tdep->zmm0_regnum = mm0_regnum;
+ mm0_regnum += tdep->num_zmm_regs;
+ }
+ else
+ tdep->zmm0_regnum = -1;
+
bnd0_regnum = mm0_regnum;
if (tdep->num_mmx_regs != 0)
{
@@ -8233,6 +8661,7 @@ is \"default\"."),
initialize_tdesc_i386_mmx ();
initialize_tdesc_i386_avx ();
initialize_tdesc_i386_mpx ();
+ initialize_tdesc_i386_avx512 ();
/* Tell remote stub that we support XML target description. */
register_remote_support_xml ("i386");
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 7413296..2ada2bd 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -87,6 +87,20 @@ struct gdbarch_tdep
of pseudo YMM register support. */
int ymm0_regnum;
+ /* Number of AVX512 OpMask registers (K-registers) */
+ int num_k_regs;
+
+ /* Register number for %k0. Set this to -1 to indicate the absence
+ of AVX512 OpMask register support. */
+ int k0_regnum;
+
+ /* Number of pseudo ZMM registers ($zmm0-$zmm31). */
+ int num_zmm_regs;
+
+ /* Register number for %zmm0. Set this to -1 to indicate the absence
+ of pseudo ZMM register support. */
+ int zmm0_regnum;
+
/* Number of byte registers. */
int num_byte_regs;
@@ -112,6 +126,18 @@ struct gdbarch_tdep
/* Number of SSE registers. */
int num_xmm_regs;
+ /* Number of SSE registers added in AVX512. */
+ int num_xmm_avx512_regs;
+
+ /* Register number of XMM16, the first XMM register added in AVX512. */
+ int xmm16_regnum;
+
+ /* Number of YMM registers added in AVX512. */
+ int num_ymm_avx512_regs;
+
+ /* Register number of YMM16, the first YMM register added in AVX512. */
+ int ymm16_regnum;
+
/* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
register), excluding the x87 bit, which are supported by this GDB. */
@@ -130,6 +156,13 @@ struct gdbarch_tdep
/* Upper YMM register names. Only used for tdesc_numbered_register. */
const char **ymmh_register_names;
+ /* Register number for %ymm16h. Set this to -1 to indicate the absence
+ of support for YMM16-31. */
+ int ymm16h_regnum;
+
+ /* YMM16-31 register names. Only used for tdesc_numbered_register. */
+ const char **ymm16h_register_names;
+
/* Register number for %bnd0r. Set this to -1 to indicate the absence
bound registers. */
int bnd0r_regnum;
@@ -145,6 +178,22 @@ struct gdbarch_tdep
/* MPX register names. Only used for tdesc_numbered_register. */
const char **mpx_register_names;
+ /* Register number for %zmm0h. Set this to -1 to indicate the absence
+ of ZMM_HI256 register support. */
+ int zmm0h_regnum;
+
+ /* OpMask register names. */
+ const char **k_register_names;
+
+ /* ZMM register names. Only used for tdesc_numbered_register. */
+ const char **zmmh_register_names;
+
+ /* XMM16-31 register names. Only used for tdesc_numbered_register. */
+ const char **xmm_avx512_register_names;
+
+ /* YMM16-31 register names. Only used for tdesc_numbered_register. */
+ const char **ymm_avx512_register_names;
+
/* Target description. */
const struct target_desc *tdesc;
@@ -179,6 +228,7 @@ struct gdbarch_tdep
/* ISA-specific data types. */
struct type *i386_mmx_type;
struct type *i386_ymm_type;
+ struct type *i386_zmm_type;
struct type *i387_ext_type;
struct type *i386_bnd_type;
@@ -232,7 +282,11 @@ enum i386_regnum
I386_BND0R_REGNUM,
I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
I386_BNDCFGU_REGNUM,
- I386_BNDSTATUS_REGNUM
+ I386_BNDSTATUS_REGNUM,
+ I386_K0_REGNUM, /* %k0 */
+ I386_K7_REGNUM = I386_K0_REGNUM + 7,
+ I386_ZMM0H_REGNUM, /* %zmm0h */
+ I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7
};
/* Register numbers of RECORD_REGMAP. */
@@ -271,9 +325,10 @@ enum record_i386_regnum
#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
+#define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
/* Size of the largest register. */
-#define I386_MAX_REGISTER_SIZE 16
+#define I386_MAX_REGISTER_SIZE 64
/* Types for i386-specific registers. */
extern struct type *i387_ext_type (struct gdbarch *gdbarch);
@@ -283,8 +338,13 @@ extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
int regnum);
diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c
index d24d322..c58a000 100644
--- a/gdb/i387-tdep.c
+++ b/gdb/i387-tdep.c
@@ -763,8 +763,61 @@ static int xsave_avxh_offset[] =
576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
};
-static int xsave_mpx_offset[] =
+#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
+
+/* At xsave_ymm_avx512_offset[REGNUM] you'll find the offset to the location in
+ the upper 128bit of ZMM register data structure used by the "xsave"
+ instruction where GDB register REGNUM is stored. */
+
+static int xsave_ymm_avx512_offset[] =
+{
+ /* HI16_ZMM_area + 16 bytes + regnum* 64 bytes. */
+ 1664 + 16 + 0 * 64, /* %ymm16 through... */
+ 1664 + 16 + 1 * 64,
+ 1664 + 16 + 2 * 64,
+ 1664 + 16 + 3 * 64,
+ 1664 + 16 + 4 * 64,
+ 1664 + 16 + 5 * 64,
+ 1664 + 16 + 6 * 64,
+ 1664 + 16 + 7 * 64,
+ 1664 + 16 + 8 * 64,
+ 1664 + 16 + 9 * 64,
+ 1664 + 16 + 10 * 64,
+ 1664 + 16 + 11 * 64,
+ 1664 + 16 + 12 * 64,
+ 1664 + 16 + 13 * 64,
+ 1664 + 16 + 14 * 64,
+ 1664 + 16 + 15 * 64 /* ... %ymm31 (128 bits each). */
+};
+
+#define XSAVE_YMM_AVX512_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_ymm_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)])
+
+static int xsave_xmm_avx512_offset[] =
{
+ 1664 + 0 * 64, /* %ymm16 through... */
+ 1664 + 1 * 64,
+ 1664 + 2 * 64,
+ 1664 + 3 * 64,
+ 1664 + 4 * 64,
+ 1664 + 5 * 64,
+ 1664 + 6 * 64,
+ 1664 + 7 * 64,
+ 1664 + 8 * 64,
+ 1664 + 9 * 64,
+ 1664 + 10 * 64,
+ 1664 + 11 * 64,
+ 1664 + 12 * 64,
+ 1664 + 13 * 64,
+ 1664 + 14 * 64,
+ 1664 + 15 * 64 /* ... %ymm31 (128 bits each). */
+};
+
+#define XSAVE_XMM_AVX512_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_xmm_avx512_offset[regnum - I387_XMM16_REGNUM (tdep)])
+
+static int xsave_mpx_offset[] = {
960 + 0 * 16, /* bnd0r...bnd3r registers. */
960 + 1 * 16,
960 + 2 * 16,
@@ -773,19 +826,79 @@ static int xsave_mpx_offset[] =
1024 + 1 * 8,
};
-#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
- (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
-
#define XSAVE_MPX_ADDR(tdep, xsave, regnum) \
(xsave + xsave_mpx_offset[regnum - I387_BND0R_REGNUM (tdep)])
+ /* At xsave_avx512__h_offset[REGNUM] you find the offset to the location
+ of the AVX512 opmask register data structure used by the "xsave"
+ instruction where GDB register REGNUM is stored. */
+
+static int xsave_avx512_k_offset[] =
+{
+ 1088 + 0 * 8, /* %k0 through... */
+ 1088 + 1 * 8,
+ 1088 + 2 * 8,
+ 1088 + 3 * 8,
+ 1088 + 4 * 8,
+ 1088 + 5 * 8,
+ 1088 + 6 * 8,
+ 1088 + 7 * 8 /* %k7 (64 bits each). */
+};
+
+#define XSAVE_AVX512_K_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_avx512_k_offset[regnum - I387_K0_REGNUM (tdep)])
+
+/* At xsave_avx512_zmm_h_offset[REGNUM] you find the offset to the location in
+ the upper 256bit of AVX512 ZMMH register data structure used by the "xsave"
+ instruction where GDB register REGNUM is stored. */
+
+static int xsave_avx512_zmm_h_offset[] =
+{
+ 1152 + 0 * 32,
+ 1152 + 1 * 32, /* Upper 256bit of %zmmh0 through... */
+ 1152 + 2 * 32,
+ 1152 + 3 * 32,
+ 1152 + 4 * 32,
+ 1152 + 5 * 32,
+ 1152 + 6 * 32,
+ 1152 + 7 * 32,
+ 1152 + 8 * 32,
+ 1152 + 9 * 32,
+ 1152 + 10 * 32,
+ 1152 + 11 * 32,
+ 1152 + 12 * 32,
+ 1152 + 13 * 32,
+ 1152 + 14 * 32,
+ 1152 + 15 * 32, /* Upper 256bit of... %zmmh15 (256 bits each). */
+ 1664 + 32 + 0 * 64, /* Upper 256bit of... %zmmh16 (256 bits each). */
+ 1664 + 32 + 1 * 64,
+ 1664 + 32 + 2 * 64,
+ 1664 + 32 + 3 * 64,
+ 1664 + 32 + 4 * 64,
+ 1664 + 32 + 5 * 64,
+ 1664 + 32 + 6 * 64,
+ 1664 + 32 + 7 * 64,
+ 1664 + 32 + 8 * 64,
+ 1664 + 32 + 9 * 64,
+ 1664 + 32 + 10 * 64,
+ 1664 + 32 + 11 * 64,
+ 1664 + 32 + 12 * 64,
+ 1664 + 32 + 13 * 64,
+ 1664 + 32 + 14 * 64,
+ 1664 + 32 + 15 * 64 /* Upper 256bit of... %zmmh31 (256 bits each). */
+};
+
+#define XSAVE_AVX512_ZMM_H_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_avx512_zmm_h_offset[regnum - I387_ZMM0H_REGNUM (tdep)])
+
/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
void
i387_supply_xsave (struct regcache *regcache, int regnum,
const void *xsave)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
const gdb_byte *regs = xsave;
int i;
unsigned int clear_bv;
@@ -797,7 +910,12 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
sse = 0x2,
avxh = 0x4,
mpx = 0x8,
- all = x87 | sse | avxh | mpx
+ avx512_k = 0x10,
+ avx512_zmm_h = 0x20,
+ avx512_ymmh_avx512 = 0x40,
+ avx512_xmm_avx512 = 0x80,
+ all = x87 | sse | avxh | mpx | avx512_k | avx512_zmm_h
+ | avx512_ymmh_avx512 | avx512_xmm_avx512
} regclass;
gdb_assert (regs != NULL);
@@ -806,13 +924,25 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
if (regnum == -1)
regclass = all;
+ else if (regnum >= I387_ZMM0H_REGNUM (tdep)
+ && regnum < I387_ZMMENDH_REGNUM (tdep))
+ regclass = avx512_zmm_h;
+ else if (regnum >= I387_K0_REGNUM (tdep)
+ && regnum < I387_KEND_REGNUM (tdep))
+ regclass = avx512_k;
+ else if (regnum >= I387_YMM16H_REGNUM (tdep)
+ && regnum < I387_YMMH_AVX512_END_REGNUM (tdep))
+ regclass = avx512_ymmh_avx512;
+ else if (regnum >= I387_XMM16_REGNUM (tdep)
+ && regnum < I387_XMM_AVX512_END_REGNUM (tdep))
+ regclass = avx512_xmm_avx512;
else if (regnum >= I387_YMM0H_REGNUM (tdep)
&& regnum < I387_YMMENDH_REGNUM (tdep))
regclass = avxh;
else if (regnum >= I387_BND0R_REGNUM (tdep)
&& regnum < I387_MPXEND_REGNUM (tdep))
regclass = mpx;
- else if (regnum >= I387_XMM0_REGNUM(tdep)
+ else if (regnum >= I387_XMM0_REGNUM (tdep)
&& regnum < I387_MXCSR_REGNUM (tdep))
regclass = sse;
else if (regnum >= I387_ST0_REGNUM (tdep)
@@ -847,6 +977,38 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
case none:
break;
+ case avx512_zmm_h:
+ if ((clear_bv & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ regcache_raw_supply (regcache, regnum, zero);
+ else
+ regcache_raw_supply (regcache, regnum,
+ XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, regnum));
+ return;
+
+ case avx512_k:
+ if ((clear_bv & I386_XSTATE_K))
+ regcache_raw_supply (regcache, regnum, zero);
+ else
+ regcache_raw_supply (regcache, regnum,
+ XSAVE_AVX512_K_ADDR (tdep, regs, regnum));
+ return;
+
+ case avx512_ymmh_avx512:
+ if ((clear_bv & I386_XSTATE_ZMM))
+ regcache_raw_supply (regcache, regnum, zero);
+ else
+ regcache_raw_supply (regcache, regnum,
+ XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum));
+ return;
+
+ case avx512_xmm_avx512:
+ if ((clear_bv & I386_XSTATE_ZMM))
+ regcache_raw_supply (regcache, regnum, zero);
+ else
+ regcache_raw_supply (regcache, regnum,
+ XSAVE_XMM_AVX512_ADDR (tdep, regs, regnum));
+ return;
+
case avxh:
if ((clear_bv & I386_XSTATE_AVX))
regcache_raw_supply (regcache, regnum, zero);
@@ -880,6 +1042,74 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
return;
case all:
+ /* Handle the upper ZMM registers. */
+ if ((tdep->xcr0 & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ {
+ if ((clear_bv & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ {
+ for (i = I387_ZMM0H_REGNUM (tdep);
+ i < I387_ZMMENDH_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i, zero);
+ }
+ else
+ {
+ for (i = I387_ZMM0H_REGNUM (tdep);
+ i < I387_ZMMENDH_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i));
+ }
+ }
+
+ /* Handle AVX512 OpMask registers. */
+ if ((tdep->xcr0 & I386_XSTATE_K))
+ {
+ if ((clear_bv & I386_XSTATE_K))
+ {
+ for (i = I387_K0_REGNUM (tdep);
+ i < I387_KEND_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i, zero);
+ }
+ else
+ {
+ for (i = I387_K0_REGNUM (tdep);
+ i < I387_KEND_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_AVX512_K_ADDR (tdep, regs, i));
+ }
+ }
+
+ /* Handle the YMM_AVX512 registers. */
+ if ((tdep->xcr0 & I386_XSTATE_ZMM))
+ {
+ if ((clear_bv & I386_XSTATE_ZMM))
+ {
+ for (i = I387_YMM16H_REGNUM (tdep);
+ i < I387_YMMH_AVX512_END_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i, zero);
+ for (i = I387_XMM16_REGNUM (tdep);
+ i < I387_XMM_AVX512_END_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i, zero);
+ }
+ else
+ {
+ for (i = I387_YMM16H_REGNUM (tdep);
+ i < I387_YMMH_AVX512_END_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_YMM_AVX512_ADDR (tdep, regs, i));
+ for (i = I387_XMM16_REGNUM (tdep);
+ i < I387_XMM_AVX512_END_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_XMM_AVX512_ADDR (tdep, regs, i));
+ }
+ }
/* Handle the upper YMM registers. */
if ((tdep->xcr0 & I386_XSTATE_AVX))
{
@@ -1040,7 +1270,8 @@ void
i387_collect_xsave (const struct regcache *regcache, int regnum,
void *xsave, int gcore)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
gdb_byte *regs = xsave;
int i;
enum
@@ -1051,7 +1282,12 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
sse = 0x4 | check,
avxh = 0x8 | check,
mpx = 0x10 | check,
- all = x87 | sse | avxh | mpx
+ avx512_k = 0x20 | check,
+ avx512_zmm_h = 0x40 | check,
+ avx512_ymmh_avx512 = 0x80 | check,
+ avx512_xmm_avx512 = 0x100 | check,
+ all = x87 | sse | avxh | mpx | avx512_k | avx512_zmm_h
+ | avx512_ymmh_avx512 | avx512_xmm_avx512
} regclass;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
@@ -1059,6 +1295,18 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
if (regnum == -1)
regclass = all;
+ else if (regnum >= I387_ZMM0H_REGNUM (tdep)
+ && regnum < I387_ZMMENDH_REGNUM (tdep))
+ regclass = avx512_zmm_h;
+ else if (regnum >= I387_K0_REGNUM (tdep)
+ && regnum < I387_KEND_REGNUM (tdep))
+ regclass = avx512_k;
+ else if (regnum >= I387_YMM16H_REGNUM (tdep)
+ && regnum < I387_YMMH_AVX512_END_REGNUM (tdep))
+ regclass = avx512_ymmh_avx512;
+ else if (regnum >= I387_XMM16_REGNUM (tdep)
+ && regnum < I387_XMM_AVX512_END_REGNUM (tdep))
+ regclass = avx512_xmm_avx512;
else if (regnum >= I387_YMM0H_REGNUM (tdep)
&& regnum < I387_YMMENDH_REGNUM (tdep))
regclass = avxh;
@@ -1107,6 +1355,26 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
i < I387_MPXEND_REGNUM (tdep); i++)
memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 8);
+ if ((clear_bv & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ for (i = I387_ZMM0H_REGNUM (tdep);
+ i < I387_ZMMENDH_REGNUM (tdep); i++)
+ memset (XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i), 0, 32);
+
+ if ((clear_bv & I386_XSTATE_K))
+ for (i = I387_K0_REGNUM (tdep);
+ i < I387_KEND_REGNUM (tdep); i++)
+ memset (XSAVE_AVX512_K_ADDR (tdep, regs, i), 0, 8);
+
+ if ((clear_bv & I386_XSTATE_ZMM))
+ {
+ for (i = I387_YMM16H_REGNUM (tdep);
+ i < I387_YMMH_AVX512_END_REGNUM (tdep); i++)
+ memset (XSAVE_YMM_AVX512_ADDR (tdep, regs, i), 0, 16);
+ for (i = I387_XMM16_REGNUM (tdep);
+ i < I387_XMM_AVX512_END_REGNUM (tdep); i++)
+ memset (XSAVE_XMM_AVX512_ADDR (tdep, regs, i), 0, 16);
+ }
+
if ((clear_bv & I386_XSTATE_AVX))
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep); i++)
@@ -1125,6 +1393,61 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
if (regclass == all)
{
+ /* Check if any ZMMH registers are changed. */
+ if ((tdep->xcr0 & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ for (i = I387_ZMM0H_REGNUM (tdep);
+ i < I387_ZMMENDH_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 32) != 0)
+ {
+ xstate_bv |= (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM);
+ memcpy (p, raw, 32);
+ }
+ }
+
+ /* Check if any K registers are changed. */
+ if ((tdep->xcr0 & I386_XSTATE_K))
+ for (i = I387_K0_REGNUM (tdep);
+ i < I387_KEND_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_AVX512_K_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 8) != 0)
+ {
+ xstate_bv |= I386_XSTATE_K;
+ memcpy (p, raw, 8);
+ }
+ }
+
+ /* Check if any XMM or upper YMM registers are changed. */
+ if ((tdep->xcr0 & I386_XSTATE_ZMM))
+ {
+ for (i = I387_YMM16H_REGNUM (tdep);
+ i < I387_YMMH_AVX512_END_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_YMM_AVX512_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 16) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 16);
+ }
+ }
+ for (i = I387_XMM16_REGNUM (tdep);
+ i < I387_XMM_AVX512_END_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_XMM_AVX512_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 16) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 16);
+ }
+ }
+ }
+
/* Check if any upper YMM registers are changed. */
if ((tdep->xcr0 & I386_XSTATE_AVX))
for (i = I387_YMM0H_REGNUM (tdep);
@@ -1205,6 +1528,45 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
internal_error (__FILE__, __LINE__,
_("invalid i387 regclass"));
+ case avx512_zmm_h:
+ /* This is a ZMM register. */
+ p = XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, regnum);
+ if (memcmp (raw, p, 32) != 0)
+ {
+ xstate_bv |= (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM);
+ memcpy (p, raw, 32);
+ }
+ break;
+ case avx512_k:
+ /* This is a AVX512 mask register. */
+ p = XSAVE_AVX512_K_ADDR (tdep, regs, regnum);
+ if (memcmp (raw, p, 8) != 0)
+ {
+ xstate_bv |= I386_XSTATE_K;
+ memcpy (p, raw, 8);
+ }
+ break;
+
+ case avx512_ymmh_avx512:
+ /* This is an upper YMM16-31 register. */
+ p = XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum);
+ if (memcmp (raw, p, 16) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 16);
+ }
+ break;
+
+ case avx512_xmm_avx512:
+ /* This is an upper XMM16-31 register. */
+ p = XSAVE_XMM_AVX512_ADDR (tdep, regs, regnum);
+ if (memcmp (raw, p, 16) != 0)
+ {
+ xstate_bv |= I386_XSTATE_ZMM;
+ memcpy (p, raw, 16);
+ }
+ break;
+
case avxh:
/* This is an upper YMM register. */
p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
@@ -1276,6 +1638,10 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
case sse:
case avxh:
case mpx:
+ case avx512_k:
+ case avx512_zmm_h:
+ case avx512_ymmh_avx512:
+ case avx512_xmm_avx512:
/* Register REGNUM has been updated. Return. */
return;
}
diff --git a/gdb/i387-tdep.h b/gdb/i387-tdep.h
index 3b3ddc4..e2eb0f5 100644
--- a/gdb/i387-tdep.h
+++ b/gdb/i387-tdep.h
@@ -31,9 +31,11 @@ struct ui_file;
#define I387_ST0_REGNUM(tdep) ((tdep)->st0_regnum)
#define I387_NUM_XMM_REGS(tdep) ((tdep)->num_xmm_regs)
+#define I387_NUM_XMM_AVX512_REGS(tdep) ((tdep)->num_xmm_avx512_regs)
#define I387_MM0_REGNUM(tdep) ((tdep)->mm0_regnum)
#define I387_NUM_YMM_REGS(tdep) ((tdep)->num_ymm_regs)
#define I387_YMM0H_REGNUM(tdep) ((tdep)->ymm0h_regnum)
+
#define I387_BND0R_REGNUM(tdep) ((tdep)->bnd0r_regnum)
#define I387_BNDCFGU_REGNUM(tdep) ((tdep)->bndcfgu_regnum)
@@ -41,6 +43,13 @@ struct ui_file;
#define I387_NUM_MPX_REGS 6
#define I387_NUM_BND_REGS 4
#define I387_NUM_MPX_CTRL_REGS 2
+#define I387_NUM_K_REGS 8
+
+#define I387_K0_REGNUM(tdep) ((tdep)->k0_regnum)
+#define I387_NUM_ZMMH_REGS(tdep) ((tdep)->num_zmm_regs)
+#define I387_ZMM0H_REGNUM(tdep) ((tdep)->zmm0h_regnum)
+#define I387_NUM_YMM_AVX512_REGS(tdep) ((tdep)->num_ymm_avx512_regs)
+#define I387_YMM16H_REGNUM(tdep) ((tdep)->ymm16h_regnum)
#define I387_FCTRL_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 8)
#define I387_FSTAT_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 1)
@@ -51,13 +60,25 @@ struct ui_file;
#define I387_FOOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 6)
#define I387_FOP_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 7)
#define I387_XMM0_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 16)
+#define I387_XMM16_REGNUM(tdep) ((tdep)->xmm16_regnum)
#define I387_MXCSR_REGNUM(tdep) \
(I387_XMM0_REGNUM (tdep) + I387_NUM_XMM_REGS (tdep))
+#define I387_YMM0_REGNUM(tdep) (I387_MXCSR_REGNUM(tdep) + 1)
#define I387_YMMENDH_REGNUM(tdep) \
(I387_YMM0H_REGNUM (tdep) + I387_NUM_YMM_REGS (tdep))
+
#define I387_MPXEND_REGNUM(tdep) \
(I387_BND0R_REGNUM (tdep) + I387_NUM_MPX_REGS)
+#define I387_KEND_REGNUM(tdep) \
+ (I387_K0_REGNUM (tdep) + I387_NUM_K_REGS)
+#define I387_ZMMENDH_REGNUM(tdep) \
+ (I387_ZMM0H_REGNUM (tdep) + I387_NUM_ZMMH_REGS (tdep))
+#define I387_YMMH_AVX512_END_REGNUM(tdep) \
+ (I387_YMM16H_REGNUM (tdep) + I387_NUM_YMM_AVX512_REGS (tdep))
+#define I387_XMM_AVX512_END_REGNUM(tdep) \
+ (I387_XMM16_REGNUM (tdep) + I387_NUM_XMM_AVX512_REGS (tdep))
+
/* Print out the i387 floating point state. */
extern void i387_print_float_info (struct gdbarch *gdbarch,
diff --git a/gdb/regformats/i386/amd64-avx512-linux.dat b/gdb/regformats/i386/amd64-avx512-linux.dat
new file mode 100644
index 0000000..2203593
--- /dev/null
+++ b/gdb/regformats/i386/amd64-avx512-linux.dat
@@ -0,0 +1,156 @@
+# DO NOT EDIT: generated from i386/amd64-avx512-linux.xml
+name:amd64_avx512_linux
+xmltarget:amd64-avx512-linux.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+64:orig_rax
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
+128:xmm16
+128:xmm17
+128:xmm18
+128:xmm19
+128:xmm20
+128:xmm21
+128:xmm22
+128:xmm23
+128:xmm24
+128:xmm25
+128:xmm26
+128:xmm27
+128:xmm28
+128:xmm29
+128:xmm30
+128:xmm31
+128:ymm16h
+128:ymm17h
+128:ymm18h
+128:ymm19h
+128:ymm20h
+128:ymm21h
+128:ymm22h
+128:ymm23h
+128:ymm24h
+128:ymm25h
+128:ymm26h
+128:ymm27h
+128:ymm28h
+128:ymm29h
+128:ymm30h
+128:ymm31h
+64:k0
+64:k1
+64:k2
+64:k3
+64:k4
+64:k5
+64:k6
+64:k7
+256:zmm0h
+256:zmm1h
+256:zmm2h
+256:zmm3h
+256:zmm4h
+256:zmm5h
+256:zmm6h
+256:zmm7h
+256:zmm8h
+256:zmm9h
+256:zmm10h
+256:zmm11h
+256:zmm12h
+256:zmm13h
+256:zmm14h
+256:zmm15h
+256:zmm16h
+256:zmm17h
+256:zmm18h
+256:zmm19h
+256:zmm20h
+256:zmm21h
+256:zmm22h
+256:zmm23h
+256:zmm24h
+256:zmm25h
+256:zmm26h
+256:zmm27h
+256:zmm28h
+256:zmm29h
+256:zmm30h
+256:zmm31h
diff --git a/gdb/regformats/i386/amd64-avx512.dat b/gdb/regformats/i386/amd64-avx512.dat
new file mode 100644
index 0000000..4252eeb
--- /dev/null
+++ b/gdb/regformats/i386/amd64-avx512.dat
@@ -0,0 +1,155 @@
+# DO NOT EDIT: generated from i386/amd64-avx512.xml
+name:amd64_avx512
+xmltarget:amd64-avx512.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
+128:xmm16
+128:xmm17
+128:xmm18
+128:xmm19
+128:xmm20
+128:xmm21
+128:xmm22
+128:xmm23
+128:xmm24
+128:xmm25
+128:xmm26
+128:xmm27
+128:xmm28
+128:xmm29
+128:xmm30
+128:xmm31
+128:ymm16h
+128:ymm17h
+128:ymm18h
+128:ymm19h
+128:ymm20h
+128:ymm21h
+128:ymm22h
+128:ymm23h
+128:ymm24h
+128:ymm25h
+128:ymm26h
+128:ymm27h
+128:ymm28h
+128:ymm29h
+128:ymm30h
+128:ymm31h
+64:k0
+64:k1
+64:k2
+64:k3
+64:k4
+64:k5
+64:k6
+64:k7
+256:zmm0h
+256:zmm1h
+256:zmm2h
+256:zmm3h
+256:zmm4h
+256:zmm5h
+256:zmm6h
+256:zmm7h
+256:zmm8h
+256:zmm9h
+256:zmm10h
+256:zmm11h
+256:zmm12h
+256:zmm13h
+256:zmm14h
+256:zmm15h
+256:zmm16h
+256:zmm17h
+256:zmm18h
+256:zmm19h
+256:zmm20h
+256:zmm21h
+256:zmm22h
+256:zmm23h
+256:zmm24h
+256:zmm25h
+256:zmm26h
+256:zmm27h
+256:zmm28h
+256:zmm29h
+256:zmm30h
+256:zmm31h
diff --git a/gdb/regformats/i386/i386-avx512-linux.dat b/gdb/regformats/i386/i386-avx512-linux.dat
new file mode 100644
index 0000000..389751d
--- /dev/null
+++ b/gdb/regformats/i386/i386-avx512-linux.dat
@@ -0,0 +1,76 @@
+# DO NOT EDIT: generated from i386/i386-avx512-linux.xml
+name:i386_avx512_linux
+xmltarget:i386-avx512-linux.xml
+expedite:ebp,esp,eip
+32:eax
+32:ecx
+32:edx
+32:ebx
+32:esp
+32:ebp
+32:esi
+32:edi
+32:eip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+32:mxcsr
+32:orig_eax
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
+64:k0
+64:k1
+64:k2
+64:k3
+64:k4
+64:k5
+64:k6
+64:k7
+256:zmm0h
+256:zmm1h
+256:zmm2h
+256:zmm3h
+256:zmm4h
+256:zmm5h
+256:zmm6h
+256:zmm7h
diff --git a/gdb/regformats/i386/i386-avx512.dat b/gdb/regformats/i386/i386-avx512.dat
new file mode 100644
index 0000000..88d5fb2
--- /dev/null
+++ b/gdb/regformats/i386/i386-avx512.dat
@@ -0,0 +1,75 @@
+# DO NOT EDIT: generated from i386/i386-avx512.xml
+name:i386_avx512
+xmltarget:i386-avx512.xml
+expedite:ebp,esp,eip
+32:eax
+32:ecx
+32:edx
+32:ebx
+32:esp
+32:ebp
+32:esi
+32:edi
+32:eip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+32:mxcsr
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
+64:k0
+64:k1
+64:k2
+64:k3
+64:k4
+64:k5
+64:k6
+64:k7
+256:zmm0h
+256:zmm1h
+256:zmm2h
+256:zmm3h
+256:zmm4h
+256:zmm5h
+256:zmm6h
+256:zmm7h
diff --git a/gdb/regformats/i386/x32-avx512-linux.dat b/gdb/regformats/i386/x32-avx512-linux.dat
new file mode 100644
index 0000000..1c0fddd
--- /dev/null
+++ b/gdb/regformats/i386/x32-avx512-linux.dat
@@ -0,0 +1,156 @@
+# DO NOT EDIT: generated from i386/x32-avx512-linux.xml
+name:x32_avx512_linux
+xmltarget:x32-avx512-linux.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+64:orig_rax
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
+128:xmm16
+128:xmm17
+128:xmm18
+128:xmm19
+128:xmm20
+128:xmm21
+128:xmm22
+128:xmm23
+128:xmm24
+128:xmm25
+128:xmm26
+128:xmm27
+128:xmm28
+128:xmm29
+128:xmm30
+128:xmm31
+128:ymm16h
+128:ymm17h
+128:ymm18h
+128:ymm19h
+128:ymm20h
+128:ymm21h
+128:ymm22h
+128:ymm23h
+128:ymm24h
+128:ymm25h
+128:ymm26h
+128:ymm27h
+128:ymm28h
+128:ymm29h
+128:ymm30h
+128:ymm31h
+64:k0
+64:k1
+64:k2
+64:k3
+64:k4
+64:k5
+64:k6
+64:k7
+256:zmm0h
+256:zmm1h
+256:zmm2h
+256:zmm3h
+256:zmm4h
+256:zmm5h
+256:zmm6h
+256:zmm7h
+256:zmm8h
+256:zmm9h
+256:zmm10h
+256:zmm11h
+256:zmm12h
+256:zmm13h
+256:zmm14h
+256:zmm15h
+256:zmm16h
+256:zmm17h
+256:zmm18h
+256:zmm19h
+256:zmm20h
+256:zmm21h
+256:zmm22h
+256:zmm23h
+256:zmm24h
+256:zmm25h
+256:zmm26h
+256:zmm27h
+256:zmm28h
+256:zmm29h
+256:zmm30h
+256:zmm31h
diff --git a/gdb/regformats/i386/x32-avx512.dat b/gdb/regformats/i386/x32-avx512.dat
new file mode 100644
index 0000000..f3b573e
--- /dev/null
+++ b/gdb/regformats/i386/x32-avx512.dat
@@ -0,0 +1,155 @@
+# DO NOT EDIT: generated from i386/x32-avx512.xml
+name:x32_avx512
+xmltarget:x32-avx512.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
+128:xmm16
+128:xmm17
+128:xmm18
+128:xmm19
+128:xmm20
+128:xmm21
+128:xmm22
+128:xmm23
+128:xmm24
+128:xmm25
+128:xmm26
+128:xmm27
+128:xmm28
+128:xmm29
+128:xmm30
+128:xmm31
+128:ymm16h
+128:ymm17h
+128:ymm18h
+128:ymm19h
+128:ymm20h
+128:ymm21h
+128:ymm22h
+128:ymm23h
+128:ymm24h
+128:ymm25h
+128:ymm26h
+128:ymm27h
+128:ymm28h
+128:ymm29h
+128:ymm30h
+128:ymm31h
+64:k0
+64:k1
+64:k2
+64:k3
+64:k4
+64:k5
+64:k6
+64:k7
+256:zmm0h
+256:zmm1h
+256:zmm2h
+256:zmm3h
+256:zmm4h
+256:zmm5h
+256:zmm6h
+256:zmm7h
+256:zmm8h
+256:zmm9h
+256:zmm10h
+256:zmm11h
+256:zmm12h
+256:zmm13h
+256:zmm14h
+256:zmm15h
+256:zmm16h
+256:zmm17h
+256:zmm18h
+256:zmm19h
+256:zmm20h
+256:zmm21h
+256:zmm22h
+256:zmm23h
+256:zmm24h
+256:zmm25h
+256:zmm26h
+256:zmm27h
+256:zmm28h
+256:zmm29h
+256:zmm30h
+256:zmm31h
diff --git a/gdb/testsuite/gdb.arch/Makefile.in b/gdb/testsuite/gdb.arch/Makefile.in
index 658c7ad..9aaf1ce 100644
--- a/gdb/testsuite/gdb.arch/Makefile.in
+++ b/gdb/testsuite/gdb.arch/Makefile.in
@@ -3,7 +3,7 @@ srcdir = @srcdir@
EXECUTABLES = altivec-abi altivec-regs amd64-byte amd64-disp-step amd64-dword \
amd64-entry-value amd64-i386-address amd64-word i386-bp_permanent \
- i386-permbkpt i386-avx i386-signal i386-sse sparc-sysstep
+ i386-permbkpt i386-avx i386-avx512 i386-signal i386-sse sparc-sysstep
all info install-info dvi install uninstall installcheck check:
@echo "Nothing to be done for $@..."
diff --git a/gdb/testsuite/gdb.arch/i386-avx512.c b/gdb/testsuite/gdb.arch/i386-avx512.c
new file mode 100644
index 0000000..3a9d7a5
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-avx512.c
@@ -0,0 +1,255 @@
+/* Test program for AVX 512 registers.
+
+ Copyright 2014 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "i386-cpuid.h"
+
+typedef struct
+{
+ double f[8];
+} v8sd_t;
+
+short k_data[] =
+{
+ 0x1211,
+ 0x2221,
+ 0x3231,
+ 0x4241,
+ 0x5251,
+ 0x6261,
+ 0x7271
+};
+
+v8sd_t zmm_data[] =
+{
+ { { 0.0, 0.125, 0.25, 0.375, 0.50, 0.625, 0.75, 0.875 } },
+ { { 1.0, 1.125, 1.25, 1.375, 1.50, 1.625, 1.75, 1.875 } },
+ { { 2.0, 2.125, 2.25, 2.375, 2.50, 2.625, 2.75, 2.875 } },
+ { { 3.0, 3.125, 3.25, 3.375, 3.50, 3.625, 3.75, 3.875 } },
+ { { 4.0, 4.125, 4.25, 4.375, 4.50, 4.625, 4.75, 4.875 } },
+ { { 5.0, 5.125, 5.25, 5.375, 5.50, 5.625, 5.75, 5.875 } },
+ { { 6.0, 6.125, 6.25, 6.375, 6.50, 6.625, 6.75, 6.875 } },
+ { { 7.0, 7.125, 7.25, 7.375, 7.50, 7.625, 7.75, 7.875 } },
+#ifdef __x86_64__
+ { { 8.0, 8.125, 8.25, 8.375, 8.50, 8.625, 8.75, 8.875 } },
+ { { 9.0, 9.125, 9.25, 9.375, 9.50, 9.625, 9.75, 9.875 } },
+ { { 10.0, 10.125, 10.25, 10.375, 10.50, 10.625, 10.75, 10.875 } },
+ { { 11.0, 11.125, 11.25, 11.375, 11.50, 11.625, 11.75, 11.875 } },
+ { { 12.0, 12.125, 12.25, 12.375, 12.50, 12.625, 12.75, 12.875 } },
+ { { 13.0, 13.125, 13.25, 13.375, 13.50, 13.625, 13.75, 13.875 } },
+ { { 14.0, 14.125, 14.25, 14.375, 14.50, 14.625, 14.75, 14.875 } },
+ { { 15.0, 15.125, 15.25, 15.375, 15.50, 15.625, 15.75, 15.875 } },
+ { { 16.0, 16.125, 16.25, 16.375, 16.50, 16.625, 16.75, 16.875 } },
+ { { 17.0, 17.125, 17.25, 17.375, 17.50, 17.625, 17.75, 17.875 } },
+ { { 18.0, 18.125, 18.25, 18.375, 18.50, 18.625, 18.75, 18.875 } },
+ { { 19.0, 19.125, 19.25, 19.375, 19.50, 19.625, 19.75, 19.875 } },
+ { { 20.0, 20.125, 20.25, 20.375, 20.50, 20.625, 20.75, 20.875 } },
+ { { 21.0, 21.125, 21.25, 21.375, 21.50, 21.625, 21.75, 21.875 } },
+ { { 22.0, 22.125, 22.25, 22.375, 22.50, 22.625, 22.75, 22.875 } },
+ { { 23.0, 23.125, 23.25, 23.375, 23.50, 23.625, 23.75, 23.875 } },
+ { { 24.0, 24.125, 24.25, 24.375, 24.50, 24.625, 24.75, 24.875 } },
+ { { 25.0, 25.125, 25.25, 25.375, 25.50, 25.625, 25.75, 25.875 } },
+ { { 26.0, 26.125, 26.25, 26.375, 26.50, 26.625, 26.75, 26.875 } },
+ { { 27.0, 27.125, 27.25, 27.375, 27.50, 27.625, 27.75, 27.875 } },
+ { { 28.0, 28.125, 28.25, 28.375, 28.50, 28.625, 28.75, 28.875 } },
+ { { 29.0, 29.125, 29.25, 29.375, 29.50, 29.625, 29.75, 29.875 } },
+ { { 30.0, 30.125, 30.25, 30.375, 30.50, 30.625, 30.75, 30.875 } },
+ { { 31.0, 31.125, 31.25, 31.375, 31.50, 31.625, 31.75, 31.875 } },
+ { { 32.0, 32.125, 32.25, 32.375, 32.50, 32.625, 32.75, 32.875 } },
+#endif
+};
+
+int
+have_avx512 (void)
+{
+ unsigned int eax, ebx, ecx, edx, max_level, vendor, has_osxsave, has_avx512f;
+
+ max_level = __get_cpuid_max (0, &vendor);
+ __cpuid (1, eax, ebx, ecx, edx);
+
+ has_osxsave = ecx & bit_OSXSAVE;
+
+ if (max_level >= 7)
+ {
+ __cpuid_count (7, 0, eax, ebx, ecx, edx);
+ has_avx512f = ebx & bit_AVX512F;
+ }
+
+ if (has_osxsave && has_avx512f)
+ return 1;
+ else
+ return 0;
+}
+
+void
+move_k_data_to_reg ()
+{
+ asm ("kmovw 0(%0), %%k1\n\t"
+ "kmovw 2(%0), %%k2\n\t"
+ "kmovw 4(%0), %%k3\n\t"
+ "kmovw 6(%0), %%k4\n\t"
+ "kmovw 8(%0), %%k5\n\t"
+ "kmovw 10(%0), %%k6\n\t"
+ "kmovw 12(%0), %%k7\n\t"
+ : /* no output operands */
+ : "r" (k_data));
+}
+
+void
+move_k_data_to_memory ()
+{
+ asm ("kmovw %%k1, 0(%0) \n\t"
+ "kmovw %%k2, 2(%0) \n\t"
+ "kmovw %%k3, 4(%0) \n\t"
+ "kmovw %%k4, 6(%0) \n\t"
+ "kmovw %%k5, 8(%0) \n\t"
+ "kmovw %%k6, 10(%0) \n\t"
+ "kmovw %%k7, 12(%0) \n\t"
+ : /* no output operands */
+ : "r" (k_data));
+}
+
+void
+move_zmm_data_to_reg ()
+{
+ asm ("vmovaps 0(%0), %%zmm0\n\t"
+ "vmovaps 64(%0), %%zmm1\n\t"
+ "vmovaps 128(%0), %%zmm2\n\t"
+ "vmovaps 192(%0), %%zmm3\n\t"
+ "vmovaps 256(%0), %%zmm4\n\t"
+ "vmovaps 320(%0), %%zmm5\n\t"
+ "vmovaps 384(%0), %%zmm6\n\t"
+ "vmovaps 448(%0), %%zmm7\n\t"
+ : /* no output operands */
+ : "r" (zmm_data));
+#ifdef __x86_64__
+ asm ("vmovaps 512(%0), %%zmm8\n\t"
+ "vmovaps 576(%0), %%zmm9\n\t"
+ "vmovaps 640(%0), %%zmm10\n\t"
+ "vmovaps 704(%0), %%zmm11\n\t"
+ "vmovaps 768(%0), %%zmm12\n\t"
+ "vmovaps 832(%0), %%zmm13\n\t"
+ "vmovaps 896(%0), %%zmm14\n\t"
+ "vmovaps 960(%0), %%zmm15\n\t"
+ : /* no output operands */
+ : "r" (zmm_data));
+
+ asm ("vmovaps 1024(%0), %%zmm16\n\t"
+ "vmovaps 1088(%0), %%zmm17\n\t"
+ "vmovaps 1152(%0), %%zmm18\n\t"
+ "vmovaps 1216(%0), %%zmm19\n\t"
+ "vmovaps 1280(%0), %%zmm20\n\t"
+ "vmovaps 1344(%0), %%zmm21\n\t"
+ "vmovaps 1408(%0), %%zmm22\n\t"
+ "vmovaps 1472(%0), %%zmm23\n\t"
+ "vmovaps 1536(%0), %%zmm24\n\t"
+ "vmovaps 1600(%0), %%zmm25\n\t"
+ "vmovaps 1664(%0), %%zmm26\n\t"
+ "vmovaps 1728(%0), %%zmm27\n\t"
+ "vmovaps 1792(%0), %%zmm28\n\t"
+ "vmovaps 1856(%0), %%zmm29\n\t"
+ "vmovaps 1920(%0), %%zmm30\n\t"
+ "vmovaps 1984(%0), %%zmm31\n\t"
+ : /* no output operands */
+ : "r" (zmm_data));
+#endif
+}
+
+void
+move_zmm_data_to_memory ()
+{
+ asm ("vmovaps %%zmm0, 0(%0)\n\t"
+ "vmovaps %%zmm1, 64(%0)\n\t"
+ "vmovaps %%zmm2, 128(%0)\n\t"
+ "vmovaps %%zmm3, 192(%0)\n\t"
+ "vmovaps %%zmm4, 256(%0)\n\t"
+ "vmovaps %%zmm5, 320(%0)\n\t"
+ "vmovaps %%zmm6, 384(%0)\n\t"
+ "vmovaps %%zmm7, 448(%0)\n\t"
+ : /* no output operands */
+ : "r" (zmm_data));
+#ifdef __x86_64__
+ asm ("vmovaps %%zmm8, 512(%0)\n\t"
+ "vmovaps %%zmm9, 576(%0)\n\t"
+ "vmovaps %%zmm10, 640(%0)\n\t"
+ "vmovaps %%zmm11, 704(%0)\n\t"
+ "vmovaps %%zmm12, 768(%0)\n\t"
+ "vmovaps %%zmm13, 832(%0)\n\t"
+ "vmovaps %%zmm14, 896(%0)\n\t"
+ "vmovaps %%zmm15, 960(%0)\n\t"
+ : /* no output operands */
+ : "r" (zmm_data));
+
+ asm ("vmovaps %%zmm16, 1024(%0)\n\t"
+ "vmovaps %%zmm17, 1088(%0)\n\t"
+ "vmovaps %%zmm18, 1152(%0)\n\t"
+ "vmovaps %%zmm19, 1216(%0)\n\t"
+ "vmovaps %%zmm20, 1280(%0)\n\t"
+ "vmovaps %%zmm21, 1344(%0)\n\t"
+ "vmovaps %%zmm22, 1408(%0)\n\t"
+ "vmovaps %%zmm23, 1472(%0)\n\t"
+ "vmovaps %%zmm24, 1536(%0)\n\t"
+ "vmovaps %%zmm25, 1600(%0)\n\t"
+ "vmovaps %%zmm26, 1664(%0)\n\t"
+ "vmovaps %%zmm27, 1728(%0)\n\t"
+ "vmovaps %%zmm28, 1792(%0)\n\t"
+ "vmovaps %%zmm29, 1856(%0)\n\t"
+ "vmovaps %%zmm30, 1920(%0)\n\t"
+ "vmovaps %%zmm31, 1984(%0)\n\t"
+ : /* no output operands */
+ : "r" (zmm_data));
+#endif
+}
+
+int
+main (int argc, char **argv)
+{
+ if (have_avx512 ())
+ {
+ /* Test for K registers. */
+ move_k_data_to_reg ();
+ asm ("nop"); /* first breakpoint here */
+
+ move_k_data_to_memory ();
+ asm ("nop"); /* second breakpoint here */
+
+ /* Test for ZMM registers. */
+ /* Move initial values from array to registers and read from ZMM regs. */
+ move_zmm_data_to_reg ();
+ asm ("nop"); /* third breakpoint here */
+
+ /* Test script incremented values,
+ move back to array and check values. */
+ move_zmm_data_to_memory ();
+ asm ("nop"); /* fourth breakpoint here */
+
+ /* Test for YMM registers. */
+ /* Test script incremented YMM values,
+ move back to array and check values. */
+ move_zmm_data_to_memory ();
+ asm ("nop"); /* fifth breakpoint here */
+
+ /* Test for XMM registers. */
+ /* Test script incremented XMM values,
+ move back to array and check values. */
+ move_zmm_data_to_memory ();
+ asm ("nop"); /* sixth breakpoint here */
+ }
+
+ return 0;
+}
diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp b/gdb/testsuite/gdb.arch/i386-avx512.exp
new file mode 100644
index 0000000..1ee9290
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-avx512.exp
@@ -0,0 +1,177 @@
+# Copyright 2014 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# bug-gdb@gnu.org
+
+# This file is part of the gdb testsuite.
+
+
+if { ![istarget i?86-*-*] && ![istarget x86_64-*-* ] } {
+ verbose "Skipping x86 AVX512 tests."
+ return
+}
+
+standard_testfile
+
+set comp_flags "-mavx512f -I${srcdir}/../common"
+
+if { [prepare_for_testing ${testfile}.exp ${testfile} ${srcfile} \
+ [list debug nowarnings additional_flags=${comp_flags}]] } {
+ return -1
+}
+
+if ![runto_main] {
+ untested "could not run to main"
+ return -1
+}
+
+set supports_avx512 0
+
+set test "probe AVX512 support"
+gdb_test_multiple "print have_avx512()" $test {
+ -re ".. = 1\r\n$gdb_prompt $" {
+ pass $test
+ set supports_avx512 1
+ }
+ -re ".. = 0\r\n$gdb_prompt $" {
+ pass $test
+ }
+}
+
+if { !$supports_avx512 } {
+ unsupported "processor does not support AVX512"
+ return
+}
+
+gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
+ "Breakpoint .* at .*i386-avx512.c.*" \
+ "set first breakpoint in main"
+gdb_continue_to_breakpoint "continue to first breakpoint in main"
+
+set nr_regs 8
+
+for { set r 1 } { $r < $nr_regs } { incr r } {
+ gdb_test "print/x \$k$r" \
+ ".. = 0x[format %x $r]2[format %x $r]1" \
+ "check contents of %k$r"
+}
+
+for { set r 1 } { $r < $nr_regs } { incr r } {
+ gdb_test "set var \$k$r = 0x$r$r$r$r" "" "set %k$r"
+}
+
+gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
+ "Breakpoint .* at .*i386-avx512.c.*" \
+ "set second breakpoint in main"
+gdb_continue_to_breakpoint "continue to second breakpoint in main"
+
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ set val [expr $r + 1]
+ gdb_test "print/x k_data\[$r\]" \
+ ".. = 0x$val$val$val$val" \
+ "check contents of k_data\[$r\]"
+
+gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
+ "Breakpoint .* at .*i386-avx512.c.*" \
+ "set third breakpoint in main"
+gdb_continue_to_breakpoint "continue to third breakpoint in main"
+
+if [is_amd64_regs_target] {
+ set nr_regs 8
+} else {
+ set nr_regs 32
+}
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "print \$zmm$r.v8_double" \
+ ".. = \\{$r, $r.125, $r.25, $r.375, $r.5, $r.625, $r.75, $r.875\\}.*" \
+ "check double contents of %zmm$r"
+ gdb_test "print \$zmm$r.v32_int16" \
+ ".. = \\{(-?\[0-9\]+, ){31}-?\[0-9\]+\\}.*" \
+ "check int16 contents of %zmm$r"
+ gdb_test "print \$ymm$r.v4_double" \
+ ".. = \\{$r, $r.125, $r.25, $r.375\\}.*" \
+ "check float contents of %ymm$r"
+ gdb_test "print \$ymm$r.v16_int16" \
+ ".. = \\{(-?\[0-9\]+, ){15}-?\[0-9\]+\\}.*" \
+ "check int16 contents of %ymm$r"
+ gdb_test "print \$xmm$r.v2_double" \
+ ".. = \\{$r, $r.125\\}.*" \
+ "check float contents of %xmm$r"
+ gdb_test "print \$xmm$r.v8_int16" \
+ ".. = \\{(-?\[0-9\]+, ){7}-?\[0-9\]+\\}.*" \
+ "check int16 contents of %xmm$r"
+}
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "set var \$zmm$r.v8_double\[0\] = $r + 10" "" "set %zmm$r.v8_double\[0\]"
+ gdb_test "set var \$zmm$r.v8_double\[1\] = $r + 10.125" "" "set %zmm$r.v8_double\[1\]"
+ gdb_test "set var \$zmm$r.v8_double\[2\] = $r + 10.25" "" "set %zmm$r.v8_double\[2\]"
+ gdb_test "set var \$zmm$r.v8_double\[3\] = $r + 10.375" "" "set %zmm$r.v8_double\[3\]"
+ gdb_test "set var \$zmm$r.v8_double\[4\] = $r + 10.5" "" "set %zmm$r.v8_double\[4\]"
+ gdb_test "set var \$zmm$r.v8_double\[5\] = $r + 10.625" "" "set %zmm$r.v8_double\[5\]"
+ gdb_test "set var \$zmm$r.v8_double\[6\] = $r + 10.75" "" "set %zmm$r.v8_double\[6\]"
+ gdb_test "set var \$zmm$r.v8_double\[7\] = $r + 10.875" "" "set %zmm$r.v8_double\[7\]"
+}
+
+gdb_test "break [gdb_get_line_number "fourth breakpoint here"]" \
+ "Breakpoint .* at .*i386-avx512.c.*" \
+ "set fourth breakpoint in main"
+gdb_continue_to_breakpoint "continue to fourth breakpoint in main"
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "print zmm_data\[$r\]" \
+ ".. = \\{f = \\{[expr $r + 10], [expr $r.125 + 10], [expr $r.25 + 10], [expr $r.375 + 10], [expr $r.5 + 10], [expr $r.625 + 10], [expr $r.75 + 10], [expr $r.875 + 10]\\}\\}.*" \
+ "check contents of zmm_data\[$r\] after writing ZMM regs"
+}
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "set var \$ymm$r.v4_double\[0\] = $r + 20" "" "set %ymm$r.v4_double\[0\]"
+ gdb_test "set var \$ymm$r.v4_double\[1\] = $r + 20.125" "" "set %ymm$r.v4_double\[1\]"
+ gdb_test "set var \$ymm$r.v4_double\[2\] = $r + 20.25" "" "set %ymm$r.v4_double\[2\]"
+ gdb_test "set var \$ymm$r.v4_double\[3\] = $r + 20.375" "" "set %ymm$r.v4_double\[3\]"
+}
+
+gdb_test "break [gdb_get_line_number "fifth breakpoint here"]" \
+ "Breakpoint .* at .*i386-avx512.c.*" \
+ "set fifth breakpoint in main"
+gdb_continue_to_breakpoint "continue to fifth breakpoint in main"
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "print zmm_data\[$r\]" \
+ ".. = \\{f = \\{[expr $r + 20], [expr $r.125 + 20], [expr $r.25 + 20], [expr $r.375 + 20], [expr $r.5 + 10], [expr $r.625 + 10], [expr $r.75 + 10], [expr $r.875 + 10]\\}\\}.*" \
+ "check contents of zmm_data\[$r\] after writing YMM regs"
+}
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "set var \$xmm$r.v2_double\[0\] = $r + 30" "" "set %xmm$r.v2_double\[0\]"
+ gdb_test "set var \$xmm$r.v2_double\[1\] = $r + 30.125" "" "set %xmm$r.v2_double\[1\]"
+}
+
+gdb_test "break [gdb_get_line_number "sixth breakpoint here"]" \
+ "Breakpoint .* at .*i386-avx512.c.*" \
+ "set sixth breakpoint in main"
+gdb_continue_to_breakpoint "continue to sixth breakpoint in main"
+
+for { set r 0 } { $r < $nr_regs } { incr r } {
+ gdb_test "print zmm_data\[$r\]" \
+ ".. = \\{f = \\{[expr $r + 30], [expr $r.125 + 30], [expr $r.25 + 20], [expr $r.375 + 20], [expr $r.5 + 10], [expr $r.625 + 10], [expr $r.75 + 10], [expr $r.875 + 10]\\}\\}.*" \
+ "check contents of zmm_data\[$r\] after writing XMM regs"
+}
+
+}
+
--
1.8.4.2
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH V5 1/3] Add AVX512 registers support to GDB.
2014-04-23 13:04 ` [PATCH V5 1/3] Add AVX512 registers support to GDB Michael Sturm
@ 2014-04-24 11:33 ` Pedro Alves
2014-04-24 11:48 ` Pedro Alves
1 sibling, 0 replies; 16+ messages in thread
From: Pedro Alves @ 2014-04-24 11:33 UTC (permalink / raw)
To: Michael Sturm; +Cc: palves, eliz, mark.kettenis, walfred.tedeschi, gdb-patches
On 04/23/2014 02:02 PM, Michael Sturm wrote:
> +
> +for { set r 0 } { $r < $nr_regs } { incr r } {
> + set val [expr $r + 1]
> + gdb_test "print/x k_data\[$r\]" \
> + ".. = 0x$val$val$val$val" \
> + "check contents of k_data\[$r\]"
> +
> +gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
> + "Breakpoint .* at .*i386-avx512.c.*" \
> + "set third breakpoint in main"
> +gdb_continue_to_breakpoint "continue to third breakpoint in main"
> +
This bit wasn't addressed -- indentation here and all the way through
below still isn't right.
Ah, actually, it's not really the indentation that is missing.
It's a '}' to close the for loop above that is missing. So it
looks like the "check contents of k_data\[$r\]" test is only
running for $r == 0. Then the remainder of the tests
don't actually run $nr_regs times, because there are other loops
within that broken loop that also use $r as iterator:
> +for { set r 0 } { $r < $nr_regs } { incr r } {
> + gdb_test "print zmm_data\[$r\]" \
> + ".. = \\{f = \\{[expr $r + 30], [expr $r.125 + 30], [expr $r.25 + 20], [expr $r.375 + 20], [expr $r.5 + 10], [expr $r.625 + 10], [expr $r.75 + 10], [expr $r.875 + 10]\\}\\}.*" \
> + "check contents of zmm_data\[$r\] after writing XMM regs"
> +}
> +
> +}
> +
This last "}" is closing the broken for loop. Seems to me it's misplaced.
Other than that, looks fine to me. Please push with those issues fixed.
--
Pedro Alves
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH V5 1/3] Add AVX512 registers support to GDB.
2014-04-23 13:04 ` [PATCH V5 1/3] Add AVX512 registers support to GDB Michael Sturm
2014-04-24 11:33 ` Pedro Alves
@ 2014-04-24 11:48 ` Pedro Alves
1 sibling, 0 replies; 16+ messages in thread
From: Pedro Alves @ 2014-04-24 11:48 UTC (permalink / raw)
To: Michael Sturm; +Cc: palves, eliz, mark.kettenis, walfred.tedeschi, gdb-patches
Whoops, I forgot to merge this comment to the other email:
On 04/23/2014 02:02 PM, Michael Sturm wrote:
> +void
> +move_k_data_to_reg ()
Should be (void). Same in several functions.
--
Pedro Alves
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH V5 0/3] Intel(R) AVX-512 register support
2014-04-23 13:03 [PATCH V5 0/3] Intel(R) AVX-512 register support Michael Sturm
` (2 preceding siblings ...)
2014-04-23 13:04 ` [PATCH V5 1/3] Add AVX512 registers support to GDB Michael Sturm
@ 2014-04-24 11:49 ` Pedro Alves
3 siblings, 0 replies; 16+ messages in thread
From: Pedro Alves @ 2014-04-24 11:49 UTC (permalink / raw)
To: Michael Sturm; +Cc: palves, eliz, mark.kettenis, walfred.tedeschi, gdb-patches
On 04/23/2014 02:02 PM, Michael Sturm wrote:
> Pedro,
>
> thanks for your review. We've addressed the comments you made regarding the
> test case and the manual content. We do agree to your comment
> regarding sharing code between GDB and GDBserver. We would prefer to
> make this change in a patch dedicated to unify XSAVE buffer access
> between GDB and GDBserver.
> Would you agree to that and approve committing this series?
Definitely. I wasn't suggesting making that as part of this patch.
Oh,
> This patch series adds support for the Intel(R) Advanced Vector Extensions 512
> (Intel(R) AVX-512) registers. Native and remote debugging are covered by this
> patch series.
>
> Intel(R) AVX-512 is an extension to AVX to support 512-bit wide SIMD registers
> in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31). The number of available
> registers in 32-bit mode is still 8 (XMM0-7, YMM0-7, ZMM0-7). The lower
> 256-bits of the ZMM registers are aliased to the respective 256-bit YMM
> registers. The lower 128-bits are aliased to the respective 128-bit XMM
> registers.
>
> There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit mode
> and 64-bit mode.
>
> For more information please see
> Intel(R) Developer Zone: Intel(R) AVX
> http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495
>
> Intel(R) Architecture Instruction Set Extensions Programming Reference:
> http://software.intel.com/en-us/file/319433-017pdf
I notice that this info is only in the series cover letter, which
never makes it to the commit log. Would you mind putting it in at
least the commit log entry of the GDB patch (tweaked a little to
not say "series")? (pre-approved, no need for another round
of review for that).
Thanks,
--
Pedro Alves
^ permalink raw reply [flat|nested] 16+ messages in thread
* Incorrect placement of two Intel gdb/NEWS items
2013-12-03 12:37 ` [PATCH v3 1/1] Documentation for MPX Walfred Tedeschi
2013-12-03 12:52 ` Eli Zaretskii
@ 2014-08-04 16:57 ` Jan Kratochvil
2014-08-04 19:17 ` Eli Zaretskii
1 sibling, 1 reply; 16+ messages in thread
From: Jan Kratochvil @ 2014-08-04 16:57 UTC (permalink / raw)
To: eliz, Walfred Tedeschi, Michael Sturm; +Cc: gdb-patches, palves, mark.kettenis
Hi Eli,
there were two commits which placed new gdb/NEWS items to the bottom of the
NEWS file (such as for gdb-4.0) instead at their right place under:
*** Changes in GDB 7.8
https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff;f=gdb/NEWS;h=ae84e009b8008f9da2707829c0cbab358abc17fb;hp=a8ae8c7b7a5ddce9b5779914dd1e6a87463d7d60;hb=ca8941bbd088002cb8ff87abe16d02ecc8d58d1e;hpb=489e41ddf4bb5616a7471fb4072df5efbb9a706e
commit ca8941bbd088002cb8ff87abe16d02ecc8d58d1e
Author: Walfred Tedeschi <walfred.tedeschi@intel.com>
Date: Tue Dec 3 13:31:03 2013 +0000
Documentation for MPX.
Message-Id: <1386074172-14177-1-git-send-email-walfred.tedeschi@intel.com>
https://sourceware.org/ml/gdb-patches/2013-12/msg00082.html
and
https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff;f=gdb/NEWS;h=a7067fdf9a7af422572a29d1fdd6ef011c87cd9f;hp=b72d64db313d0785edec19a9c4b441b854698e6a;hb=01f9f808e2e86187c95e7cff4aeb014a421a53ce;hpb=93ee1e3683a12f4774b8beb4f821910982e21ce2
commit 01f9f808e2e86187c95e7cff4aeb014a421a53ce
Author: Michael Sturm <michael.sturm@intel.com>
Date: Mon Dec 16 16:43:05 2013 +0100
Add AVX512 registers support to GDB and GDBserver.
Message-Id: <1398258160-9070-4-git-send-email-michael.sturm@intel.com>
https://sourceware.org/ml/gdb-patches/2013-12/msg00818.html
It would be probably also good to move them in the 7.8 branch for gdb-7.8.1.
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: Incorrect placement of two Intel gdb/NEWS items
2014-08-04 16:57 ` Incorrect placement of two Intel gdb/NEWS items Jan Kratochvil
@ 2014-08-04 19:17 ` Eli Zaretskii
2014-08-04 19:40 ` [commit+7.8] " Jan Kratochvil
0 siblings, 1 reply; 16+ messages in thread
From: Eli Zaretskii @ 2014-08-04 19:17 UTC (permalink / raw)
To: Jan Kratochvil
Cc: walfred.tedeschi, michael.sturm, gdb-patches, palves, mark.kettenis
> Date: Mon, 4 Aug 2014 18:57:08 +0200
> From: Jan Kratochvil <jan.kratochvil@redhat.com>
> Cc: gdb-patches@sourceware.org, palves@redhat.com, mark.kettenis@xs4all.nl
>
> Hi Eli,
>
> there were two commits which placed new gdb/NEWS items to the bottom of the
> NEWS file (such as for gdb-4.0) instead at their right place under:
> *** Changes in GDB 7.8
>
> https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff;f=gdb/NEWS;h=ae84e009b8008f9da2707829c0cbab358abc17fb;hp=a8ae8c7b7a5ddce9b5779914dd1e6a87463d7d60;hb=ca8941bbd088002cb8ff87abe16d02ecc8d58d1e;hpb=489e41ddf4bb5616a7471fb4072df5efbb9a706e
> commit ca8941bbd088002cb8ff87abe16d02ecc8d58d1e
> Author: Walfred Tedeschi <walfred.tedeschi@intel.com>
> Date: Tue Dec 3 13:31:03 2013 +0000
> Documentation for MPX.
> Message-Id: <1386074172-14177-1-git-send-email-walfred.tedeschi@intel.com>
> https://sourceware.org/ml/gdb-patches/2013-12/msg00082.html
>
> and
>
> https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff;f=gdb/NEWS;h=a7067fdf9a7af422572a29d1fdd6ef011c87cd9f;hp=b72d64db313d0785edec19a9c4b441b854698e6a;hb=01f9f808e2e86187c95e7cff4aeb014a421a53ce;hpb=93ee1e3683a12f4774b8beb4f821910982e21ce2
> commit 01f9f808e2e86187c95e7cff4aeb014a421a53ce
> Author: Michael Sturm <michael.sturm@intel.com>
> Date: Mon Dec 16 16:43:05 2013 +0100
> Add AVX512 registers support to GDB and GDBserver.
> Message-Id: <1398258160-9070-4-git-send-email-michael.sturm@intel.com>
> https://sourceware.org/ml/gdb-patches/2013-12/msg00818.html
>
> It would be probably also good to move them in the 7.8 branch for gdb-7.8.1.
Please do. This is a purely technical issue, I'd even say an obvious
fix, so no need to get my approval. (I approve anyway.)
Thanks.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [commit+7.8] Re: Incorrect placement of two Intel gdb/NEWS items
2014-08-04 19:17 ` Eli Zaretskii
@ 2014-08-04 19:40 ` Jan Kratochvil
0 siblings, 0 replies; 16+ messages in thread
From: Jan Kratochvil @ 2014-08-04 19:40 UTC (permalink / raw)
To: Eli Zaretskii
Cc: walfred.tedeschi, michael.sturm, gdb-patches, palves,
mark.kettenis, Joel Brobecker
[-- Attachment #1: Type: text/plain, Size: 426 bytes --]
On Mon, 04 Aug 2014 21:17:36 +0200, Eli Zaretskii wrote:
> Please do. This is a purely technical issue, I'd even say an obvious
> fix, so no need to get my approval. (I approve anyway.)
Checked in for trunk [attached] and for 7.8:
a0a8f14d789b3fad94ad10d183b98b5fabe6bc1c
Modified Wiki although not filed a PR for updating the NEWS file:
https://sourceware.org/gdb/wiki/GDB_7.8_Release?action=diff&rev1=58&rev2=59
Jan
[-- Attachment #2: 1 --]
[-- Type: text/plain, Size: 3256 bytes --]
commit dc304a9424abb58973ffde431264af1deb6abd22
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Mon Aug 4 21:32:06 2014 +0200
Fix incorrect placement of two Intel gdb/NEWS items
there were two commits which placed new gdb/NEWS items to the bottom of the
NEWS file (such as for gdb-4.0) instead at their right place under:
*** Changes in GDB 7.8
https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff;f=gdb/NEWS;h=ae84e009b8008f9da2707829c0cbab358abc17fb;hp=a8ae8c7b7a5ddce9b5779914dd1e6a87463d7d60;hb=ca8941bbd088002cb8ff87abe16d02ecc8d58d1e;hpb=489e41ddf4bb5616a7471fb4072df5efbb9a706e
commit ca8941bbd088002cb8ff87abe16d02ecc8d58d1e
Author: Walfred Tedeschi <walfred.tedeschi@intel.com>
Date: Tue Dec 3 13:31:03 2013 +0000
Documentation for MPX.
Message-Id: <1386074172-14177-1-git-send-email-walfred.tedeschi@intel.com>
https://sourceware.org/ml/gdb-patches/2013-12/msg00082.html
and
https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff;f=gdb/NEWS;h=a7067fdf9a7af422572a29d1fdd6ef011c87cd9f;hp=b72d64db313d0785edec19a9c4b441b854698e6a;hb=01f9f808e2e86187c95e7cff4aeb014a421a53ce;hpb=93ee1e3683a12f4774b8beb4f821910982e21ce2
commit 01f9f808e2e86187c95e7cff4aeb014a421a53ce
Author: Michael Sturm <michael.sturm@intel.com>
Date: Mon Dec 16 16:43:05 2013 +0100
Add AVX512 registers support to GDB and GDBserver.
Message-Id: <1398258160-9070-4-git-send-email-michael.sturm@intel.com>
https://sourceware.org/ml/gdb-patches/2013-12/msg00818.html
gdb/
2014-08-04 Jan Kratochvil <jan.kratochvil@redhat.com>
* NEWS (Changes in GDB-4.0): Move Intel MPX and Intel AVX-512 items ...
(Changes in GDB 7.8): ... here.
Message-ID: <20140804165708.GA12824@host2.jankratochvil.net>
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 5201626..4c8808d 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2014-08-04 Jan Kratochvil <jan.kratochvil@redhat.com>
+
+ * NEWS (Changes in GDB-4.0): Move Intel MPX and Intel AVX-512 items ...
+ (Changes in GDB 7.8): ... here.
+
2014-08-04 Tom Tromey <tromey@redhat.com>
* target.c (set_targetdebug): New function.
diff --git a/gdb/NEWS b/gdb/NEWS
index 2b61ff4..d603cf7 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -155,6 +155,12 @@ show mi-async
can be used to launch native programs even when "set
auto-connect-native-target" is set to off.
+* GDB now supports access to Intel(R) MPX registers on GNU/Linux.
+
+* Support for Intel(R) AVX-512 registers on GNU/Linux.
+ Support displaying and modifying Intel(R) AVX-512 registers
+ $zmm0 - $zmm31 and $k0 - $k7 on GNU/Linux.
+
* New remote packets
qXfer:btrace:read's annex
@@ -5781,10 +5787,3 @@ GDB now handles cross debugging. If you are remotely debugging between
two different machines, type ``./configure host -target=targ''.
Host is the machine where GDB will run; targ is the machine
where the program that you are debugging will run.
-
- * GDB now supports access to Intel(R) MPX registers on GNU/Linux.
-
- * Support for Intel(R) AVX-512 registers on GNU/Linux.
-
-Support displaying and modifying Intel(R) AVX-512 registers $zmm0 - $zmm31 and
-$k0 - $k7 on GNU/Linux.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH V5 2/3] Add AVX512 register support to gdbserver.
2014-04-23 13:03 ` [PATCH V5 2/3] Add AVX512 register support to gdbserver Michael Sturm
@ 2014-11-21 10:21 ` Andreas Arnez
2014-12-13 13:41 ` Joel Brobecker
0 siblings, 1 reply; 16+ messages in thread
From: Andreas Arnez @ 2014-11-21 10:21 UTC (permalink / raw)
To: Michael Sturm; +Cc: palves, eliz, mark.kettenis, walfred.tedeschi, gdb-patches
Hi,
While building GDB I encountered a gcc warning (array subscript above
array bounds) and tracked it down to the patch below.
On Wed, Apr 23 2014, Michael Sturm wrote:
> # Linux object files. This is so we don't have to repeat
> diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
> index e655f74..c2d0bdf 100644
> --- a/gdb/gdbserver/i387-fp.c
> +++ b/gdb/gdbserver/i387-fp.c
> @@ -22,6 +22,11 @@
>
> static const int num_mpx_bnd_registers = 4;
> static const int num_mpx_cfg_registers = 2;
> +static const int num_avx512_k_registers = 8;
> +static const int num_avx512_zmmh_low_registers = 16;
> +static const int num_avx512_zmmh_high_registers = 16;
> +static const int num_avx512_ymmh_registers = 16;
> +static const int num_avx512_xmm_registers = 16;
>
> /* Note: These functions preserve the reserved bits in control registers.
> However, gdbserver promptly throws away that information. */
> @@ -120,6 +125,17 @@ struct i387_xsave {
> /* Space for 2 MPX configuration registers of 64 bits
> plus reserved space. */
> unsigned char mpx_cfg_space[16];
> +
> + unsigned char reserved5[48];
> +
> + /* Space for 8 OpMask register values of 64 bits. */
> + unsigned char k_space[64];
> +
> + /* Space for 16 256-bit zmm0-15. */
> + unsigned char zmmh_low_space[512];
> +
> + /* Space for 16 512-bit zmm16-31 values. */
> + unsigned char zmmh_high_space[1024];
> };
>
> [...]
> +
> + /* Check if any of ZMM16H-ZMM31H registers are changed. */
> + if ((x86_xcr0 & I386_XSTATE_ZMM))
> + {
> + int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
> +
> + for (i = 0; i < num_avx512_zmmh_high_registers; i++)
> + {
> + collect_register (regcache, i + zmm16h_regnum, raw);
> + p = ((char *) &fp->zmmh_low_space[0]) + 32 + i * 64;
^^^^^^^^^^^^^^
Should this really mean 'zmm_high_space'?
> + if (memcmp (raw, p, 32) != 0)
The warning occurs for this memcmp().
> + {
> + xstate_bv |= I386_XSTATE_ZMM;
> + memcpy (p, raw, 32);
> + }
> + }
> + }
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH V5 2/3] Add AVX512 register support to gdbserver.
2014-11-21 10:21 ` Andreas Arnez
@ 2014-12-13 13:41 ` Joel Brobecker
2015-01-08 10:01 ` Sturm, Michael
0 siblings, 1 reply; 16+ messages in thread
From: Joel Brobecker @ 2014-12-13 13:41 UTC (permalink / raw)
To: Andreas Arnez
Cc: Michael Sturm, palves, eliz, mark.kettenis, walfred.tedeschi,
gdb-patches
> While building GDB I encountered a gcc warning (array subscript above
> array bounds) and tracked it down to the patch below.
Thanks!
> On Wed, Apr 23 2014, Michael Sturm wrote:
>
> > # Linux object files. This is so we don't have to repeat
> > diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
> > index e655f74..c2d0bdf 100644
> > --- a/gdb/gdbserver/i387-fp.c
> > +++ b/gdb/gdbserver/i387-fp.c
> > @@ -22,6 +22,11 @@
> >
> > static const int num_mpx_bnd_registers = 4;
> > static const int num_mpx_cfg_registers = 2;
> > +static const int num_avx512_k_registers = 8;
> > +static const int num_avx512_zmmh_low_registers = 16;
> > +static const int num_avx512_zmmh_high_registers = 16;
> > +static const int num_avx512_ymmh_registers = 16;
> > +static const int num_avx512_xmm_registers = 16;
> >
> > /* Note: These functions preserve the reserved bits in control registers.
> > However, gdbserver promptly throws away that information. */
> > @@ -120,6 +125,17 @@ struct i387_xsave {
> > /* Space for 2 MPX configuration registers of 64 bits
> > plus reserved space. */
> > unsigned char mpx_cfg_space[16];
> > +
> > + unsigned char reserved5[48];
> > +
> > + /* Space for 8 OpMask register values of 64 bits. */
> > + unsigned char k_space[64];
> > +
> > + /* Space for 16 256-bit zmm0-15. */
> > + unsigned char zmmh_low_space[512];
> > +
> > + /* Space for 16 512-bit zmm16-31 values. */
> > + unsigned char zmmh_high_space[1024];
> > };
> >
> > [...]
> > +
> > + /* Check if any of ZMM16H-ZMM31H registers are changed. */
> > + if ((x86_xcr0 & I386_XSTATE_ZMM))
> > + {
> > + int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
> > +
> > + for (i = 0; i < num_avx512_zmmh_high_registers; i++)
> > + {
> > + collect_register (regcache, i + zmm16h_regnum, raw);
> > + p = ((char *) &fp->zmmh_low_space[0]) + 32 + i * 64;
> ^^^^^^^^^^^^^^
> Should this really mean 'zmm_high_space'?
>
> > + if (memcmp (raw, p, 32) != 0)
>
> The warning occurs for this memcmp().
Based on the comments in "struct i387_xsave", I think you are right!
Michael and/or Pedro, can anyone confirm, please?
Thank you,
--
Joel
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH V5 2/3] Add AVX512 register support to gdbserver.
2014-12-13 13:41 ` Joel Brobecker
@ 2015-01-08 10:01 ` Sturm, Michael
2015-01-10 7:00 ` Joel Brobecker
0 siblings, 1 reply; 16+ messages in thread
From: Sturm, Michael @ 2015-01-08 10:01 UTC (permalink / raw)
To: Joel Brobecker, Andreas Arnez
Cc: palves, eliz, mark.kettenis, Tedeschi, Walfred, gdb-patches
Hello All,
Happy New Year to everyone!
Sorry for the late reply! Yes, the proposed change is correct. Thanks a lot for catching this bug!
Regards,
Michael
-----Original Message-----
From: Joel Brobecker [mailto:brobecker@adacore.com]
Sent: Saturday, December 13, 2014 2:42 PM
To: Andreas Arnez
Cc: Sturm, Michael; palves@redhat.com; eliz@gnu.org; mark.kettenis@xs4all.nl; Tedeschi, Walfred; gdb-patches@sourceware.org
Subject: Re: [PATCH V5 2/3] Add AVX512 register support to gdbserver.
> While building GDB I encountered a gcc warning (array subscript above
> array bounds) and tracked it down to the patch below.
Thanks!
> On Wed, Apr 23 2014, Michael Sturm wrote:
>
> > # Linux object files. This is so we don't have to repeat diff
> > --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c index
> > e655f74..c2d0bdf 100644
> > --- a/gdb/gdbserver/i387-fp.c
> > +++ b/gdb/gdbserver/i387-fp.c
> > @@ -22,6 +22,11 @@
> >
> > static const int num_mpx_bnd_registers = 4; static const int
> > num_mpx_cfg_registers = 2;
> > +static const int num_avx512_k_registers = 8; static const int
> > +num_avx512_zmmh_low_registers = 16; static const int
> > +num_avx512_zmmh_high_registers = 16; static const int
> > +num_avx512_ymmh_registers = 16; static const int
> > +num_avx512_xmm_registers = 16;
> >
> > /* Note: These functions preserve the reserved bits in control registers.
> > However, gdbserver promptly throws away that information. */ @@
> > -120,6 +125,17 @@ struct i387_xsave {
> > /* Space for 2 MPX configuration registers of 64 bits
> > plus reserved space. */
> > unsigned char mpx_cfg_space[16];
> > +
> > + unsigned char reserved5[48];
> > +
> > + /* Space for 8 OpMask register values of 64 bits. */ unsigned
> > + char k_space[64];
> > +
> > + /* Space for 16 256-bit zmm0-15. */ unsigned char
> > + zmmh_low_space[512];
> > +
> > + /* Space for 16 512-bit zmm16-31 values. */ unsigned char
> > + zmmh_high_space[1024];
> > };
> >
> > [...]
> > +
> > + /* Check if any of ZMM16H-ZMM31H registers are changed. */ if
> > + ((x86_xcr0 & I386_XSTATE_ZMM))
> > + {
> > + int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
> > +
> > + for (i = 0; i < num_avx512_zmmh_high_registers; i++)
> > + {
> > + collect_register (regcache, i + zmm16h_regnum, raw);
> > + p = ((char *) &fp->zmmh_low_space[0]) + 32 + i * 64;
> ^^^^^^^^^^^^^^ Should this really mean
> 'zmm_high_space'?
>
> > + if (memcmp (raw, p, 32) != 0)
>
> The warning occurs for this memcmp().
Based on the comments in "struct i387_xsave", I think you are right!
Michael and/or Pedro, can anyone confirm, please?
Thank you,
--
Joel
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH V5 2/3] Add AVX512 register support to gdbserver.
2015-01-08 10:01 ` Sturm, Michael
@ 2015-01-10 7:00 ` Joel Brobecker
0 siblings, 0 replies; 16+ messages in thread
From: Joel Brobecker @ 2015-01-10 7:00 UTC (permalink / raw)
To: Sturm, Michael
Cc: Andreas Arnez, palves, eliz, mark.kettenis, Tedeschi, Walfred,
gdb-patches
[-- Attachment #1: Type: text/plain, Size: 460 bytes --]
Hello,
> Sorry for the late reply! Yes, the proposed change is correct. Thanks
> a lot for catching this bug!
Thanks for confirming.
Attached is the patch I ended up pushing.
gdb/gdbserver/ChangeLog:
* i387-fp.c (i387_cache_to_xsave): In look over
num_avx512_zmmh_high_registers, replace use of struct i387_xsave
zmmh_low_space field by use of zmmh_high_space.
Tested on x86_64-linux, using boards/native-gdbserver.exp.
--
Joel
[-- Attachment #2: 0001-Fix-use-of-wrong-struct-i387_xsave-field-in-i387_cac.patch --]
[-- Type: text/x-diff, Size: 1691 bytes --]
From 3368c1e5ce12ea262ab3ff7a9154472503aadedb Mon Sep 17 00:00:00 2001
From: Joel Brobecker <brobecker@adacore.com>
Date: Sat, 10 Jan 2015 09:50:44 +0400
Subject: [PATCH] Fix use of wrong struct i387_xsave field in
i387_cache_to_xsave
gdb/gdbserver/ChangeLog:
* i387-fp.c (i387_cache_to_xsave): In look over
num_avx512_zmmh_high_registers, replace use of struct i387_xsave
zmmh_low_space field by use of zmmh_high_space.
Tested on x86_64-linux, using boards/native-gdbserver.exp.
---
gdb/gdbserver/ChangeLog | 6 ++++++
gdb/gdbserver/i387-fp.c | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index 180e341..d126748 100644
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,9 @@
+2015-01-10 Joel Brobecker <brobecker@adacore.com>
+
+ * i387-fp.c (i387_cache_to_xsave): In look over
+ num_avx512_zmmh_high_registers, replace use of struct i387_xsave
+ zmmh_low_space field by use of zmmh_high_space.
+
2015-01-09 Pedro Alves <palves@redhat.com>
* linux-low.c (step_over_bkpt): Move higher up in the file.
diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
index a4c218d..ddfec6e 100644
--- a/gdb/gdbserver/i387-fp.c
+++ b/gdb/gdbserver/i387-fp.c
@@ -454,7 +454,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
{
collect_register (regcache, i + zmm16h_regnum, raw);
- p = ((char *) &fp->zmmh_low_space[0]) + 32 + i * 64;
+ p = ((char *) &fp->zmmh_high_space[0]) + 32 + i * 64;
if (memcmp (raw, p, 32) != 0)
{
xstate_bv |= X86_XSTATE_ZMM;
--
1.9.1
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2015-01-10 7:00 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-04-23 13:03 [PATCH V5 0/3] Intel(R) AVX-512 register support Michael Sturm
2014-04-23 13:03 ` [PATCH V5 3/3] Add AVX512 feature description to GDB manual Michael Sturm
2013-12-03 12:37 ` [PATCH v3 1/1] Documentation for MPX Walfred Tedeschi
2013-12-03 12:52 ` Eli Zaretskii
2014-08-04 16:57 ` Incorrect placement of two Intel gdb/NEWS items Jan Kratochvil
2014-08-04 19:17 ` Eli Zaretskii
2014-08-04 19:40 ` [commit+7.8] " Jan Kratochvil
2014-04-23 13:03 ` [PATCH V5 2/3] Add AVX512 register support to gdbserver Michael Sturm
2014-11-21 10:21 ` Andreas Arnez
2014-12-13 13:41 ` Joel Brobecker
2015-01-08 10:01 ` Sturm, Michael
2015-01-10 7:00 ` Joel Brobecker
2014-04-23 13:04 ` [PATCH V5 1/3] Add AVX512 registers support to GDB Michael Sturm
2014-04-24 11:33 ` Pedro Alves
2014-04-24 11:48 ` Pedro Alves
2014-04-24 11:49 ` [PATCH V5 0/3] Intel(R) AVX-512 register support Pedro Alves
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