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* [PATCH 1/7] sim: standardize move-if-change rules
@ 2021-10-31  5:18 Mike Frysinger
  2021-10-31  5:18 ` [PATCH 2/7] sim: silence stamp touch rules Mike Frysinger
                   ` (5 more replies)
  0 siblings, 6 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:18 UTC (permalink / raw)
  To: gdb-patches

Use the srcroot path and make them all silent.
---
 sim/bpf/Makefile.in       |   8 +-
 sim/common/Make-common.in |   8 +-
 sim/cris/Makefile.in      |  12 +--
 sim/frv/Makefile.in       |   4 +-
 sim/iq2000/Makefile.in    |   4 +-
 sim/lm32/Makefile.in      |   4 +-
 sim/m32r/Makefile.in      |  12 +--
 sim/mips/Makefile.in      | 174 ++++++++++++++++----------------------
 sim/mn10300/Makefile.in   |  30 +++----
 sim/or1k/Makefile.in      |   4 +-
 sim/ppc/Makefile.in       |  56 ++++++------
 sim/v850/Makefile.in      |  30 +++----
 12 files changed, 158 insertions(+), 188 deletions(-)

diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in
index 3188ab1b0c21..c33096b232ed 100644
--- a/sim/bpf/Makefile.in
+++ b/sim/bpf/Makefile.in
@@ -169,8 +169,8 @@ stamp-mloop-le: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
                 -infile $(srcdir)/mloop.in -outfile-suffix -le
-	$(SHELL) $(srcroot)/move-if-change eng-le.hin eng-le.h
-	$(SHELL) $(srcroot)/move-if-change mloop-le.cin mloop-le.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-le.hin eng-le.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop-le.cin mloop-le.c
 	touch $@
 mloop-le.c eng-le.h: stamp-mloop-le
 	@true
@@ -179,8 +179,8 @@ stamp-mloop-be: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
                 -infile $(srcdir)/mloop.in -outfile-suffix -be
-	$(SHELL) $(srcroot)/move-if-change eng-be.hin eng-be.h
-	$(SHELL) $(srcroot)/move-if-change mloop-be.cin mloop-be.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-be.hin eng-be.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop-be.cin mloop-be.c
 	touch $@
 mloop-be.c eng-be.h: stamp-mloop-be
 	@true
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index c9ea08f3ccb8..a9bddb6e6809 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -263,9 +263,9 @@ targ-vals.h targ-map.c: stamp-tvals
 stamp-tvals: gentmap
 	rm -f tmp-tvals.h tmp-tmap.c
 	./gentmap -h >tmp-tvals.h
-	$(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
 	./gentmap -c >tmp-tmap.c
-	$(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c
 	touch stamp-tvals
 
 #
@@ -424,7 +424,7 @@ stamp-hw: Makefile.in $(srccom)/Make-common.in $(config.status) Makefile
 	done >> tmp-hw.h
 	echo "  NULL," >> tmp-hw.h
 	echo "};" >> tmp-hw.h
-	$(SHELL) $(srcroot)/move-if-change tmp-hw.h hw-config.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw-config.h
 	@echo stamp > stamp-hw
 
 test-hw-events: $(srccom)/hw-events.c libsim.a
@@ -449,7 +449,7 @@ stamp-modules: Makefile $(SIM_OBJS:.o=.c)
 	echo '};'; \
 	echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
 	) >$@.tmp
-	$(SHELL) $(srcroot)/move-if-change $@.tmp modules.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $@.tmp modules.c
 	@rm -f $@.l-tmp $@.tmp
 	touch $@
 
diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index 5bf076930074..c6e134b5616f 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -73,8 +73,8 @@ stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -switch semcrisv10f-switch.c \
 		-cpu crisv10f -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
 	touch stamp-v10fmloop
 
 # CRISV32 objs
@@ -92,8 +92,8 @@ stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefi
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -switch semcrisv32f-switch.c \
 		-cpu crisv32f -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
 	touch stamp-v32fmloop
 
 cris-clean:
@@ -119,7 +119,7 @@ stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  archfile=$(CPU_DIR)/cris.cpu \
 	  cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
-	$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
 	touch stamp-v10fcpu
 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
 
@@ -127,6 +127,6 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  archfile=$(CPU_DIR)/cris.cpu \
 	  cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
-	$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
 	touch stamp-v32fcpu
 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
diff --git a/sim/frv/Makefile.in b/sim/frv/Makefile.in
index 3a1bbab4e9a5..fd8df1399406 100644
--- a/sim/frv/Makefile.in
+++ b/sim/frv/Makefile.in
@@ -60,8 +60,8 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -scache -parallel-generic-write -parallel-only \
 		-cpu frvbf -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
 	touch stamp-mloop
 
 frv-clean:
diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in
index 557db484b629..af0b918b1187 100644
--- a/sim/iq2000/Makefile.in
+++ b/sim/iq2000/Makefile.in
@@ -60,8 +60,8 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu iq2000bf -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
 	touch stamp-mloop
 
 iq2000-clean:
diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in
index bac9861ec53b..465c7fe78702 100644
--- a/sim/lm32/Makefile.in
+++ b/sim/lm32/Makefile.in
@@ -41,8 +41,8 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu lm32bf -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
 	touch stamp-mloop
 
 lm32-clean:
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 8877edcf4ae6..340c94636e08 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -62,8 +62,8 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu m32rbf -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
 	touch stamp-mloop
 
 # M32RX objs
@@ -79,8 +79,8 @@ stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 		-cpu m32rxf -infile $(srcdir)/mloopx.in \
 		-outfile-suffix x
-	$(SHELL) $(srcroot)/move-if-change engx.hin engx.h
-	$(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
 	touch stamp-xmloop
 
 # M32R2 objs
@@ -96,8 +96,8 @@ stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 		-cpu m32r2f -infile $(srcdir)/mloop2.in \
 		-outfile-suffix 2
-	$(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
-	$(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
 	touch stamp-2mloop
 
 m32r-clean:
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 11af66618423..0846f5b44d6f 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -164,21 +164,21 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n engine.h    -he tmp-engine.h \
 		-n engine.c    -e  tmp-engine.c \
 		-n irun.c      -r  tmp-irun.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c
 	touch tmp-igen
 
 BUILT_SRC_FROM_M16 = \
@@ -232,16 +232,16 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n m16_support.h   -hf tmp-support.h \
 		-n m16_support.c   -f  tmp-support.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h m16_icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c m16_icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h m16_idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c m16_idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h m16_semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c m16_semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h m16_model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c m16_model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h m16_support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c m16_support.c
 	$(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
@@ -267,18 +267,16 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n m32_support.h   -hf tmp-support.h \
 		-n m32_support.c   -f  tmp-support.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
-						m32_semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
-						m32_semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h m32_icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c m32_icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h m32_idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c m32_idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h m32_semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c m32_semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h m32_model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c m32_model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h m32_support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c m32_support.c
 	$(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
@@ -292,8 +290,8 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n itable.h    -ht tmp-itable.h \
 		-n itable.c    -t  tmp-itable.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
 	touch tmp-m16
 
 BUILT_SRC_FROM_MICROMIPS = \
@@ -358,26 +356,16 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n micromips16_support.h   -hf tmp-support.h \
 		-n micromips16_support.c   -f  tmp-support.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
-						micromips16_icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
-						micromips16_icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
-						micromips16_idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
-						micromips16_idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
-						micromips16_semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
-						micromips16_semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
-						micromips16_model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
-						micromips16_model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
-						micromips16_support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
-						micromips16_support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h micromips16_icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c micromips16_icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h micromips16_idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c micromips16_idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h micromips16_semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c micromips16_semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h micromips16_model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips16_model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips16_support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips16_support.c
 	$(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
@@ -403,26 +391,16 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n micromips32_support.h   -hf tmp-support.h \
 		-n micromips32_support.c   -f  tmp-support.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
-						micromips32_icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
-						micromips32_icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h  \
-						micromips32_idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
-						micromips32_idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
-						micromips32_semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
-						micromips32_semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
-						micromips32_model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c  \
-						micromips32_model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
-						micromips32_support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
-						micromips32_support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h micromips32_icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c micromips32_icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h micromips32_idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c micromips32_idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h micromips32_semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c micromips32_semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h micromips32_model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips32_model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips32_support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips32_support.c
 	$(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
@@ -448,26 +426,16 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n micromips_m32_support.h   -hf tmp-support.h \
 		-n micromips_m32_support.c   -f  tmp-support.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
-						micromips_m32_icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
-						micromips_m32_icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
-						micromips_m32_idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
-						micromips_m32_idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
-						micromips_m32_semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
-						micromips_m32_semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
-						micromips_m32_model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
-						micromips_m32_model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
-						micromips_m32_support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
-						micromips_m32_support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h micromips_m32_icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c micromips_m32_icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h micromips_m32_idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c micromips_m32_idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h micromips_m32_semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c micromips_m32_semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h micromips_m32_model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips_m32_model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips_m32_support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips_m32_support.c
 	$(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
@@ -481,8 +449,8 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n itable.h    -ht tmp-itable.h \
 		-n itable.c    -t  tmp-itable.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
 	touch tmp-micromips
 
 BUILT_SRC_FROM_MULTI = @sim_multi_src@
@@ -575,8 +543,8 @@ tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		-n itable.h    -ht tmp-itable.h \
 		-n itable.c    -t  tmp-itable.c \
 		#
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
 	touch tmp-itable-multi
 tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
 	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in
index 968378cafe62..5e75601a8ec2 100644
--- a/sim/mn10300/Makefile.in
+++ b/sim/mn10300/Makefile.in
@@ -89,19 +89,19 @@ tmp-igen: $(IGEN_INSN) $(IGEN_INSN_INC) $(IGEN_DC) $(IGEN)
 		-n engine.h    -he tmp-engine.h \
 		-n engine.c    -e  tmp-engine.c \
 		-n irun.c      -r  tmp-irun.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c
 	touch tmp-igen
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
index 499b3508cef0..6d399de53fc9 100644
--- a/sim/or1k/Makefile.in
+++ b/sim/or1k/Makefile.in
@@ -75,8 +75,8 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu or1k32bf -infile $(srcdir)/mloop.in
-	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
-	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
 	touch stamp-mloop
 or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS)
 	$(COMPILE) $<
diff --git a/sim/ppc/Makefile.in b/sim/ppc/Makefile.in
index c230f29d6883..4cc0916fbad9 100644
--- a/sim/ppc/Makefile.in
+++ b/sim/ppc/Makefile.in
@@ -25,6 +25,8 @@ srccom = $(srcdir)/../common
 srcroot = $(srcdir)/../..
 srcsim = $(srcdir)/..
 
+include $(srcroot)/gdb/silent-rules.mk
+
 # Helper code from gnulib.
 GNULIB_PARENT_DIR = ../..
 include $(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc
@@ -602,20 +604,20 @@ gentmap: $(srcdir)/../common/gentmap.c Makefile targ-vals.def
 targ-vals.def: $(srcdir)/../common/nltvals.def
 	rm -f targ-vals.def tmp-def
 	cat $(srcdir)/../common/nltvals.def > tmp-vals.def
-	$(SHELL) $(srcdir)/../../move-if-change tmp-vals.def targ-vals.def
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-vals.def targ-vals.def
 
 targ-vals.h: stamp-vals ; @true
-stamp-vals: Makefile gentmap $(srcdir)/../../move-if-change
+stamp-vals: Makefile gentmap $(srcroot)/move-if-change
 	rm -f tmp-vals.h
 	./gentmap -h > tmp-vals.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-vals.h targ-vals.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-vals.h targ-vals.h
 	@echo stamp > stamp-vals
 
 targ-map.c: stamp-map; @true
-stamp-map: Makefile gentmap $(srcdir)/../../move-if-change
+stamp-map: Makefile gentmap $(srcroot)/move-if-change
 	rm -f tmp-map.c
 	./gentmap -c > tmp-map.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-map.c targ-map.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-map.c targ-map.c
 	@echo stamp > stamp-map
 
 callback.o: $(srcdir)/../common/callback.c $(TARG_VALS_H) $(CONFIG_H)
@@ -633,23 +635,23 @@ options.o: options.c $(CPU_H) $(OPTIONS_H) $(DEFINES_H) $(BASICS_H) $(IDECODE_H)
 defines.h: tmp-defines; @true
 tmp-defines: config.h Makefile
 	sed -n -e '/^#define HAVE_/s/ 1$$/",/' -e '/^#define HAVE_/s//"HAVE_/p' < config.h > tmp-defines.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-defines.h defines.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-defines.h defines.h
 	touch tmp-defines
 
 #
 # Rules to create the built c source code files
 #
 
-tmp-dgen: dgen ppc-spr-table $(srcdir)/../../move-if-change
+tmp-dgen: dgen ppc-spr-table $(srcroot)/move-if-change
 	$(DGEN) $(DGEN_FLAGS) \
 		-r $(srcdir)/ppc-spr-table \
 		-n spreg.h -hp tmp-spreg.h \
 		-n spreg.c -p  tmp-spreg.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-spreg.h spreg.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-spreg.c spreg.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.h spreg.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.c spreg.c
 	touch tmp-dgen
 
-tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500.igen $(IGEN_OPCODE_RULES) $(srcdir)/../../move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter
+tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500.igen $(IGEN_OPCODE_RULES) $(srcroot)/move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter
 	$(IGEN) $(IGEN_FLAGS) \
 		-o $(srcdir)/$(IGEN_OPCODE_RULES) \
 		-I $(srcdir) -i $(srcdir)/ppc-instructions \
@@ -665,18 +667,18 @@ tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500.
 		-n model.c     -m  tmp-model.c \
 		-n support.h   -hf tmp-support.h \
 		-n support.c   -f  tmp-support.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c
 	touch tmp-igen
 
 # NOTE: Some versions of make don't handle files created as side-effects
@@ -755,7 +757,7 @@ misc.o: misc.c $(CONFIG_H) $(MISC_H)
 
 # real hardware
 hw.c hw.h: tmp-hw; @true
-tmp-hw: Makefile $(HW_SRC) $(srcdir)/../../move-if-change
+tmp-hw: Makefile $(HW_SRC) $(srcroot)/move-if-change
 	# The first for loop is to remove duplicates.
 	f=""; \
 	for i in $(HW_SRC) ; do \
@@ -781,8 +783,8 @@ tmp-hw: Makefile $(HW_SRC) $(srcdir)/../../move-if-change
 		-e 's/^/    /' \
 		-e 's/$$/_device_descriptor,/' \
 		> tmp-hw.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-hw.h hw.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-hw.c hw.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.c hw.c
 	touch tmp-hw
 
 hw_cpu.o: hw_cpu.c $(DEVICE_TABLE_H) $(HW_CPU_H) $(INTERRUPTS_H) $(CPU_H)
@@ -811,7 +813,7 @@ hw_vm.o: hw_vm.c $(DEVICE_TABLE_H) $(CPU_H)
 
 # real packages
 pk.h: tmp-pk; @true
-tmp-pk: Makefile $(PACKAGE_SRC) $(srcdir)/../../move-if-change
+tmp-pk: Makefile $(PACKAGE_SRC) $(srcroot)/move-if-change
 	# The first for loop is to remove duplicates.
 	f=""; \
 	for i in $(PACKAGE_SRC) ; do \
@@ -825,7 +827,7 @@ tmp-pk: Makefile $(PACKAGE_SRC) $(srcdir)/../../move-if-change
 		-e 's/^/extern package_create_instance_callback pk_/' \
 		-e 's/$$/_create_instance;/' \
 		> tmp-pk.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-pk.h pk.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-pk.h pk.h
 	touch tmp-pk
 
 pk_disklabel.o: pk_disklabel.c $(DEVICE_TABLE_H) $(PK_H)
diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in
index 2cee51fc4e5d..b514430ef8b7 100644
--- a/sim/v850/Makefile.in
+++ b/sim/v850/Makefile.in
@@ -87,21 +87,21 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN)
 		-n engine.h    -he tmp-engine.h \
 		-n engine.c    -e  tmp-engine.c \
 		-n irun.c      -r  tmp-irun.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
-	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
-	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h icache.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c icache.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h idecode.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c idecode.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h semantics.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c semantics.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h model.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c
+	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c
 	touch tmp-igen
 
 clean-extra: clean-igen
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 2/7] sim: silence stamp touch rules
  2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
@ 2021-10-31  5:18 ` Mike Frysinger
  2021-10-31  5:18 ` [PATCH 3/7] sim: tighten up stamp rules Mike Frysinger
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:18 UTC (permalink / raw)
  To: gdb-patches

We pretty much never care about these stamp touches, so silence them.
Also switch to using $@ when it makes sense.
---
 sim/bpf/Makefile.in       | 16 ++++++++--------
 sim/common/Make-common.in |  6 +++---
 sim/cris/Makefile.in      | 10 +++++-----
 sim/frv/Makefile.in       |  6 +++---
 sim/iq2000/Makefile.in    |  6 +++---
 sim/lm32/Makefile.in      |  6 +++---
 sim/m32r/Makefile.in      | 14 +++++++-------
 sim/mips/Makefile.in      | 12 ++++++------
 sim/mn10300/Makefile.in   |  2 +-
 sim/or1k/Makefile.in      |  6 +++---
 sim/ppc/Makefile.in       | 10 +++++-----
 sim/v850/Makefile.in      |  2 +-
 12 files changed, 48 insertions(+), 48 deletions(-)

diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in
index c33096b232ed..e50e5c5de7aa 100644
--- a/sim/bpf/Makefile.in
+++ b/sim/bpf/Makefile.in
@@ -89,7 +89,7 @@ stamp-arch: $(CGEN_COMMON_DEPS) $(CGEN_ARCH_SCM)
 		mach=bpf cpu=bpfbf \
 		archfile=$(srcdir)/../../cpu/bpf.cpu \
 		FLAGS="with-scache"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
 
@@ -99,7 +99,7 @@ stamp-cpu: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM)
 		archfile=$(srcdir)/../../cpu/bpf.cpu \
 		FLAGS="with-multiple-isa with-scache"
 	rm -f $(srcdir)/model.c
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c: $(CGEN_MAINT) stamp-cpu
 	@true
 
@@ -121,7 +121,7 @@ stamp-defs-le: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM)
 		archfile=$(srcdir)/../../cpu/bpf.cpu \
 		FLAGS="with-scache" \
                 SUFFIX="-le"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/defs-le.h: $(CGEN_MAINT) stamp-defs-le
 	@true
 
@@ -132,7 +132,7 @@ stamp-defs-be: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM)
 		archfile=$(srcdir)/../../cpu/bpf.cpu \
 		FLAGS="with-scache" \
                 SUFFIX="-be"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/defs-be.h: $(CGEN_MAINT) stamp-defs-be
 	@true
 
@@ -143,7 +143,7 @@ stamp-decode-le: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) $(GEN_DECODE_SCM)
 		FLAGS="with-scache" \
                 SUFFIX="-le" \
 		EXTRAFILES="$(CGEN_CPU_SEM)"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/sem-le.c $(srcdir)/decode-le.c $(srcdir)/decode-le.h: \
               $(CGEN_MAINT) stamp-decode-le
 	@true
@@ -156,7 +156,7 @@ stamp-decode-be: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) $(GEN_DECODE_SCM)
 		FLAGS="with-scache" \
                 SUFFIX="-be" \
 		EXTRAFILES="$(CGEN_CPU_SEM)"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/sem-be.c $(srcdir)/decode-be.c $(srcdir)/decode-be.h: \
               $(CGEN_MAINT) stamp-decode-be
 	@true
@@ -171,7 +171,7 @@ stamp-mloop-le: $(srcdir)/../common/genmloop.sh mloop.in Makefile
                 -infile $(srcdir)/mloop.in -outfile-suffix -le
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-le.hin eng-le.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop-le.cin mloop-le.c
-	touch $@
+	$(SILENCE) touch $@
 mloop-le.c eng-le.h: stamp-mloop-le
 	@true
 
@@ -181,7 +181,7 @@ stamp-mloop-be: $(srcdir)/../common/genmloop.sh mloop.in Makefile
                 -infile $(srcdir)/mloop.in -outfile-suffix -be
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-be.hin eng-be.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop-be.cin mloop-be.c
-	touch $@
+	$(SILENCE) touch $@
 mloop-be.c eng-be.h: stamp-mloop-be
 	@true
 
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index a9bddb6e6809..ced77f4b2cca 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -266,7 +266,7 @@ stamp-tvals: gentmap
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
 	./gentmap -c >tmp-tmap.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c
-	touch stamp-tvals
+	$(SILENCE) touch $@
 
 #
 # Rules for building sim-* components.  Triggered by listing the corresponding
@@ -425,7 +425,7 @@ stamp-hw: Makefile.in $(srccom)/Make-common.in $(config.status) Makefile
 	echo "  NULL," >> tmp-hw.h
 	echo "};" >> tmp-hw.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw-config.h
-	@echo stamp > stamp-hw
+	$(SILENCE) touch $@
 
 test-hw-events: $(srccom)/hw-events.c libsim.a
 	$(CC) $(ALL_CFLAGS) -DMAIN -o test-hw-events$(EXEEXT) \
@@ -451,7 +451,7 @@ stamp-modules: Makefile $(SIM_OBJS:.o=.c)
 	) >$@.tmp
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $@.tmp modules.c
 	@rm -f $@.l-tmp $@.tmp
-	touch $@
+	$(SILENCE) touch $@
 
 # CGEN support.
 
diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index c6e134b5616f..d47fe71865d3 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -75,7 +75,7 @@ stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 		-cpu crisv10f -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
-	touch stamp-v10fmloop
+	$(SILENCE) touch $@
 
 # CRISV32 objs
 
@@ -94,7 +94,7 @@ stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefi
 		-cpu crisv32f -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
-	touch stamp-v32fmloop
+	$(SILENCE) touch $@
 
 cris-clean:
 	for v in 10 32; do \
@@ -111,7 +111,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
 	  archfile=$(CPU_DIR)/cris.cpu \
 	  FLAGS="with-scache with-profile=fn"
-	touch stamp-arch
+	$(SILENCE) touch $@
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 
 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
@@ -120,7 +120,7 @@ stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr
 	  archfile=$(CPU_DIR)/cris.cpu \
 	  cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
-	touch stamp-v10fcpu
+	$(SILENCE) touch $@
 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
 
 stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
@@ -128,5 +128,5 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr
 	  archfile=$(CPU_DIR)/cris.cpu \
 	  cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
-	touch stamp-v32fcpu
+	$(SILENCE) touch $@
 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
diff --git a/sim/frv/Makefile.in b/sim/frv/Makefile.in
index fd8df1399406..640da02ab6ac 100644
--- a/sim/frv/Makefile.in
+++ b/sim/frv/Makefile.in
@@ -62,7 +62,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 		-cpu frvbf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
-	touch stamp-mloop
+	$(SILENCE) touch $@
 
 frv-clean:
 	rm -f mloop.c eng.h stamp-mloop
@@ -73,7 +73,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 	  archfile=$(srcdir)/../../cpu/frv.cpu \
 	  FLAGS="with-scache"
-	touch stamp-arch
+	$(SILENCE) touch $@
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 #	@true
 
@@ -83,6 +83,6 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../c
 	  archfile=$(srcdir)/../../cpu/frv.cpu \
 	  FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
 	  EXTRAFILES="$(CGEN_CPU_SEM)"
-	touch stamp-cpu
+	$(SILENCE) touch $@
 cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 #	@true
diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in
index af0b918b1187..bbc659049ae8 100644
--- a/sim/iq2000/Makefile.in
+++ b/sim/iq2000/Makefile.in
@@ -62,7 +62,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 		-cpu iq2000bf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
-	touch stamp-mloop
+	$(SILENCE) touch $@
 
 iq2000-clean:
 	rm -f mloop.c eng.h stamp-mloop
@@ -73,7 +73,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/iq2000.cpu Makefile
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=iq2000 \
 	  archfile=$(CPU_DIR)/iq2000.cpu \
 	  FLAGS="with-scache with-profile=fn"
-	touch stamp-arch
+	$(SILENCE) touch $@
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
 
@@ -83,6 +83,6 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/iq2000
 	  archfile=$(CPU_DIR)/iq2000.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
-	touch stamp-cpu
+	$(SILENCE) touch $@
 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 	@true
diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in
index 465c7fe78702..587039cc1618 100644
--- a/sim/lm32/Makefile.in
+++ b/sim/lm32/Makefile.in
@@ -43,7 +43,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 		-cpu lm32bf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
-	touch stamp-mloop
+	$(SILENCE) touch $@
 
 lm32-clean:
 	rm -f mloop.c eng.h stamp-mloop
@@ -54,7 +54,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/lm32.cpu
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 	  archfile=$(CPU_DIR)/lm32.cpu \
 	  FLAGS="with-scache with-profile=fn"
-	touch stamp-arch
+	$(SILENCE) touch $@
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 
 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.cpu
@@ -63,5 +63,5 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.c
 	  archfile=$(CPU_DIR)/lm32.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
-	touch stamp-cpu
+	$(SILENCE) touch $@
 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 340c94636e08..9add7f88c560 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -64,7 +64,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 		-cpu m32rbf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
-	touch stamp-mloop
+	$(SILENCE) touch $@
 
 # M32RX objs
 
@@ -81,7 +81,7 @@ stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 		-outfile-suffix x
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
-	touch stamp-xmloop
+	$(SILENCE) touch $@
 
 # M32R2 objs
 
@@ -98,7 +98,7 @@ stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 		-outfile-suffix 2
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
-	touch stamp-2mloop
+	$(SILENCE) touch $@
 
 m32r-clean:
 	rm -f mloop.c eng.h stamp-mloop
@@ -115,7 +115,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
 	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn"
-	touch stamp-arch
+	$(SILENCE) touch $@
 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
 
@@ -125,7 +125,7 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.c
 	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
-	touch stamp-cpu
+	$(SILENCE) touch $@
 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 	@true
 
@@ -135,7 +135,7 @@ stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.
 	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEMSW)"
-	touch stamp-xcpu
+	$(SILENCE) touch $@
 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
 	@true
 
@@ -145,6 +145,6 @@ stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.
 	  archfile=$(CPU_DIR)/m32r.cpu \
 	  FLAGS="with-scache with-profile=fn" \
 	  EXTRAFILES="$(CGEN_CPU_SEMSW)"
-	touch stamp-2cpu
+	$(SILENCE) touch $@
 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
 	@true
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 0846f5b44d6f..3c56c34e0bf6 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -179,7 +179,7 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c
-	touch tmp-igen
+	$(SILENCE) touch $@
 
 BUILT_SRC_FROM_M16 = \
 	m16_icache.h \
@@ -292,7 +292,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		#
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
-	touch tmp-m16
+	$(SILENCE) touch $@
 
 BUILT_SRC_FROM_MICROMIPS = \
 	micromips16_icache.h \
@@ -451,7 +451,7 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		#
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
-	touch tmp-micromips
+	$(SILENCE) touch $@
 
 BUILT_SRC_FROM_MULTI = @sim_multi_src@
 SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
@@ -527,7 +527,7 @@ tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	  $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c \
 						  $${p}_engine.c ; \
 	done
-	touch tmp-mach-multi
+	$(SILENCE) touch $@
 tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(IGEN_RUN) \
 		$(IGEN_TRACE) \
@@ -545,7 +545,7 @@ tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 		#
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c
-	touch tmp-itable-multi
+	$(SILENCE) touch $@
 tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
 	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
 	  case $${t} in \
@@ -580,7 +580,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
              ;;\
 	  esac \
 	done
-	touch tmp-run-multi
+	$(SILENCE) touch $@
 
 clean-extra:
 	rm -f $(BUILT_SRC_FROM_GEN)
diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in
index 5e75601a8ec2..7475234350fc 100644
--- a/sim/mn10300/Makefile.in
+++ b/sim/mn10300/Makefile.in
@@ -104,4 +104,4 @@ tmp-igen: $(IGEN_INSN) $(IGEN_INSN_INC) $(IGEN_DC) $(IGEN)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c
-	touch tmp-igen
+	$(SILENCE) touch $@
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
index 6d399de53fc9..e6fb632cf911 100644
--- a/sim/or1k/Makefile.in
+++ b/sim/or1k/Makefile.in
@@ -77,7 +77,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
 		-cpu or1k32bf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
-	touch stamp-mloop
+	$(SILENCE) touch $@
 or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS)
 	$(COMPILE) $<
 	$(POSTCOMPILE)
@@ -112,7 +112,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
 	  mach=or32,or32nd \
 	  archfile=$(CPU_DIR)/or1k.cpu \
 	  FLAGS="with-scache"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 	@true
 
@@ -123,6 +123,6 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
 	  archfile=$(CPU_DIR)/or1k.cpu \
 	  FLAGS="with-scache" \
 	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
-	touch $@
+	$(SILENCE) touch $@
 $(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 	@true
diff --git a/sim/ppc/Makefile.in b/sim/ppc/Makefile.in
index 4cc0916fbad9..29f4010d3d18 100644
--- a/sim/ppc/Makefile.in
+++ b/sim/ppc/Makefile.in
@@ -636,7 +636,7 @@ defines.h: tmp-defines; @true
 tmp-defines: config.h Makefile
 	sed -n -e '/^#define HAVE_/s/ 1$$/",/' -e '/^#define HAVE_/s//"HAVE_/p' < config.h > tmp-defines.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-defines.h defines.h
-	touch tmp-defines
+	$(SILENCE) touch $@
 
 #
 # Rules to create the built c source code files
@@ -649,7 +649,7 @@ tmp-dgen: dgen ppc-spr-table $(srcroot)/move-if-change
 		-n spreg.c -p  tmp-spreg.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.h spreg.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.c spreg.c
-	touch tmp-dgen
+	$(SILENCE) touch $@
 
 tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500.igen $(IGEN_OPCODE_RULES) $(srcroot)/move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter
 	$(IGEN) $(IGEN_FLAGS) \
@@ -679,7 +679,7 @@ tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500.
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c
-	touch tmp-igen
+	$(SILENCE) touch $@
 
 # NOTE: Some versions of make don't handle files created as side-effects
 # uncomment the below if that is the case.
@@ -785,7 +785,7 @@ tmp-hw: Makefile $(HW_SRC) $(srcroot)/move-if-change
 		> tmp-hw.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.c hw.c
-	touch tmp-hw
+	$(SILENCE) touch $@
 
 hw_cpu.o: hw_cpu.c $(DEVICE_TABLE_H) $(HW_CPU_H) $(INTERRUPTS_H) $(CPU_H)
 hw_com.o: hw_com.c $(DEVICE_TABLE_H)
@@ -828,7 +828,7 @@ tmp-pk: Makefile $(PACKAGE_SRC) $(srcroot)/move-if-change
 		-e 's/$$/_create_instance;/' \
 		> tmp-pk.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-pk.h pk.h
-	touch tmp-pk
+	$(SILENCE) touch $@
 
 pk_disklabel.o: pk_disklabel.c $(DEVICE_TABLE_H) $(PK_H)
 # ignore this line, it stops make from getting confused
diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in
index b514430ef8b7..37b65b3ebf68 100644
--- a/sim/v850/Makefile.in
+++ b/sim/v850/Makefile.in
@@ -102,7 +102,7 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c
-	touch tmp-igen
+	$(SILENCE) touch $@
 
 clean-extra: clean-igen
 	rm -f table.c simops.h gencode
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 3/7] sim: tighten up stamp rules
  2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
  2021-10-31  5:18 ` [PATCH 2/7] sim: silence stamp touch rules Mike Frysinger
@ 2021-10-31  5:18 ` Mike Frysinger
  2021-10-31  5:18 ` [PATCH 4/7] sim: igen: tighten up build output Mike Frysinger
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:18 UTC (permalink / raw)
  To: gdb-patches

Add a new ECHO_STAMP helper and convert existing stamp code over
to it.  This is mostly common rules and cgen mloop rules.
---
 sim/bpf/Makefile.in       |  6 ++++--
 sim/common/Make-common.in | 44 +++++++++++++++++++++------------------
 sim/cris/Makefile.in      |  6 ++++--
 sim/frv/Makefile.in       |  3 ++-
 sim/iq2000/Makefile.in    |  3 ++-
 sim/lm32/Makefile.in      |  3 ++-
 sim/m32r/Makefile.in      |  9 +++++---
 sim/or1k/Makefile.in      |  3 ++-
 8 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in
index e50e5c5de7aa..05a246e670ac 100644
--- a/sim/bpf/Makefile.in
+++ b/sim/bpf/Makefile.in
@@ -166,7 +166,8 @@ $(srcdir)/sem-be.c $(srcdir)/decode-be.c $(srcdir)/decode-be.h: \
 stamp-mloop: stamp-mloop-le stamp-mloop-be
 
 stamp-mloop-le: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop-le.c eng-le.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
                 -infile $(srcdir)/mloop.in -outfile-suffix -le
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-le.hin eng-le.h
@@ -176,7 +177,8 @@ mloop-le.c eng-le.h: stamp-mloop-le
 	@true
 
 stamp-mloop-be: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop-be.c eng-be.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
                 -infile $(srcdir)/mloop.in -outfile-suffix -be
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-be.hin eng-be.h
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index ced77f4b2cca..706531e8fa12 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -45,6 +45,12 @@ srcsim = $(srcdir)/..
 
 include $(srcroot)/gdb/silent-rules.mk
 
+ifeq ($(V),0)
+ECHO_STAMP = @echo "  GEN   "
+else
+ECHO_STAMP = @:
+endif
+
 # Helper code from gnulib.
 GNULIB_PARENT_DIR = ../..
 include $(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc
@@ -240,7 +246,7 @@ remote_sim_h = $(srcroot)/include/sim/sim.h
 all: libsim.a run$(EXEEXT) .gdbinit
 
 libsim.a: $(LIB_OBJS)
-	rm -f libsim.a
+	$(SILENCE) rm -f libsim.a
 	$(ECHO_AR) $(AR) $(AR_FLAGS) libsim.a $(LIB_OBJS)
 	$(ECHO_RANLIB) $(RANLIB) libsim.a
 
@@ -261,10 +267,11 @@ gentmap: gentmap.o
 
 targ-vals.h targ-map.c: stamp-tvals
 stamp-tvals: gentmap
-	rm -f tmp-tvals.h tmp-tmap.c
-	./gentmap -h >tmp-tvals.h
+	$(ECHO_STAMP) targ-vals.h
+	$(SILENCE) ./gentmap -h >tmp-tvals.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
-	./gentmap -c >tmp-tmap.c
+	$(ECHO_STAMP) targ-tmap.c
+	$(SILENCE) ./gentmap -c >tmp-tmap.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c
 	$(SILENCE) touch $@
 
@@ -411,19 +418,16 @@ endif
 # FIXME This is one very simple-minded way of generating the file hw-config.h
 hw-config.h: stamp-hw ; @true
 stamp-hw: Makefile.in $(srccom)/Make-common.in $(config.status) Makefile
-	rm -f tmp-hw.h
-	echo "/* generated by Makefile */" > tmp-hw.h
-	sim_hw="$(SIM_HW_DEVICES)"; \
-	for hw in $$sim_hw ; do \
-	  echo "extern const struct hw_descriptor dv_$${hw}_descriptor[];" ; \
-	done >> tmp-hw.h
-	echo "const struct hw_descriptor *hw_descriptors[] = {" >> tmp-hw.h
-	sim_hw="$(SIM_HW_DEVICES)"; \
-	for hw in $$sim_hw ; do \
-	  echo "  dv_$${hw}_descriptor," ; \
-	done >> tmp-hw.h
-	echo "  NULL," >> tmp-hw.h
-	echo "};" >> tmp-hw.h
+	$(ECHO_STAMP) hw-config.h
+	$(SILENCE) ( \
+	sim_hw="$(SIM_HW_DEVICES)" ; \
+	echo "/* generated by Makefile */" ; \
+	printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
+	echo "const struct hw_descriptor *hw_descriptors[] = {" ; \
+	printf "  dv_%s_descriptor,\n" $$sim_hw ; \
+	echo "  NULL," ; \
+	echo "};" \
+	) > tmp-hw.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw-config.h
 	$(SILENCE) touch $@
 
@@ -434,8 +438,8 @@ test-hw-events: $(srccom)/hw-events.c libsim.a
 # See sim_pre_argv_init and sim_module_install in sim-module.c for more details.
 modules.c: stamp-modules ; @true
 stamp-modules: Makefile $(SIM_OBJS:.o=.c)
-	@echo Generating $@
-	@LANG=C ; export LANG ; \
+	$(ECHO_STAMP) modules.c
+	$(SILENCE) LANG=C ; export LANG ; \
 	LC_ALL=C ; export LC_ALL ; \
 	sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $^ | sort >$@.l-tmp
 	@set -e; (\
@@ -450,7 +454,7 @@ stamp-modules: Makefile $(SIM_OBJS:.o=.c)
 	echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
 	) >$@.tmp
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change $@.tmp modules.c
-	@rm -f $@.l-tmp $@.tmp
+	$(SILENCE) rm -f $@.l-tmp $@.tmp
 	$(SILENCE) touch $@
 
 # CGEN support.
diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index d47fe71865d3..6125fc87bedc 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -70,7 +70,8 @@ CRISV10F_INCLUDE_DEPS = \
 # than the apparent; some "mono" feature is work in progress)?
 mloopv10f.c engv10.h: stamp-v10fmloop
 stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloopv10f.c engv10.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -switch semcrisv10f-switch.c \
 		-cpu crisv10f -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
@@ -89,7 +90,8 @@ mloopv32f.c engv32.h: stamp-v32fmloop
 # We depend on stamp-v10fmloop to get serialization to avoid
 # racing with it for the same temporary file-names when "make -j".
 stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloopv32f.c engv32.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -switch semcrisv32f-switch.c \
 		-cpu crisv32f -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
diff --git a/sim/frv/Makefile.in b/sim/frv/Makefile.in
index 640da02ab6ac..e709e37ee740 100644
--- a/sim/frv/Makefile.in
+++ b/sim/frv/Makefile.in
@@ -57,7 +57,8 @@ FRVBF_INCLUDE_DEPS = \
 # FIXME: Use of `mono' is wip.
 mloop.c eng.h: stamp-mloop
 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop.c eng.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -scache -parallel-generic-write -parallel-only \
 		-cpu frvbf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in
index bbc659049ae8..4f85dc762358 100644
--- a/sim/iq2000/Makefile.in
+++ b/sim/iq2000/Makefile.in
@@ -57,7 +57,8 @@ IQ2000BF_INCLUDE_DEPS = \
 # FIXME: Use of `mono' is wip.
 mloop.c eng.h: stamp-mloop
 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop.c eng.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu iq2000bf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in
index 587039cc1618..2daf74d637bc 100644
--- a/sim/lm32/Makefile.in
+++ b/sim/lm32/Makefile.in
@@ -38,7 +38,8 @@ LM32BF_INCLUDE_DEPS = \
 # FIXME: Use of `mono' is wip.
 mloop.c eng.h: stamp-mloop
 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop.c eng.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu lm32bf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 9add7f88c560..7b0ed1e0b932 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -59,7 +59,8 @@ M32RBF_INCLUDE_DEPS = \
 # FIXME: Use of `mono' is wip.
 mloop.c eng.h: stamp-mloop ; @true
 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop.c eng.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu m32rbf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
@@ -75,7 +76,8 @@ M32RXF_INCLUDE_DEPS = \
 # FIXME: Use of `mono' is wip.
 mloopx.c engx.h: stamp-xmloop ; @true
 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloopx.c engx.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 		-cpu m32rxf -infile $(srcdir)/mloopx.in \
 		-outfile-suffix x
@@ -92,7 +94,8 @@ M32R2F_INCLUDE_DEPS = \
 # FIXME: Use of `mono' is wip.
 mloop2.c eng2.h: stamp-2mloop ; @true
 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop2.c eng2.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 		-cpu m32r2f -infile $(srcdir)/mloop2.in \
 		-outfile-suffix 2
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
index e6fb632cf911..8f447fdc291a 100644
--- a/sim/or1k/Makefile.in
+++ b/sim/or1k/Makefile.in
@@ -72,7 +72,8 @@ OR1K32BF_INCLUDE_DEPS = \
 
 mloop.c eng.h: stamp-mloop ; @true
 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
-	$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+	$(ECHO_STAMP) mloop.c eng.h
+	$(SILENCE) $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 		-mono -fast -pbb -switch sem-switch.c \
 		-cpu or1k32bf -infile $(srcdir)/mloop.in
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 4/7] sim: igen: tighten up build output
  2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
  2021-10-31  5:18 ` [PATCH 2/7] sim: silence stamp touch rules Mike Frysinger
  2021-10-31  5:18 ` [PATCH 3/7] sim: tighten up stamp rules Mike Frysinger
@ 2021-10-31  5:18 ` Mike Frysinger
  2021-10-31  5:18 ` [PATCH 5/7] sim: tighten up gencode output Mike Frysinger
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:18 UTC (permalink / raw)
  To: gdb-patches

Add a new stamp helper for quiet builds, and don't dump the command
line options when it runs.  That isn't standard tool behavior, and
doesn't really seem necessary in any way.
---
 sim/common/Make-common.in |  1 +
 sim/igen/igen.c           |  2 ++
 sim/mips/Makefile.in      | 18 +++++++++---------
 sim/mn10300/Makefile.in   |  2 +-
 sim/v850/Makefile.in      |  2 +-
 5 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index 706531e8fa12..92e57f561671 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -47,6 +47,7 @@ include $(srcroot)/gdb/silent-rules.mk
 
 ifeq ($(V),0)
 ECHO_STAMP = @echo "  GEN   "
+ECHO_IGEN  = @echo "  IGEN  $(<F)";
 else
 ECHO_STAMP = @:
 endif
diff --git a/sim/igen/igen.c b/sim/igen/igen.c
index e649f853c3dc..952f8e9d4f37 100644
--- a/sim/igen/igen.c
+++ b/sim/igen/igen.c
@@ -1166,10 +1166,12 @@ main (int argc, char **argv, char **envp)
 		       "B:D:F:G:H:I:M:N:P:T:W:o:k:i:n:hc:d:e:m:r:s:t:f:x"))
 	 != -1)
     {
+#if 0  /* For debugging.  */
       fprintf (stderr, "  -%c ", ch);
       if (optarg)
 	fprintf (stderr, "%s ", optarg);
       fprintf (stderr, "\\\n");
+#endif
 
       switch (ch)
 	{
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 3c56c34e0bf6..632cc20f3a8b 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -136,7 +136,7 @@ BUILT_SRC_FROM_IGEN = \
 $(BUILT_SRC_FROM_IGEN): tmp-igen
 
 tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -207,7 +207,7 @@ BUILT_SRC_FROM_M16 = \
 $(BUILT_SRC_FROM_M16): tmp-m16
 
 tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -242,7 +242,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c m16_model.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h m16_support.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c m16_support.c
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -277,7 +277,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c m32_model.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h m32_support.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c m32_support.c
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -331,7 +331,7 @@ BUILT_SRC_FROM_MICROMIPS = \
 $(BUILT_SRC_FROM_MICROMIPS): tmp-micromips
 
 tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -366,7 +366,7 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips16_model.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips16_support.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips16_support.c
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -401,7 +401,7 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips32_model.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips32_support.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips32_support.c
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -436,7 +436,7 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips_m32_model.c
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips_m32_support.h
 	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips_m32_support.c
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
@@ -529,7 +529,7 @@ tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
 	done
 	$(SILENCE) touch $@
 tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-I $(srcdir) \
 		-Werror \
diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in
index 7475234350fc..a68dd43f1a69 100644
--- a/sim/mn10300/Makefile.in
+++ b/sim/mn10300/Makefile.in
@@ -65,7 +65,7 @@ IGEN_INSN=$(srcdir)/mn10300.igen
 IGEN_INSN_INC=$(srcdir)/am33.igen $(srcdir)/am33-2.igen
 IGEN_DC=$(srcdir)/mn10300.dc
 tmp-igen: $(IGEN_INSN) $(IGEN_INSN_INC) $(IGEN_DC) $(IGEN)
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-G gen-direct-access \
                 -M mn10300,am33 -G gen-multi-sim=am33 \
diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in
index 37b65b3ebf68..2c0c5df7c24b 100644
--- a/sim/v850/Makefile.in
+++ b/sim/v850/Makefile.in
@@ -65,7 +65,7 @@ IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejec
 IGEN_INSN=$(srcdir)/v850.igen
 IGEN_DC=$(srcdir)/v850-dc
 tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN)
-	$(IGEN_RUN) \
+	$(ECHO_IGEN) $(IGEN_RUN) \
 		$(IGEN_TRACE) \
 		-G gen-direct-access \
 		-G gen-zero-r0 \
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 5/7] sim: tighten up gencode output
  2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
                   ` (2 preceding siblings ...)
  2021-10-31  5:18 ` [PATCH 4/7] sim: igen: tighten up build output Mike Frysinger
@ 2021-10-31  5:18 ` Mike Frysinger
  2021-10-31  5:18 ` [PATCH 6/7] sim: tighten up build regen rules Mike Frysinger
  2021-10-31  5:19 ` [PATCH 7/7] sim: m32c: tighten up opc2c build output Mike Frysinger
  5 siblings, 0 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:18 UTC (permalink / raw)
  To: gdb-patches

Update the gencode rules to use the silent build helpers.
---
 sim/cr16/Makefile.in    | 10 +++++-----
 sim/d10v/Makefile.in    | 10 +++++-----
 sim/m68hc11/Makefile.in |  8 ++++----
 sim/sh/Makefile.in      | 10 +++++-----
 4 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/sim/cr16/Makefile.in b/sim/cr16/Makefile.in
index 6d6555a32610..99b2becf792b 100644
--- a/sim/cr16/Makefile.in
+++ b/sim/cr16/Makefile.in
@@ -36,19 +36,19 @@ NL_TARGET = -DNL_TARGET_cr16
 ## COMMON_POST_CONFIG_FRAG
 
 simops.h: gencode
-	./gencode -h >$@
+	$(ECHO_GEN) ./gencode -h >$@
 
 table.c: gencode simops.h
-	./gencode >$@
+	$(ECHO_GEN) ./gencode >$@
 
 gencode.o: gencode.c $(INCLUDE)
-	$(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/gencode.c
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/gencode.c
 
 cr16-opc.o: $(srcdir)/../../opcodes/cr16-opc.c
-	$(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/../../opcodes/cr16-opc.c
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/../../opcodes/cr16-opc.c
 
 gencode: gencode.o cr16-opc.o
-	$(LINK_FOR_BUILD) gencode.o cr16-opc.o
+	$(ECHO_CCLD) $(LINK_FOR_BUILD) gencode.o cr16-opc.o
 
 clean-extra:
 	rm -f table.c simops.h gencode
diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in
index 67c7efdf32ba..4f8759b3deac 100644
--- a/sim/d10v/Makefile.in
+++ b/sim/d10v/Makefile.in
@@ -37,19 +37,19 @@ NL_TARGET = -DNL_TARGET_d10v
 ## COMMON_POST_CONFIG_FRAG
 
 simops.h: gencode
-	./gencode -h >$@
+	$(ECHO_GEN) ./gencode -h >$@
 
 table.c: gencode simops.h
-	./gencode >$@
+	$(ECHO_GEN) ./gencode >$@
 
 gencode.o: gencode.c $(INCLUDE)
-	$(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/gencode.c
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/gencode.c
 
 d10v-opc.o: $(srcdir)/../../opcodes/d10v-opc.c
-	$(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/../../opcodes/d10v-opc.c
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) $(WARN_CFLAGS) -c $(srcdir)/../../opcodes/d10v-opc.c
 
 gencode: gencode.o d10v-opc.o
-	$(LINK_FOR_BUILD) gencode.o d10v-opc.o
+	$(ECHO_CCLD) $(LINK_FOR_BUILD) gencode.o d10v-opc.o
 
 clean-extra:
 	rm -f table.c simops.h gencode
diff --git a/sim/m68hc11/Makefile.in b/sim/m68hc11/Makefile.in
index e7b668648558..f906a7c2bb67 100644
--- a/sim/m68hc11/Makefile.in
+++ b/sim/m68hc11/Makefile.in
@@ -42,16 +42,16 @@ SIM_EXTRA_CLEAN = clean-extra
 ## COMMON_POST_CONFIG_FRAG
 
 m68hc11int.c: gencode
-	./gencode -m6811 > $@
+	$(ECHO_GEN) ./gencode -m6811 > $@
 
 m68hc12int.c: gencode
-	./gencode -m6812 > $@
+	$(ECHO_GEN) ./gencode -m6812 > $@
 
 gencode.o: gencode.c
-	$(COMPILE_FOR_BUILD) -c $< -o $@
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) -c $< -o $@
 
 gencode: gencode.o
-	$(LINK_FOR_BUILD) $^
+	$(ECHO_CCLD) $(LINK_FOR_BUILD) $^
 
 clean-extra:
 	rm -f gencode m68hc11int.c
diff --git a/sim/sh/Makefile.in b/sim/sh/Makefile.in
index e43fb5a17e86..efac41e8a401 100644
--- a/sim/sh/Makefile.in
+++ b/sim/sh/Makefile.in
@@ -34,21 +34,21 @@ SIM_WERROR_CFLAGS =
 ## COMMON_POST_CONFIG_FRAG
 
 code.c: gencode
-	./gencode -x >code.c
+	$(ECHO_GEN) ./gencode -x >code.c
 #	indent code.c
 
 table.c: gencode
-	./gencode -s >table.c
+	$(ECHO_GEN) ./gencode -s >table.c
 #	indent table.c
 
 ppi.c: gencode
-	./gencode -p >ppi.c
+	$(ECHO_GEN) ./gencode -p >ppi.c
 
 gencode.o: gencode.c
-	$(COMPILE_FOR_BUILD) -c $< -o $@
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) -c $< -o $@
 
 gencode: gencode.o
-	$(LINK_FOR_BUILD) $^
+	$(ECHO_CCLD) $(LINK_FOR_BUILD) $^
 
 sh-clean:
 	rm -f gencode code.c table.c
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 6/7] sim: tighten up build regen rules
  2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
                   ` (3 preceding siblings ...)
  2021-10-31  5:18 ` [PATCH 5/7] sim: tighten up gencode output Mike Frysinger
@ 2021-10-31  5:18 ` Mike Frysinger
  2021-10-31  5:19 ` [PATCH 7/7] sim: m32c: tighten up opc2c build output Mike Frysinger
  5 siblings, 0 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:18 UTC (permalink / raw)
  To: gdb-patches

Update the makefile & configure related rules to use the silent
build helpers.
---
 sim/common/Make-common.in | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index 92e57f561671..ffcbc7e3c058 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -532,15 +532,15 @@ distclean maintainer-clean realclean: clean $(SIM_EXTRA_DISTCLEAN)
 force:
 
 Makefile: Makefile.in $(srccom)/Make-common.in $(config.status)
-@SIM_COMMON_BUILD_FALSE@	CONFIG_HEADERS= $(SHELL) ./config.status
-@SIM_COMMON_BUILD_TRUE@	pwd=`pwd` && subdir=`basename "$$pwd"` && cd .. && \
+@SIM_COMMON_BUILD_FALSE@	$(ECHO_GEN) CONFIG_HEADERS= $(SHELL) ./config.status
+@SIM_COMMON_BUILD_TRUE@	$(ECHO_GEN) pwd=`pwd` && subdir=`basename "$$pwd"` && cd .. && \
 @SIM_COMMON_BUILD_TRUE@		$(SHELL) ./config.status Make-common.sim $$subdir/Makefile.sim $$subdir/Makefile
 
 @SIM_COMMON_BUILD_FALSE@config.status: configure
-@SIM_COMMON_BUILD_FALSE@	$(SHELL) ./config.status --recheck
+@SIM_COMMON_BUILD_FALSE@	$(ECHO_GEN) $(SHELL) ./config.status --recheck
 
 .gdbinit: # config.status $(srccom)/gdbinit.in
-@SIM_COMMON_BUILD_FALSE@	CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status
+@SIM_COMMON_BUILD_FALSE@	$(ECHO_GEN) CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status
 
 
 # CGEN support
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 7/7] sim: m32c: tighten up opc2c build output
  2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
                   ` (4 preceding siblings ...)
  2021-10-31  5:18 ` [PATCH 6/7] sim: tighten up build regen rules Mike Frysinger
@ 2021-10-31  5:19 ` Mike Frysinger
  5 siblings, 0 replies; 7+ messages in thread
From: Mike Frysinger @ 2021-10-31  5:19 UTC (permalink / raw)
  To: gdb-patches

Drop the single debugging line that repeats the command line option,
and use the silent build helpers to tighten up output.
---
 sim/m32c/Makefile.in | 12 ++++++------
 sim/m32c/opc2c.c     |  1 -
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/sim/m32c/Makefile.in b/sim/m32c/Makefile.in
index 0c101a835cf9..cfdadd041048 100644
--- a/sim/m32c/Makefile.in
+++ b/sim/m32c/Makefile.in
@@ -49,18 +49,18 @@ arch = m32c
 OPC2C = ASAN_OPTIONS=detect_leaks=0 ./opc2c
 
 r8c.c : r8c.opc opc2c
-	$(OPC2C) -l r8c.out $(srcdir)/r8c.opc > r8c.c.tmp
-	mv r8c.c.tmp r8c.c
+	$(ECHO_GEN) $(OPC2C) -l r8c.out $(srcdir)/r8c.opc > r8c.c.tmp
+	$(SILENCE) mv r8c.c.tmp r8c.c
 
 m32c.c : m32c.opc opc2c
-	$(OPC2C) -l m32c.out $(srcdir)/m32c.opc > m32c.c.tmp
-	mv m32c.c.tmp m32c.c
+	$(ECHO_GEN) $(OPC2C) -l m32c.out $(srcdir)/m32c.opc > m32c.c.tmp
+	$(SILENCE) mv m32c.c.tmp m32c.c
 
 opc2c : opc2c.o
-	$(LINK_FOR_BUILD) $^
+	$(ECHO_CCLD) $(LINK_FOR_BUILD) $^
 
 encodings:
 	grep '/\* [01]' $(srcdir)/r8c.opc | sort
 
 opc2c.o : opc2c.c
-	$(COMPILE_FOR_BUILD) -c $(srcdir)/opc2c.c
+	$(ECHO_CC) $(COMPILE_FOR_BUILD) -c $(srcdir)/opc2c.c
diff --git a/sim/m32c/opc2c.c b/sim/m32c/opc2c.c
index 3d1713d20345..f67b134639ae 100644
--- a/sim/m32c/opc2c.c
+++ b/sim/m32c/opc2c.c
@@ -513,7 +513,6 @@ main (int argc, char **argv)
   if (argc > 2 && strcmp (argv[1], "-l") == 0)
     {
       sim_log = fopen (argv[2], "w");
-      fprintf (stderr, "sim_log: %s\n", argv[2]);
       argc -= 2;
       argv += 2;
     }
-- 
2.33.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2021-10-31  5:20 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-31  5:18 [PATCH 1/7] sim: standardize move-if-change rules Mike Frysinger
2021-10-31  5:18 ` [PATCH 2/7] sim: silence stamp touch rules Mike Frysinger
2021-10-31  5:18 ` [PATCH 3/7] sim: tighten up stamp rules Mike Frysinger
2021-10-31  5:18 ` [PATCH 4/7] sim: igen: tighten up build output Mike Frysinger
2021-10-31  5:18 ` [PATCH 5/7] sim: tighten up gencode output Mike Frysinger
2021-10-31  5:18 ` [PATCH 6/7] sim: tighten up build regen rules Mike Frysinger
2021-10-31  5:19 ` [PATCH 7/7] sim: m32c: tighten up opc2c build output Mike Frysinger

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