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From: Dragan Mladjenovic <Dragan.Mladjenovic@syrmia.com>
To: gdb-patches@sourceware.org
Cc: Mike Frysinger <vapier@gentoo.org>,
	"Maciej W . Rozycki" <macro@orcam.me.uk>,
	Chao-ying Fu <cfu@wavecomp.com>,
	Faraz Shahbazker <fshahbazker@wavecomp.com>
Subject: [PATCH v4 3/4] sim: Add partial support for IEEE 754-2008
Date: Tue,  1 Feb 2022 13:53:01 +0100	[thread overview]
Message-ID: <20220201125302.30137-4-Dragan.Mladjenovic@syrmia.com> (raw)
In-Reply-To: <20220201125302.30137-1-Dragan.Mladjenovic@syrmia.com>

From: Faraz Shahbazker <fshahbazker@wavecomp.com>

2022-02-01  Faraz Shahbazker  <fshahbazker@wavecomp.com>

sim/common/ChangeLog:
	* sim-fpu.c (sim_fpu_minmax_nan): New.
	(sim_fpu_max): Add variant behaviour for IEEE 754-2008.
	(sim_fpu_min): Likewise.
	(sim_fpu_is_un, sim_fpu_is_or): New.
	(sim_fpu_un, sim_fpu_or): New.
	(sim_fpu_is_ieee754_2008, sim_fpu_is_ieee754_1985): New.
	(sim_fpu_set_mode): New.
	(sim_fpu_classify): New.
	* sim-fpu.h (sim_fpu_minmax_nan): New declaration.
	(sim_fpu_un, sim_fpu_or): New declarations.
	(sim_fpu_is_un, sim_fpu_is_or): New declarations.
	(sim_fpu_mode): New enum.
	[sim_fpu_state](current_mode): New field.
	(sim_fpu_current_mode): New define.
	(sim_fpu_is_ieee754_2008): New declaration.
	(sim_fpu_is_ieee754_1985): New declaration.
	(sim_fpu_set_mode): New declaration.
	(sim_fpu_classify): New declaration.
---
 sim/common/sim-fpu.c | 111 +++++++++++++++++++++++++++++++++++++++++--
 sim/common/sim-fpu.h |  26 +++++++++-
 2 files changed, 131 insertions(+), 6 deletions(-)

Changes from v3: Moved current mode into sim_fpu_state.

diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c
index 4d16a392dc9..c6f6622612c 100644
--- a/sim/common/sim-fpu.c
+++ b/sim/common/sim-fpu.c
@@ -1005,6 +1005,30 @@ sim_fpu_op_nan (sim_fpu *f, const sim_fpu *l, const sim_fpu *r)
   return 0;
 }
 
+/* NaN handling specific to min/max operations.  */
+
+INLINE_SIM_FPU (int)
+sim_fpu_minmax_nan (sim_fpu *f, const sim_fpu *l, const sim_fpu *r)
+{
+  if (sim_fpu_is_snan (l)
+      || sim_fpu_is_snan (r)
+      || sim_fpu_is_ieee754_1985 ())
+    return sim_fpu_op_nan (f, l, r);
+  else
+    /* if sim_fpu_is_ieee754_2008()
+       && ((sim_fpu_is_qnan (l) || sim_fpu_is_qnan (r))) */
+    {
+      /* In IEEE754-2008:
+       * "minNum/maxNum is ... the canonicalized number if one
+       * operand is a number and the other a quiet NaN." */
+      if (sim_fpu_is_qnan (l))
+	*f = *r;
+      else /* if (sim_fpu_is_qnan (r)) */
+	*f = *l;
+      return 0;
+    }
+}
+
 /* Arithmetic ops */
 
 INLINE_SIM_FPU (int)
@@ -1553,7 +1577,7 @@ sim_fpu_max (sim_fpu *f,
 	     const sim_fpu *r)
 {
   if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r))
-    return sim_fpu_op_nan (f, l, r);
+    return sim_fpu_minmax_nan (f, l, r);
   if (sim_fpu_is_infinity (l))
     {
       if (sim_fpu_is_infinity (r)
@@ -1616,7 +1640,7 @@ sim_fpu_min (sim_fpu *f,
 	     const sim_fpu *r)
 {
   if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r))
-    return sim_fpu_op_nan (f, l, r);
+    return sim_fpu_minmax_nan (f, l, r);
   if (sim_fpu_is_infinity (l))
     {
       if (sim_fpu_is_infinity (r)
@@ -1677,7 +1701,7 @@ INLINE_SIM_FPU (int)
 sim_fpu_neg (sim_fpu *f,
 	     const sim_fpu *r)
 {
-  if (sim_fpu_is_snan (r))
+  if (sim_fpu_is_ieee754_1985 () && sim_fpu_is_snan (r))
     {
       *f = *r;
       f->class = sim_fpu_class_qnan;
@@ -1700,7 +1724,7 @@ sim_fpu_abs (sim_fpu *f,
 {
   *f = *r;
   f->sign = 0;
-  if (sim_fpu_is_snan (r))
+  if (sim_fpu_is_ieee754_1985 () && sim_fpu_is_snan (r))
     {
       f->class = sim_fpu_class_qnan;
       return sim_fpu_status_invalid_snan;
@@ -2255,6 +2279,21 @@ sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r)
   return is;
 }
 
+INLINE_SIM_FPU (int)
+sim_fpu_is_un (const sim_fpu *l, const sim_fpu *r)
+{
+  int is;
+  sim_fpu_un (&is, l, r);
+  return is;
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_is_or (const sim_fpu *l, const sim_fpu *r)
+{
+  int is;
+  sim_fpu_or (&is, l, r);
+  return is;
+}
 
 /* Compare operators */
 
@@ -2378,11 +2417,55 @@ sim_fpu_gt (int *is,
   return sim_fpu_lt (is, r, l);
 }
 
+INLINE_SIM_FPU (int)
+sim_fpu_un (int *is, const sim_fpu *l, const sim_fpu *r)
+{
+  if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r))
+   {
+    *is = 1;
+    return 0;
+   }
+
+  *is = 0;
+  return 0;
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_or (int *is, const sim_fpu *l, const sim_fpu *r)
+{
+  sim_fpu_un (is, l, r);
+
+  /* Invert result.  */
+  *is = !*is;
+  return 0;
+}
+
+INLINE_SIM_FPU(int)
+sim_fpu_classify (const sim_fpu *f)
+{
+  switch (f->class)
+    {
+    case sim_fpu_class_snan: return SIM_FPU_IS_SNAN;
+    case sim_fpu_class_qnan: return SIM_FPU_IS_QNAN;
+    case sim_fpu_class_infinity:
+      return f->sign ? SIM_FPU_IS_NINF : SIM_FPU_IS_PINF;
+    case sim_fpu_class_zero:
+      return f->sign ? SIM_FPU_IS_NZERO : SIM_FPU_IS_PZERO;
+    case sim_fpu_class_number:
+      return f->sign ? SIM_FPU_IS_NNUMBER : SIM_FPU_IS_PNUMBER;
+    case sim_fpu_class_denorm:
+      return f->sign ? SIM_FPU_IS_NDENORM : SIM_FPU_IS_PDENORM;
+    default:
+      fprintf (stderr, "Bad switch\n");
+      abort ();
+    }
+  return 0;
+}
 
 /* A number of useful constants */
 
 #if EXTERN_SIM_FPU_P
-sim_fpu_state _sim_fpu = { /* quiet_nan_inverted */ false };
+sim_fpu_state _sim_fpu = { /* quiet_nan_inverted */ false, sim_fpu_ieee754_1985 };
 
 const sim_fpu sim_fpu_zero = {
   sim_fpu_class_zero, 0, 0, 0
@@ -2404,6 +2487,24 @@ const sim_fpu sim_fpu_max64 = {
 };
 #endif
 
+/* Specification swapping behaviour */
+INLINE_SIM_FPU (bool)
+sim_fpu_is_ieee754_1985 (void)
+{
+  return (sim_fpu_current_mode == sim_fpu_ieee754_1985);
+}
+
+INLINE_SIM_FPU (bool)
+sim_fpu_is_ieee754_2008 (void)
+{
+  return (sim_fpu_current_mode == sim_fpu_ieee754_2008);
+}
+
+INLINE_SIM_FPU (void)
+sim_fpu_set_mode (const sim_fpu_mode m)
+{
+  sim_fpu_current_mode = m;
+}
 
 /* For debugging */
 
diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h
index 228d2c7e1d6..b192f2deaec 100644
--- a/sim/common/sim-fpu.h
+++ b/sim/common/sim-fpu.h
@@ -163,8 +163,15 @@ typedef enum
 
    FIXME: This state is global, but should be moved to SIM_CPU .  */
 
+typedef enum
+{
+  sim_fpu_ieee754_1985,
+  sim_fpu_ieee754_2008,
+} sim_fpu_mode;
+
 typedef struct _sim_fpu_state {
   bool quiet_nan_inverted; /* Toggle quiet NaN semantics.  */
+  sim_fpu_mode current_mode;
 } sim_fpu_state;
 
 
@@ -268,6 +275,8 @@ INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f,
 
 INLINE_SIM_FPU (int) sim_fpu_op_nan (sim_fpu *f,
 				     const sim_fpu *l, const sim_fpu *r);
+INLINE_SIM_FPU (int) sim_fpu_minmax_nan (sim_fpu *f,
+					 const sim_fpu *l, const sim_fpu *r);
 
 
 
@@ -318,7 +327,8 @@ INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d);
 /* INLINE_SIM_FPU (void) sim_fpu_f2 (sim_fpu *f, float s); */
 INLINE_SIM_FPU (void) sim_fpu_d2 (sim_fpu *f, double d);
 
-
+/* IEEE754-2008 classifiction function.  */
+INLINE_SIM_FPU (int) sim_fpu_classify (const sim_fpu *f);
 
 /* Specific number classes.
 
@@ -367,7 +377,20 @@ INLINE_SIM_FPU (int) sim_fpu_is_ne (const sim_fpu *l, const sim_fpu *r);
 INLINE_SIM_FPU (int) sim_fpu_is_ge (const sim_fpu *l, const sim_fpu *r);
 INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r);
 
+/* Unordered/ordered comparison operators */
+
+INLINE_SIM_FPU (int) sim_fpu_un (int *is, const sim_fpu *l, const sim_fpu *r);
+INLINE_SIM_FPU (int) sim_fpu_or (int *is, const sim_fpu *l, const sim_fpu *r);
+
+INLINE_SIM_FPU (int) sim_fpu_is_un (const sim_fpu *l, const sim_fpu *r);
+INLINE_SIM_FPU (int) sim_fpu_is_or (const sim_fpu *l, const sim_fpu *r);
+
+/* Changes the behaviour of the library to IEEE754-2008 or IEEE754-1985.
+ * The default for the library is IEEE754-1985. */
 
+INLINE_SIM_FPU (bool) sim_fpu_is_ieee754_1985 (void);
+INLINE_SIM_FPU (bool) sim_fpu_is_ieee754_2008 (void);
+INLINE_SIM_FPU (void) sim_fpu_set_mode (const sim_fpu_mode m);
 
 /* General number class and comparison operators.
 
@@ -411,6 +434,7 @@ extern sim_fpu_state _sim_fpu;
    between pre-R6 and R6 MIPS cores.  */
 
 #define sim_fpu_quiet_nan_inverted _sim_fpu.quiet_nan_inverted
+#define sim_fpu_current_mode _sim_fpu.current_mode
 
 /* A number of useful constants.  */
 
-- 
2.17.1


  parent reply	other threads:[~2022-02-01 12:53 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-01 12:52 [PATCH v4 0/4] sim: Add support for MIPS32/64 revision 6 Dragan Mladjenovic
2022-02-01 12:52 ` [PATCH v4 1/4] sim: Allow toggling of quiet NaN-bit semantics Dragan Mladjenovic
2022-02-02  3:39   ` Mike Frysinger
2022-02-01 12:53 ` [PATCH v4 2/4] sim: Factor out NaN handling in floating point operations Dragan Mladjenovic
2022-02-01 12:53 ` Dragan Mladjenovic [this message]
2022-02-02  3:42   ` [PATCH v4 3/4] sim: Add partial support for IEEE 754-2008 Mike Frysinger
2022-02-01 12:53 ` [PATCH v4 4/4] sim: mips: Add simulator support for mips32r6/mips64r6 Dragan Mladjenovic
2022-02-02  3:47   ` Mike Frysinger

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