From: christophe.lyon.oss@gmail.com
To: gdb-patches@sourceware.org
Cc: torbjorn.svensson@st.com, Christophe Lyon <christophe.lyon@foss.st.com>
Subject: [PATCH v3 1/5] gdb/arm: Fix prologue analysis to support vpush
Date: Fri, 4 Feb 2022 09:41:47 +0100 [thread overview]
Message-ID: <20220204084151.14480-2-christophe.lyon@gmail.com> (raw)
In-Reply-To: <20220204084151.14480-1-christophe.lyon@gmail.com>
From: Christophe Lyon <christophe.lyon@foss.st.com>
While working on adding support for Non-secure/Secure modes unwinding,
I noticed that the prologue analysis lacked support for vpush, which
is used for instance in the CMSE stub routine.
This patch updates thumb_analyze_prologue accordingly, adding support
for vpush of D-registers.
Signed-off-by: Christophe Lyon <christophe.lyon@foss.st.com>
---
gdb/arm-tdep.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 7495434484e..7d52d2d78f6 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -896,6 +896,31 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
regs[bits (insn, 0, 3)] = addr;
}
+ else if ((insn & 0xff20) == 0xed20 /* vstmdb Rn{!}, { D-registers} */
+ && (inst2 & 0x0f00) == 0x0b00/* (aka vpush) */
+ && pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
+ {
+ /* Address SP points to. */
+ pv_t addr = regs[bits (insn, 0, 3)];
+
+ /* Number of registers saved. */
+ int number = bits (inst2, 0, 7) >> 1;
+
+ if (stack.store_would_trash (addr))
+ break;
+
+ /* Calculate offsets of saved registers. */
+ for (; number > 0; number--)
+ {
+ addr = pv_add_constant (addr, -8);
+ stack.store (addr, 8, pv_register (ARM_D0_REGNUM + number, 0));
+ }
+
+ /* Writeback SP if needed. */
+ if (insn & 0x0020)
+ regs[bits (insn, 0, 3)] = addr;
+ }
+
else if ((insn & 0xff50) == 0xe940 /* strd Rt, Rt2,
[Rn, #+/-imm]{!} */
&& pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
--
2.25.1
next prev parent reply other threads:[~2022-02-04 8:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-04 8:41 [PATCH v3 0/5] arm: Add support for multiple stacks on Cortex-M christophe.lyon.oss
2022-02-04 8:41 ` christophe.lyon.oss [this message]
2022-02-04 8:41 ` [PATCH v3 2/5] gdb/arm: Define MSP and PSP registers for M-Profile christophe.lyon.oss
2022-02-04 8:41 ` [PATCH v3 3/5] gdb/arm: Introduce arm_cache_init christophe.lyon.oss
2022-02-04 8:41 ` [PATCH v3 4/5] gdb/arm: Add support for multiple stack pointers on Cortex-M christophe.lyon.oss
2022-02-04 8:41 ` [PATCH v3 5/5] gdb/arm: Extend arm_m_addr_is_magic to support FNC_RETURN, add unwind-ns-to-s command christophe.lyon.oss
2022-02-25 9:54 ` [PATCH v3 0/5] arm: Add support for multiple stacks on Cortex-M Maxim Kuvyrkov
2022-02-27 11:35 ` Joel Brobecker
2022-02-28 10:38 ` Christophe Lyon
2022-03-06 10:48 ` Joel Brobecker
2022-03-06 21:19 ` Christophe Lyon
2022-03-11 9:40 ` Yvan Roux
2022-03-11 9:47 ` Christophe Lyon
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