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* [PATCH] gdb/arm: Terminate unwinding when LR is 0xffffffff
@ 2022-06-02 14:18 Yvan Roux
  2022-06-07 12:36 ` Luis Machado
  0 siblings, 1 reply; 2+ messages in thread
From: Yvan Roux @ 2022-06-02 14:18 UTC (permalink / raw)
  To: gdb-patches; +Cc: Luis Machado, Torbjorn SVENSSON

Hi,

ARMv7-M Architecture Reference "A2.3.1 Arm core registers" states
that LR is set to 0xffffffff on reset.

ARMv8-M Architecture Reference "B3.3 Registers" states that LR is set
to 0xffffffff on warm reset if Main Extension is implemented,
otherwise the value is unknown.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com>
Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>
---
 gdb/arm-tdep.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 50ec41a66b1..5ec0e642cc7 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3330,6 +3330,17 @@ arm_m_exception_cache (struct frame_info *this_frame)
   lr = get_frame_register_unsigned (this_frame, ARM_LR_REGNUM);
   sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
 
+  /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
+     states that LR is set to 0xffffffff on reset.  ARMv8-M Architecture
+     Reference "B3.3 Registers" states that LR is set to 0xffffffff on warm
+     reset if Main Extension is implemented, otherwise the value is unknown.  */
+  if (lr == 0xffffffff)
+    {
+      /* Terminate any further stack unwinding by referring to self.  */
+      arm_cache_set_active_sp_value (cache, tdep, sp);
+      return cache;
+    }
+
   fnc_return = ((lr & 0xfffffffe) == 0xfefffffe);
   if (tdep->have_sec_ext && fnc_return)
     {
-- 
2.17.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] gdb/arm: Terminate unwinding when LR is 0xffffffff
  2022-06-02 14:18 [PATCH] gdb/arm: Terminate unwinding when LR is 0xffffffff Yvan Roux
@ 2022-06-07 12:36 ` Luis Machado
  0 siblings, 0 replies; 2+ messages in thread
From: Luis Machado @ 2022-06-07 12:36 UTC (permalink / raw)
  To: Yvan Roux, gdb-patches; +Cc: Torbjorn SVENSSON

On 6/2/22 15:18, Yvan Roux wrote:
> Hi,
> 
> ARMv7-M Architecture Reference "A2.3.1 Arm core registers" states
> that LR is set to 0xffffffff on reset.
> 
> ARMv8-M Architecture Reference "B3.3 Registers" states that LR is set
> to 0xffffffff on warm reset if Main Extension is implemented,
> otherwise the value is unknown.
> 
> Signed-off-by: Torbj�rn SVENSSON <torbjorn.svensson@st.com>
> Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>
> ---
>   gdb/arm-tdep.c | 11 +++++++++++
>   1 file changed, 11 insertions(+)
> 
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index 50ec41a66b1..5ec0e642cc7 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -3330,6 +3330,17 @@ arm_m_exception_cache (struct frame_info *this_frame)
>     lr = get_frame_register_unsigned (this_frame, ARM_LR_REGNUM);
>     sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
>   
> +  /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
> +     states that LR is set to 0xffffffff on reset.  ARMv8-M Architecture
> +     Reference "B3.3 Registers" states that LR is set to 0xffffffff on warm
> +     reset if Main Extension is implemented, otherwise the value is unknown.  */
> +  if (lr == 0xffffffff)
> +    {
> +      /* Terminate any further stack unwinding by referring to self.  */
> +      arm_cache_set_active_sp_value (cache, tdep, sp);
> +      return cache;
> +    }
> +
>     fnc_return = ((lr & 0xfffffffe) == 0xfefffffe);
>     if (tdep->have_sec_ext && fnc_return)
>       {

Thanks. This is OK.

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2022-06-07 12:36 UTC | newest]

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2022-06-02 14:18 [PATCH] gdb/arm: Terminate unwinding when LR is 0xffffffff Yvan Roux
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