From: Koudai Iwahori <koudai@google.com>
To: Luis Machado <luis.machado@arm.com>
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH] AArch64 pauth: Support backtrace in EL1 (kernel space)
Date: Wed, 5 Oct 2022 10:07:35 +0800 [thread overview]
Message-ID: <CACpRSJuj1Om5t6gyd4QX0bzD-DshFCkaJtTJcpUH5sPJo2YjJQ@mail.gmail.com> (raw)
Message-ID: <20221005020735.VlWvFLlwobNy1A0FG37LVnr3euKRnVUCJ9P5iTkPArs@z> (raw)
In-Reply-To: <f9eb62dc-a6d8-8c16-234e-a8bcd3e1f942@arm.com>
[-- Attachment #1: Type: text/plain, Size: 2586 bytes --]
Hi Luis,
Got it, thank you!
On Tue, Oct 4, 2022 at 5:24 PM Luis Machado <luis.machado@arm.com> wrote:
> Hi,
>
> On 9/28/22 03:59, Koudai Iwahori via Gdb-patches wrote:
> > The way to remove the signature bits from the address depends on the
> > 55th bit of the address. If 55th bit is zero, the signature bits should
> > be all cleared. If the 55th bit is one, the signature bits should be all
> > set.
> > ---
> > I found very similar patches after fixing this issue:
> > https://sourceware.org/pipermail/gdb-patches/2022-July/190507.html
> > https://sourceware.org/pipermail/gdb-patches/2021-October/182859.html
> > If this issue will be fixed in the near future, I can wait for it
>
> Yes, it should be fixed by the first link above. It is pending approval
> from maintainers, which should
> hopefully happen soon.
>
> I also have an upcoming patch (that relies on the above patch) to support
> pauth for user-mode QEMU.
>
> See https://sourceware.org/bugzilla/show_bug.cgi?id=29421.
>
> >
> > gdb/aarch64-tdep.c | 16 +++++++++++++++-
> > 1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
> > index d0387044934..16d1e44e903 100644
> > --- a/gdb/aarch64-tdep.c
> > +++ b/gdb/aarch64-tdep.c
> > @@ -244,6 +244,20 @@ class instruction_reader : public
> abstract_instruction_reader
> >
> > } // namespace
> >
> > +/* removes the pauth signature bits from the address. */
> > +
> > +static CORE_ADDR
> > +aarch64_remove_pauth_signature (CORE_ADDR addr, CORE_ADDR mask)
> > +{
> > + /* 55th bit in address determines whether the address comes from the
> top
> > + address range or the bottom address range. */
> > + constexpr CORE_ADDR pauth_va_range_select_mask = CORE_ADDR(1) << 55;
> > + if (addr & pauth_va_range_select_mask)
> > + return addr | mask;
> > + else
> > + return addr & ~mask;
> > +}
> > +
> > /* If address signing is enabled, mask off the signature bits from the
> link
> > register, which is passed by value in ADDR, using the register
> values in
> > THIS_FRAME. */
> > @@ -258,7 +272,7 @@ aarch64_frame_unmask_lr (aarch64_gdbarch_tdep *tdep,
> > {
> > int cmask_num = AARCH64_PAUTH_CMASK_REGNUM
> (tdep->pauth_reg_base);
> > CORE_ADDR cmask = frame_unwind_register_unsigned (this_frame,
> cmask_num);
> > - addr = addr & ~cmask;
> > + addr = aarch64_remove_pauth_signature(addr, cmask);
> >
> > /* Record in the frame that the link register required
> unmasking. */
> > set_frame_previous_pc_masked (this_frame);
>
>
next prev parent reply other threads:[~2022-10-05 2:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-28 2:59 Koudai Iwahori
2022-10-04 9:24 ` Luis Machado
2022-10-05 2:07 ` Koudai Iwahori [this message]
2022-10-05 2:07 ` Koudai Iwahori
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