* [PATCH 1/9] sim: cgen: hoist rules to the top-level build
@ 2023-01-02 4:32 Mike Frysinger
2023-01-02 4:32 ` [PATCH 2/9] sim: bpf: hoist cgen rules to top-level Mike Frysinger
` (7 more replies)
0 siblings, 8 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
The rules seem to generate the same output as existing subdir cgen
rules with cgen ports, so hopefully this should be correct. These
are the last set of codegen rules that we run in subdirs, so this
will help unblock killing off subdir builds entirely.
---
sim/Makefile.in | 53 +++++++++++++++++++++++++++++++++++++++
sim/common/local.mk | 60 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 113 insertions(+)
diff --git a/sim/common/local.mk b/sim/common/local.mk
index dde24810e575..22917e0f8a64 100644
--- a/sim/common/local.mk
+++ b/sim/common/local.mk
@@ -142,3 +142,63 @@ SIM_COMMON_LIBS = \
$(LIBIBERTY_LIB) \
$(LIBGNU) \
$(LIBGNU_EXTRA_LIBS)
+
+##
+## CGEN support.
+##
+
+## If the local tree has a bundled copy of guile, use that.
+GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
+CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
+CGENFLAGS = -v
+CGEN_CPU_DIR = $(cgendir)/cpu
+## Most ports use the files here instead of cgen/cpu.
+CPU_DIR = $(srcroot)/cpu
+CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
+
+CGEN_READ_SCM = $(cgendir)/sim.scm
+CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
+CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
+CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
+CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
+
+## Various choices for which cpu specific files to generate.
+## These are passed to cgen.sh in the "extrafiles" argument.
+CGEN_CPU_EXTR = /extr/
+CGEN_CPU_READ = /read/
+CGEN_CPU_WRITE = /write/
+CGEN_CPU_SEM = /sem/
+CGEN_CPU_SEMSW = /semsw/
+
+CGEN_WRAPPER = $(srccom)/cgen.sh
+
+CGEN_GEN_ARCH = \
+ $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
+ $(CGEN) $(cgendir) "$(CGENFLAGS)" \
+ $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
+ $(CGEN_ARCHFILE) ignored
+CGEN_GEN_CPU = \
+ $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
+ $(CGEN) $(cgendir) "$(CGENFLAGS)" \
+ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+ $(CGEN_ARCHFILE) "$$EXTRAFILES"
+CGEN_GEN_DEFS = \
+ $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
+ $(CGEN) $(cgendir) "$(CGENFLAGS)" \
+ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+ $(CGEN_ARCHFILE) ignored
+CGEN_GEN_DECODE = \
+ $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
+ $(CGEN) $(cgendir) "$(CGENFLAGS)" \
+ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+ $(CGEN_ARCHFILE) "$$EXTRAFILES"
+CGEN_GEN_CPU_DECODE = \
+ $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
+ $(CGEN) $(cgendir) "$(CGENFLAGS)" \
+ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+ $(CGEN_ARCHFILE) "$$EXTRAFILES"
+CGEN_GEN_CPU_DESC = \
+ $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
+ $(CGEN) $(cgendir) "$(CGENFLAGS)" \
+ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+ $(CGEN_ARCHFILE) ignored $$opcfile
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/9] sim: bpf: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 3/9] sim: cris: " Mike Frysinger
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 25 +++++++++++++
sim/bpf/Makefile.in | 90 ---------------------------------------------
sim/bpf/local.mk | 37 +++++++++++++++++++
3 files changed, 62 insertions(+), 90 deletions(-)
diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in
index 7a17de8d4758..2732a0e6071e 100644
--- a/sim/bpf/Makefile.in
+++ b/sim/bpf/Makefile.in
@@ -33,8 +33,6 @@ SIM_OBJS = \
SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=64
-SIM_EXTRA_CLEAN = bpf-clean
-
## COMMON_POST_CONFIG_FRAG
# Dependencies for binaries from CGEN generated source
@@ -61,91 +59,3 @@ sem-be.o: sem-be.c
$(POSTCOMPILE)
arch = bpf
-
-CGEN_COMMON_DEPS = \
- $(CGEN_READ_SCM) \
- $(srcdir)/../../cpu/bpf.cpu \
- $(srcdir)/../../cpu/bpf.opc \
- Makefile
-
-stamp-arch: $(CGEN_COMMON_DEPS) $(CGEN_ARCH_SCM)
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
- mach=bpf cpu=bpfbf \
- archfile=$(srcdir)/../../cpu/bpf.cpu \
- FLAGS="with-scache"
- $(SILENCE) touch $@
-$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
- @true
-
-stamp-cpu: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM)
- $(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
- isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf \
- archfile=$(srcdir)/../../cpu/bpf.cpu \
- FLAGS="with-multiple-isa with-scache"
- rm -f $(srcdir)/model.c
- $(SILENCE) touch $@
-$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c: $(CGEN_MAINT) stamp-cpu
- @true
-
-# We need to generate a group of files per ISA.
-# For eBPF little-endian:
-# defs-le.h
-# sem-le.c, decode-le.c, decode-le.h
-# $(objdir)/mloop-le.c $(objdir)/eng-le.h
-# For eBPF big-endian:
-# defs-be.h
-# sem-be.c, decode-be.c, decode-be.h
-# $(objdir)/mloop-be.c $(objdir)/eng-le.h
-#
-# The rules below take care of that.
-
-stamp-defs-le: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM)
- $(MAKE) cgen-defs $(CGEN_FLAGS_TO_PASS) \
- isa=ebpfle cpu=bpfbf mach=bpf \
- archfile=$(srcdir)/../../cpu/bpf.cpu \
- FLAGS="with-scache" \
- SUFFIX="-le"
- $(SILENCE) touch $@
-$(srcdir)/defs-le.h: $(CGEN_MAINT) stamp-defs-le
- @true
-
-
-stamp-defs-be: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM)
- $(MAKE) cgen-defs $(CGEN_FLAGS_TO_PASS) \
- isa=ebpfbe cpu=bpfbf mach=bpf \
- archfile=$(srcdir)/../../cpu/bpf.cpu \
- FLAGS="with-scache" \
- SUFFIX="-be"
- $(SILENCE) touch $@
-$(srcdir)/defs-be.h: $(CGEN_MAINT) stamp-defs-be
- @true
-
-stamp-decode-le: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) $(GEN_DECODE_SCM)
- $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
- isa=ebpfle cpu=bpfbf mach=bpf \
- archfile=$(srcdir)/../../cpu/bpf.cpu \
- FLAGS="with-scache" \
- SUFFIX="-le" \
- EXTRAFILES="$(CGEN_CPU_SEM)"
- $(SILENCE) touch $@
-$(srcdir)/sem-le.c $(srcdir)/decode-le.c $(srcdir)/decode-le.h: \
- $(CGEN_MAINT) stamp-decode-le
- @true
-
-
-stamp-decode-be: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) $(GEN_DECODE_SCM)
- $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
- isa=ebpfbe cpu=bpfbf mach=bpf \
- archfile=$(srcdir)/../../cpu/bpf.cpu \
- FLAGS="with-scache" \
- SUFFIX="-be" \
- EXTRAFILES="$(CGEN_CPU_SEM)"
- $(SILENCE) touch $@
-$(srcdir)/sem-be.c $(srcdir)/decode-be.c $(srcdir)/decode-be.h: \
- $(CGEN_MAINT) stamp-decode-be
- @true
-
-.PHONY = bpf-clean
-
-bpf-clean:
- rm -f stamp-arch stamp-cpu stamp-decode stamp-defs
diff --git a/sim/bpf/local.mk b/sim/bpf/local.mk
index 7382f6163bc2..fabf77ec67bd 100644
--- a/sim/bpf/local.mk
+++ b/sim/bpf/local.mk
@@ -55,3 +55,40 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu:
+ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
+ $(AM_V_at)rm -f $(srcdir)/%D%/model.c
+%D%/cpu.h %D%/cpu.c %D%/model.c: @CGEN_MAINT@ %D%/cgen-cpu
+
+## We need to generate a group of files per ISA.
+## For eBPF little-endian:
+## defs-le.h
+## sem-le.c, decode-le.c, decode-le.h
+## $(objdir)/mloop-le.c $(objdir)/eng-le.h
+## For eBPF big-endian:
+## defs-be.h
+## sem-be.c, decode-be.c, decode-be.h
+## $(objdir)/mloop-be.c $(objdir)/eng-le.h
+##
+## The rules below take care of that.
+
+%D%/cgen-defs-le:
+ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
+%D%/defs-le.h: @CGEN_MAINT@ %D%/cgen-defs-le
+
+%D%/cgen-defs-be:
+ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
+%D%/defs-be.h: @CGEN_MAINT@ %D%/cgen-defs-be
+
+%D%/cgen-decode-le:
+ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
+%D%/sem-le.c %D%/decode-le.c %D%/decode-le.h: @CGEN_MAINT@ %D%/cgen-decode-vle
+
+%D%/cgen-decode-be:
+ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
+%D%/sem-be.c %D%/decode-be.c %D%/decode-be.h: @CGEN_MAINT@ %D%/cgen-decode-be
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/9] sim: cris: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
2023-01-02 4:32 ` [PATCH 2/9] sim: bpf: hoist cgen rules to top-level Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 4/9] sim: frv: " Mike Frysinger
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 14 ++++++++++++++
sim/cris/Makefile.in | 33 ---------------------------------
sim/cris/local.mk | 14 ++++++++++++++
3 files changed, 28 insertions(+), 33 deletions(-)
diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index e9eaefb11bf6..0a045ca06778 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -33,37 +33,4 @@ SIM_OBJS = \
$(CRISV32F_OBJS) \
traps.o
-SIM_EXTRA_CLEAN = cris-clean
-
## COMMON_POST_CONFIG_FRAG
-
-cris-clean:
- -rm -f stamp-arch
- -rm -f tmp-*
-
-# Useful when making CGEN-generated files manually, without --enable-cgen-maint.
-stamps: stamp-arch stamp-v10fcpu stamp-v32fcpu
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
- archfile=$(CPU_DIR)/cris.cpu \
- FLAGS="with-scache with-profile=fn"
- $(SILENCE) touch $@
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-
-# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
-stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- archfile=$(CPU_DIR)/cris.cpu \
- cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
- $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
- $(SILENCE) touch $@
-cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
-
-stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- archfile=$(CPU_DIR)/cris.cpu \
- cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
- $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
- $(SILENCE) touch $@
-cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
diff --git a/sim/cris/local.mk b/sim/cris/local.mk
index 135d5ebaabba..b2f45855317e 100644
--- a/sim/cris/local.mk
+++ b/sim/cris/local.mk
@@ -70,3 +70,17 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode-v10f:
+ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/%D%/semv10-switch.c $(srcdir)/%D%/semcrisv10f-switch.c
+%D%/cpuv10.h %D%/cpuv10.c %D%/semcrisv10f-switch.c %D%/modelv10.c %D%/decodev10.c %D%/decodev10.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-v10f
+
+%D%/cgen-cpu-decode-v32f:
+ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/%D%/semv32-switch.c $(srcdir)/%D%/semcrisv32f-switch.c
+%D%/cpuv32.h %D%/cpuv32.c %D%/semcrisv32f-switch.c %D%/modelv32.c %D%/decodev32.c %D%/decodev32.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-v32f
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/9] sim: frv: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
2023-01-02 4:32 ` [PATCH 2/9] sim: bpf: hoist cgen rules to top-level Mike Frysinger
2023-01-02 4:32 ` [PATCH 3/9] sim: cris: " Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 5/9] sim: iq2000: " Mike Frysinger
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 8 ++++++++
sim/frv/Makefile.in | 24 ------------------------
sim/frv/local.mk | 8 ++++++++
3 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/sim/frv/Makefile.in b/sim/frv/Makefile.in
index 6aaf1064c122..a13765589da9 100644
--- a/sim/frv/Makefile.in
+++ b/sim/frv/Makefile.in
@@ -31,33 +31,9 @@ SIM_OBJS = \
SIM_EXTRA_CFLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
-SIM_EXTRA_CLEAN = frv-clean
-
# Some modules don't build cleanly yet.
memory.o sem.o: SIM_WERROR_CFLAGS =
## COMMON_POST_CONFIG_FRAG
arch = frv
-
-frv-clean:
- rm -f tmp-*
- rm -f stamp-arch stamp-cpu
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- archfile=$(srcdir)/../../cpu/frv.cpu \
- FLAGS="with-scache"
- $(SILENCE) touch $@
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-# @true
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
- archfile=$(srcdir)/../../cpu/frv.cpu \
- FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
- EXTRAFILES="$(CGEN_CPU_SEM)"
- $(SILENCE) touch $@
-cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
-# @true
diff --git a/sim/frv/local.mk b/sim/frv/local.mk
index 0dd1e3d4ee16..838d97cf5862 100644
--- a/sim/frv/local.mk
+++ b/sim/frv/local.mk
@@ -47,3 +47,11 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/sem.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 5/9] sim: iq2000: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
` (2 preceding siblings ...)
2023-01-02 4:32 ` [PATCH 4/9] sim: frv: " Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 6/9] sim: lm32: " Mike Frysinger
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 8 ++++++++
sim/iq2000/Makefile.in | 26 --------------------------
sim/iq2000/local.mk | 8 ++++++++
3 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in
index ca03dfa78255..c0fb6507ca69 100644
--- a/sim/iq2000/Makefile.in
+++ b/sim/iq2000/Makefile.in
@@ -26,32 +26,6 @@ SIM_OBJS = \
sim-if.o arch.o \
$(IQ2000_OBJS)
-SIM_EXTRA_CLEAN = iq2000-clean
-
## COMMON_POST_CONFIG_FRAG
arch = iq2000
-
-# IQ2000 objs
-
-iq2000-clean:
- rm -f tmp-*
- rm -f stamp-arch stamp-cpu
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/iq2000.cpu Makefile
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=iq2000 \
- archfile=$(CPU_DIR)/iq2000.cpu \
- FLAGS="with-scache with-profile=fn"
- $(SILENCE) touch $@
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
- @true
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/iq2000.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=iq2000bf mach=iq2000 \
- archfile=$(CPU_DIR)/iq2000.cpu \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
- @true
diff --git a/sim/iq2000/local.mk b/sim/iq2000/local.mk
index f2ebbb2a5ea2..ba1a2b8af3a2 100644
--- a/sim/iq2000/local.mk
+++ b/sim/iq2000/local.mk
@@ -44,3 +44,11 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 6/9] sim: lm32: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
` (3 preceding siblings ...)
2023-01-02 4:32 ` [PATCH 5/9] sim: iq2000: " Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 7/9] sim: m32r: " Mike Frysinger
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 8 ++++++++
sim/lm32/Makefile.in | 22 ----------------------
sim/lm32/local.mk | 8 ++++++++
3 files changed, 16 insertions(+), 22 deletions(-)
diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in
index ea6601fab067..a39420f59270 100644
--- a/sim/lm32/Makefile.in
+++ b/sim/lm32/Makefile.in
@@ -14,26 +14,4 @@ SIM_OBJS = \
cpu.o decode.o sem.o model.o mloop.o \
lm32.o traps.o user.o
-SIM_EXTRA_CLEAN = lm32-clean
-
## COMMON_POST_CONFIG_FRAG
-
-lm32-clean:
- rm -f stamp-arch stamp-cpu
- rm -f tmp-*
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/lm32.cpu
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- archfile=$(CPU_DIR)/lm32.cpu \
- FLAGS="with-scache with-profile=fn"
- $(SILENCE) touch $@
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.cpu
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=lm32bf mach=lm32 SUFFIX= \
- archfile=$(CPU_DIR)/lm32.cpu \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
diff --git a/sim/lm32/local.mk b/sim/lm32/local.mk
index 510d34b2b9b0..77f1c24d52ae 100644
--- a/sim/lm32/local.mk
+++ b/sim/lm32/local.mk
@@ -47,3 +47,11 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 7/9] sim: m32r: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
` (4 preceding siblings ...)
2023-01-02 4:32 ` [PATCH 6/9] sim: lm32: " Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 8/9] sim: or1k: " Mike Frysinger
2023-01-02 4:32 ` [PATCH 9/9] sim: cgen: drop common subdir build rules Mike Frysinger
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 16 +++++++++++++++
sim/m32r/Makefile.in | 48 --------------------------------------------
sim/m32r/local.mk | 16 +++++++++++++++
3 files changed, 32 insertions(+), 48 deletions(-)
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index e935df33017e..644d8de7dd1d 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -35,55 +35,7 @@ SIM_OBJS = \
$(M32R2_OBJS) \
traps.o
-SIM_EXTRA_CLEAN = m32r-clean
-
# Some modules don't build cleanly yet.
cpu.o cpu2.o cpux.o m32r.o m32r2.o m32rx.o mloop.o mloop2.o mloopx.o sem.o sim-if.o traps.o: SIM_WERROR_CFLAGS =
## COMMON_POST_CONFIG_FRAG
-
-m32r-clean:
- rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
- rm -f tmp-*
-
-# NOTE: Generated source files are specified as full paths,
-# e.g. $(srcdir)/arch.c, because make may decide the files live
-# in objdir otherwise.
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- archfile=$(CPU_DIR)/m32r.cpu \
- FLAGS="with-scache with-profile=fn"
- $(SILENCE) touch $@
-$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
- @true
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32rbf mach=m32r SUFFIX= \
- archfile=$(CPU_DIR)/m32r.cpu \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
- @true
-
-stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32rxf mach=m32rx SUFFIX=x \
- archfile=$(CPU_DIR)/m32r.cpu \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
- @true
-
-stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32r2f mach=m32r2 SUFFIX=2 \
- archfile=$(CPU_DIR)/m32r.cpu \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
- @true
diff --git a/sim/m32r/local.mk b/sim/m32r/local.mk
index 15585cd52539..62209b2c50fd 100644
--- a/sim/m32r/local.mk
+++ b/sim/m32r/local.mk
@@ -75,3 +75,19 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
+
+%D%/cgen-cpu-decode-x:
+ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpux.h %D%/semx-switch.c %D%/modelx.c %D%/decodex.c %D%/decodex.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-x
+
+%D%/cgen-cpu-decode-2:
+ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu2.h %D%/sem2-switch.c %D%/model2.c %D%/decode2.c %D%/decode2.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-2
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 8/9] sim: or1k: hoist cgen rules to top-level
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
` (5 preceding siblings ...)
2023-01-02 4:32 ` [PATCH 7/9] sim: m32r: " Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
2023-01-02 4:32 ` [PATCH 9/9] sim: cgen: drop common subdir build rules Mike Frysinger
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 8 ++++++++
sim/or1k/Makefile.in | 34 ----------------------------------
sim/or1k/local.mk | 8 ++++++++
3 files changed, 16 insertions(+), 34 deletions(-)
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in
index 6b2a976d8aef..ca5bf1ae4eee 100644
--- a/sim/or1k/Makefile.in
+++ b/sim/or1k/Makefile.in
@@ -45,37 +45,3 @@ SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
## COMMON_POST_CONFIG_FRAG
arch = or1k
-
-stamps: stamp-arch stamp-cpu
-
-# NOTE: Generated source files are specified as full paths,
-# e.g. $(srcdir)/arch.c, because make may decide the files live
-# in objdir otherwise.
-
-OR1K_CGEN_DEPS = \
- $(CPU_DIR)/or1k.cpu \
- $(CPU_DIR)/or1k.opc \
- $(CPU_DIR)/or1kcommon.cpu \
- $(CPU_DIR)/or1korbis.cpu \
- $(CPU_DIR)/or1korfpx.cpu \
- Makefile
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
- mach=or32,or32nd \
- archfile=$(CPU_DIR)/or1k.cpu \
- FLAGS="with-scache"
- $(SILENCE) touch $@
-$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
- @true
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=or1k32bf \
- mach=or32,or32nd \
- archfile=$(CPU_DIR)/or1k.cpu \
- FLAGS="with-scache" \
- EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
- @true
diff --git a/sim/or1k/local.mk b/sim/or1k/local.mk
index b332bfab59d6..1b5c44fa5edc 100644
--- a/sim/or1k/local.mk
+++ b/sim/or1k/local.mk
@@ -46,3 +46,11 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/cpu.c %D%/model.c %D%/sem.c %D%/sem-switch.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 9/9] sim: cgen: drop common subdir build rules
2023-01-02 4:32 [PATCH 1/9] sim: cgen: hoist rules to the top-level build Mike Frysinger
` (6 preceding siblings ...)
2023-01-02 4:32 ` [PATCH 8/9] sim: or1k: " Mike Frysinger
@ 2023-01-02 4:32 ` Mike Frysinger
7 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2023-01-02 4:32 UTC (permalink / raw)
To: gdb-patches
Now that everything has been hoisted to the top-level, we can delete
this unused logic.
---
sim/arch-subdir.mk.in | 6 ----
sim/common/Make-common.in | 68 ---------------------------------------
2 files changed, 74 deletions(-)
diff --git a/sim/arch-subdir.mk.in b/sim/arch-subdir.mk.in
index 0626d12df108..85e1d84ede1d 100644
--- a/sim/arch-subdir.mk.in
+++ b/sim/arch-subdir.mk.in
@@ -62,12 +62,6 @@ MAINT = ; @true
# The following line is commented depending upon --enable-maintainer-mode.
@MAINTAINER_MODE_TRUE@MAINT =
-# cgen support, enable with --enable-cgen-maint
-CGEN_MAINT = ; @true
-# The following line is commented in or out depending upon --enable-cgen-maint.
-@CGEN_MAINT@CGEN_MAINT =
-CGENDIR = @cgendir@
-
SIM_INLINE = @SIM_INLINE@
SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index ab9b3a3985ff..35477d94bb8e 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -283,72 +283,4 @@ Makefile: Makefile.in $(srccom)/Make-common.in $(config.status)
@SIM_COMMON_BUILD_FALSE@config.status: configure
@SIM_COMMON_BUILD_FALSE@ $(ECHO_GEN) $(SHELL) ./config.status --recheck
-
-# CGEN support
-
-GUILE = `if [ -f ../../guile/libguile/guile ]; then echo ../../guile/libguile/guile; else echo guile ; fi`
-CGEN = "$(GUILE) -l $(CGENDIR)/guile.scm -s"
-CGENFLAGS = -v
-CGEN_CPU_DIR = $(CGENDIR)/cpu
-
-# Most ports use the files here instead of cgen/cpu.
-CPU_DIR = $(srcroot)/cpu
-
-CGEN_READ_SCM = $(CGENDIR)/sim.scm
-CGEN_ARCH_SCM = $(CGENDIR)/sim-arch.scm
-CGEN_CPU_SCM = $(CGENDIR)/sim-cpu.scm $(CGENDIR)/sim-model.scm
-CGEN_DECODE_SCM = $(CGENDIR)/sim-decode.scm
-CGEN_DESC_SCM = $(CGENDIR)/desc.scm $(CGENDIR)/desc-cpu.scm
-
-# Various choices for which cpu specific files to generate.
-# These are passed to cgen.sh in the "extrafiles" argument.
-CGEN_CPU_EXTR = /extr/
-CGEN_CPU_READ = /read/
-CGEN_CPU_WRITE = /write/
-CGEN_CPU_SEM = /sem/
-CGEN_CPU_SEMSW = /semsw/
-
-CGEN_FLAGS_TO_PASS = \
- CGEN='$(CGEN)' \
- CGENFLAGS="$(CGENFLAGS)"
-
-# We store the generated files in the source directory until we decide to
-# ship a Scheme interpreter with gdb/binutils. Maybe we never will.
-
-cgen-arch: force
- $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" ignored "$(isa)" $(mach) ignored \
- $(archfile) ignored
-
-cgen-cpu: force
- $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
- $(archfile) "$(EXTRAFILES)"
-
-cgen-defs: force
- $(SHELL) $(srccom)/cgen.sh defs $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
- $(archfile) ignored
-
-cgen-decode: force
- $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
- $(archfile) "$(EXTRAFILES)"
-
-cgen-cpu-decode: force
- $(SHELL) $(srccom)/cgen.sh cpu-decode $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
- $(archfile) "$(EXTRAFILES)"
-
-cgen-desc: force
- $(SHELL) $(srccom)/cgen.sh desc $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
- $(archfile) ignored $(opcfile)
-
## End COMMON_POST_CONFIG_FRAG
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2023-01-02 4:32 UTC | newest]
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2023-01-02 4:32 ` [PATCH 6/9] sim: lm32: " Mike Frysinger
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