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* [PATCH 1/2] sim: ppc: implement 128-bit register read/writes with sim-endian APIs
@ 2024-01-11  5:51 Mike Frysinger
  2024-01-11  5:51 ` [PATCH 2/2] sim: endian: leverage __int128 when available Mike Frysinger
  0 siblings, 1 reply; 2+ messages in thread
From: Mike Frysinger @ 2024-01-11  5:51 UTC (permalink / raw)
  To: gdb-patches

We have APIs in sim-endian for working with 128-bit values like this code
is already doing for 8/16/32/64-bit values.  Switch over to that to make
it a bit simpler, and drop the WITH_ALTIVEC check.  The code probably is
only used when altivec is enabled, but it doesn't add much to always
compile it in, and avoids #ifdef rot by not actually compiling it.
---
 sim/ppc/psim.c | 34 ++++++++--------------------------
 1 file changed, 8 insertions(+), 26 deletions(-)

diff --git a/sim/ppc/psim.c b/sim/ppc/psim.c
index 2c900e64100a..88c485d695b2 100644
--- a/sim/ppc/psim.c
+++ b/sim/ppc/psim.c
@@ -796,6 +796,7 @@ psim_read_register(psim *system,
     unsigned_2 unsigned_2;
     unsigned_4 unsigned_4;
     unsigned_8 unsigned_8;
+    unsigned_16 unsigned_16;
     creg creg;
     fpreg fpreg;
     fpscreg fpscreg;
@@ -922,21 +923,12 @@ psim_read_register(psim *system,
     case 8:
       *(unsigned_8*)buf = H2T_8(cooked_buf.unsigned_8);
       break;
-#ifdef WITH_ALTIVEC
     case 16:
-      if (HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
-        {
-	  union { vreg v; unsigned_8 d[2]; } h, t;
-          memcpy(&h.v/*dest*/, cooked_buf.bytes/*src*/, description.size);
-	  { _SWAP_8(t.d[0] =, h.d[1]); }
-	  { _SWAP_8(t.d[1] =, h.d[0]); }
-          memcpy(buf/*dest*/, &t/*src*/, description.size);
-          break;
-        }
-      else
-        memcpy(buf/*dest*/, cooked_buf.bytes/*src*/, description.size);
+      {
+	unsigned_16 v = H2T_16(cooked_buf.unsigned_16);
+	memcpy(buf/*dest*/, &v, description.size);
+      }
       break;
-#endif
     }
   }
   else {
@@ -965,6 +957,7 @@ psim_write_register(psim *system,
     unsigned_2 unsigned_2;
     unsigned_4 unsigned_4;
     unsigned_8 unsigned_8;
+    unsigned_16 unsigned_16;
     creg creg;
     fpreg fpreg;
     fpscreg fpscreg;
@@ -1014,20 +1007,9 @@ psim_write_register(psim *system,
     case 8:
       cooked_buf.unsigned_8 = T2H_8(*(unsigned_8*)buf);
       break;
-#ifdef WITH_ALTIVEC
     case 16:
-      if (HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
-        {
-	  union { vreg v; unsigned_8 d[2]; } h, t;
-          memcpy(&t.v/*dest*/, buf/*src*/, description.size);
-	  { _SWAP_8(h.d[0] =, t.d[1]); }
-	  { _SWAP_8(h.d[1] =, t.d[0]); }
-          memcpy(cooked_buf.bytes/*dest*/, &h/*src*/, description.size);
-          break;
-        }
-      else
-        memcpy(cooked_buf.bytes/*dest*/, buf/*src*/, description.size);
-#endif
+      cooked_buf.unsigned_16 = T2H_16(*(unsigned_16*)buf);
+      break;
     }
   }
   else {
-- 
2.43.0


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2024-01-11  5:51 [PATCH 1/2] sim: ppc: implement 128-bit register read/writes with sim-endian APIs Mike Frysinger
2024-01-11  5:51 ` [PATCH 2/2] sim: endian: leverage __int128 when available Mike Frysinger

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