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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
	Andrew Burgess <aburgess@redhat.com>,
	Mike Frysinger <vapier@gentoo.org>,
	Nick Clifton <nickc@redhat.com>
Cc: gdb-patches@sourceware.org
Subject: [PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU
Date: Thu, 20 Oct 2022 09:32:09 +0000	[thread overview]
Message-ID: <65223c79fdfd7faf132275415cd9da9852c5bec3.1666258361.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1666258361.git.research_trasio@irq.a4lg.com>

GCC / Clang generate a warning if a variable may be used uninitialized on
some cases (Clang: "-Wsometimes-uninitialized").  When the program is being
built by Clang with the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

Those error occur on sim/cris/semcrisv{10,32}f-switch.c but they are
CGEN-generated files.  The real cause of this problem is in cpu/cris.cpu
which does not initialize certain variables.

This commit ensures such variables are initialized to zero by default.
Note that this commit itself does not regenerate CRIS CPU related files
with CGEN because it still has several issues preventing regeneration.
They are to be fixed in the later commits.

cpu/ChangeLog:

	* cris.cpu: Initialize condres, newval and tmpres variables.
---
 cpu/cris.cpu | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index 97b44581e78..cd85f4e94e2 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -541,6 +541,7 @@
   (sequence
     BI
     ((SI tmpcond) (BI condres))
+    (set condres 0)
     (set tmpcond condno)
      (.splice
       cond
@@ -2655,6 +2656,7 @@
      (sequence
        ((SI rno) (SI newval))
        (set rno (regno Pd))
+       (set newval 0)
        (.splice
 	cond
 	; No sanity check for constant special register here, since the
@@ -3698,6 +3700,7 @@
   (sequence
     SI
     ((SI tmpcode) (SI tmpval) (SI tmpres))
+    (set tmpres 0)
     (set tmpcode swapcode)
     (set tmpval val)
     (.splice
-- 
2.34.1


  parent reply	other threads:[~2022-10-20  9:33 UTC|newest]

Thread overview: 93+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-20  9:32 [PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) Tsukasa OI
2022-10-20  9:32 ` [PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib Tsukasa OI
2022-11-14 14:01   ` Simon Marchi
2022-10-20  9:32 ` [PATCH 02/40] sim: Check known getrusage declaration existence Tsukasa OI
2022-10-23 13:59   ` Mike Frysinger
2022-10-24 10:47     ` Tsukasa OI
2022-10-24 16:03       ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 03/40] sim/aarch64: Remove unused functions Tsukasa OI
2022-10-23 14:02   ` Mike Frysinger
2022-10-24 10:55     ` Tsukasa OI
2022-10-20  9:32 ` Tsukasa OI [this message]
2022-10-20  9:32 ` [PATCH 05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 Tsukasa OI
2022-10-20  9:32 ` [PATCH 06/40] sim/cris: Move declarations of f_specific_init Tsukasa OI
2022-10-23 14:26   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 07/40] sim/cris: Regenerate with CGEN Tsukasa OI
2022-10-23 14:27   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 08/40] sim/erc32: Insert void parameter Tsukasa OI
2022-10-23 14:04   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 09/40] sim/erc32: Use int32_t as event callback argument Tsukasa OI
2022-10-23 14:32   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 10/40] sim/erc32: Use int32_t as IRQ " Tsukasa OI
2022-10-23 14:33   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 11/40] cpu/frv: Initialize some variables Tsukasa OI
2022-10-20  9:32 ` [PATCH 12/40] sim/frv: Initialize nesr variable Tsukasa OI
2022-10-23 14:39   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 13/40] sim/frv: Initialize some variables Tsukasa OI
2022-10-23 14:34   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 14/40] sim/frv: Add explicit casts Tsukasa OI
2022-10-23 14:40   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments Tsukasa OI
2022-10-23 14:05   ` Mike Frysinger
2022-10-24 10:55     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 16/40] sim/lm32: fix some missing function declaration warnings Tsukasa OI
2022-10-23 14:41   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 17/40] sim/lm32: Add explicit casts Tsukasa OI
2022-10-23 14:42   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 18/40] sim/m32c: Stop using middle dot Tsukasa OI
2022-10-23 14:48   ` Mike Frysinger
2022-10-27  2:08     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 19/40] sim/m32r: Initialize "list" variable Tsukasa OI
2022-10-23 14:50   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 20/40] sim/m32r: Prepare required functions Tsukasa OI
2022-10-23 14:53   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 21/40] sim/m32r: Declare all " Tsukasa OI
2022-10-23 14:54   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 22/40] sim/m32r: Fixes to Linux emulator Tsukasa OI
2022-10-23 14:56   ` Mike Frysinger
2022-10-27  2:40     ` Tsukasa OI
2022-10-27 16:05       ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 23/40] sim/m32r: Add explicit casts Tsukasa OI
2022-10-23 14:57   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 24/40] sim/mips: Fix enum type-related issues on cp1.c Tsukasa OI
2022-10-23 15:00   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 25/40] sim/mn10300: Add an explicit cast Tsukasa OI
2022-10-23 15:03   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 26/40] sim/ppc: Remove getrusage declarations if possible Tsukasa OI
2022-10-23 15:04   ` Mike Frysinger
2022-10-27  2:00     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 27/40] sim/ppc: Add extra parenthesis to avoid ambiguity Tsukasa OI
2022-10-23 15:05   ` Mike Frysinger
2022-10-24 10:59     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 28/40] sim/ppc: Initialize stat type buffer Tsukasa OI
2022-10-23 15:06   ` Mike Frysinger
2022-10-24 11:00     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 29/40] sim/ppc: Fix indentation on generated code Tsukasa OI
2022-10-23 15:07   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 30/40] sim/ppc: Use TRACE with initialized entry_point Tsukasa OI
2022-10-23 15:08   ` Mike Frysinger
2022-10-24 11:02     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 31/40] sim/ppc: Initialize help variables Tsukasa OI
2022-10-23 15:08   ` Mike Frysinger
2022-10-24 16:33   ` Andrew Burgess
2022-10-20  9:32 ` [PATCH 32/40] sim/ppc: Add an explicit cast Tsukasa OI
2022-10-23 15:10   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 33/40] sim/ppc: Initialize reg and control_nr Tsukasa OI
2022-10-23 15:14   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 34/40] sim/rx: Mark unused function Tsukasa OI
2022-10-23 15:14   ` Mike Frysinger
2022-10-24 16:30   ` Andrew Burgess
2022-10-29 11:58     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 35/40] sim/sh: Initialize some variables Tsukasa OI
2022-10-23 15:19   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 36/40] sim/sh: Use fabs instead of abs Tsukasa OI
2022-10-23 14:17   ` Mike Frysinger
2022-10-24 10:56     ` Tsukasa OI
2022-10-20  9:32 ` [PATCH 37/40] sim/sh: Remove redundant function declaration Tsukasa OI
2022-10-23 14:19   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 38/40] sim/bpf: Add explicit casts Tsukasa OI
2022-10-23 15:15   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 39/40] sim/iq2000: " Tsukasa OI
2022-10-23 15:16   ` Mike Frysinger
2022-10-20  9:32 ` [PATCH 40/40] sim/or1k: " Tsukasa OI
2022-10-23 15:16   ` Mike Frysinger

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