Re: [PATCH 00/11] sim: riscv: simulation of single and double precision floating point instructions

[Andrew Burgess <aburgess@redhat.com>]

<bhushan.attarde@imgtec.com> writes:

> From: Bhushan Attarde <bhushan.attarde@imgtec.com>
>
> Hi All,
>
> This patch series (total 11 patches) adds simulation of riscv single
> and double

I think something went wrong with the threading when you sent these
emails, patches 1->3 are threaded together, then the other emails are
split into two separate thread blocks:

  https://inbox.sourceware.org/gdb-patches/20240226142234.1628932-1-bhushan.attarde@imgtec.com/
  https://inbox.sourceware.org/gdb-patches/20240226142628.1629048-1-bhushan.attarde@imgtec.com/
  https://inbox.sourceware.org/gdb-patches/20240226142845.1629113-1-bhushan.attarde@imgtec.com/

Could you repost them please with the threading fixed, this makes it far
easier to apply the complete series, plus keeps all the reviews within a
single thread.

Thanks,
Andrew


> precision floating point instructions. This includes load-store, move, compare,
> classify, sign injection, min, max, MAC, conversion and basic arithmetic
> instructions. Each patch also includes tests for the corresponding instructions.
>
> The tool-chain sources used are from:
> https://github.com/riscv-collab/riscv-gnu-toolchain.git
>
> And gdb sources are replaced with latest upstream sources from:
> https://sourceware.org/git/binutils-gdb.git
>
> GDB is configured with --target=riscv64-unknown-elf option.
>
> Contributions from:
>   Bhushan Attarde (Bhushan.Attarde@imgtec.com)
>   Jaydeep Patil (Jaydeep.Patil@imgtec.com)
>
> Bhushan Attarde (11):
>   sim: riscv: Add single precision floating-point load-store, move,
>     compare and classify instructions
>   sim: riscv: Add single precision floating-point sign injection, min
>     and max instructions
>   sim: riscv: Add floating-point CSR instructions
>   sim: riscv: Add single precision floating-point MAC instructions
>   sim: riscv: Add single precision floating-point basic arithmetic
>     instructions
>   sim: riscv: Add single-precision floating-point conversion
>     instructions
>   sim: riscv: Add double precision floating-point load-store, move,
>     compare and classify instructions
>   sim: riscv: Add double precision floating-point sign-injection, min
>     and max instructions
>   sim: riscv: Add double precision floating-point MAC instructions
>   sim: riscv: Add double precision floating-point basic arithmetic
>     instructions
>   sim: riscv: Add double precision floating-point conversion
>     instructions
>
>  sim/riscv/model_list.def               |    4 +
>  sim/riscv/sim-main.c                   | 1544 ++++++++++++++++++++++++
>  sim/testsuite/riscv/d-basic-arith.s    |  128 ++
>  sim/testsuite/riscv/d-conversion.s     |  111 ++
>  sim/testsuite/riscv/d-fp-compare.s     |   94 ++
>  sim/testsuite/riscv/d-fp-load-store.s  |   58 +
>  sim/testsuite/riscv/d-fp-sign-inject.s |   87 ++
>  sim/testsuite/riscv/f-csr.s            |   56 +
>  sim/testsuite/riscv/s-basic-arith.s    |  131 ++
>  sim/testsuite/riscv/s-conversion-l.s   |   60 +
>  sim/testsuite/riscv/s-conversion.s     |   61 +
>  sim/testsuite/riscv/s-fp-compare.s     |   97 ++
>  sim/testsuite/riscv/s-fp-load-store.s  |   62 +
>  sim/testsuite/riscv/s-fp-sign-inject.s |   90 ++
>  14 files changed, 2583 insertions(+)
>  create mode 100644 sim/testsuite/riscv/d-basic-arith.s
>  create mode 100755 sim/testsuite/riscv/d-conversion.s
>  create mode 100755 sim/testsuite/riscv/d-fp-compare.s
>  create mode 100755 sim/testsuite/riscv/d-fp-load-store.s
>  create mode 100644 sim/testsuite/riscv/d-fp-sign-inject.s
>  create mode 100644 sim/testsuite/riscv/f-csr.s
>  create mode 100644 sim/testsuite/riscv/s-basic-arith.s
>  create mode 100644 sim/testsuite/riscv/s-conversion-l.s
>  create mode 100644 sim/testsuite/riscv/s-conversion.s
>  create mode 100644 sim/testsuite/riscv/s-fp-compare.s
>  create mode 100644 sim/testsuite/riscv/s-fp-load-store.s
>  create mode 100644 sim/testsuite/riscv/s-fp-sign-inject.s
>
> -- 
> 2.25.1