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From: Bernd Edlinger <bernd.edlinger@hotmail.de>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: [PATCH] sim: riscv: Fix newlib issue with brk syscall
Date: Wed, 10 Apr 2024 09:17:08 +0200	[thread overview]
Message-ID: <AS8P193MB12855E12BC95017B57DEA868E4062@AS8P193MB1285.EURP193.PROD.OUTLOOK.COM> (raw)

There is an issue with riscv newlib which uses
a brk syscall when malloc is used, and when
this syscall is not implemented, the malloc fails.
This adds a simple handling for this syscall
in order to make newlib happy.
---
 sim/riscv/sim-main.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 9c0d070aa60..4e3672505c6 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -30,6 +30,7 @@
 #include "sim-main.h"
 #include "sim-signal.h"
 #include "sim-syscall.h"
+#include "target-newlib-syscall.h"
 
 #include "opcode/riscv.h"
 
@@ -629,6 +630,14 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
       break;
     case MATCH_ECALL:
       TRACE_INSN (cpu, "ecall;");
+      if (riscv_cpu->a7 == TARGET_NEWLIB_RISCV_SYS_brk)
+	{
+	  TRACE_SYSCALL (cpu, "brk[%i](%#lx)", TARGET_NEWLIB_RISCV_SYS_brk,
+			 (long)riscv_cpu->a0);
+	  if (riscv_cpu->a0 == 0)
+	    riscv_cpu->a0 = DEFAULT_MEM_SIZE / 2;
+	  break;
+	}
       riscv_cpu->a0 = sim_syscall (cpu, riscv_cpu->a7, riscv_cpu->a0,
 				   riscv_cpu->a1, riscv_cpu->a2, riscv_cpu->a3);
       break;
-- 
2.25.1


             reply	other threads:[~2024-04-10  7:15 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-10  7:17 Bernd Edlinger [this message]
2024-04-12 10:55 ` Andrew Burgess
2024-04-12 11:41   ` Bernd Edlinger

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