From: Torbjorn SVENSSON <torbjorn.svensson@st.com>
To: Christophe Lyon <christophe.lyon@arm.com>,
Yvan ROUX - foss <yvan.roux@foss.st.com>,
"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: RE: [PATCH 2/3] gdb/arm: Fetch initial sp value prior to compare
Date: Tue, 17 May 2022 09:54:38 +0000 [thread overview]
Message-ID: <VI1PR10MB2208EB29BC933EFE1714764C81CE9@VI1PR10MB2208.EURPRD10.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <bc1bbeae-f4a1-bc36-39d1-c3ba22bd894f@arm.com>
Hello,
ST Restricted
> -----Original Message-----
> From: Christophe Lyon <christophe.lyon@arm.com>
> Sent: den 16 maj 2022 16:56
> To: Yvan ROUX - foss <yvan.roux@foss.st.com>; gdb-
> patches@sourceware.org
> Cc: Torbjorn SVENSSON <torbjorn.svensson@st.com>
> Subject: Re: [PATCH 2/3] gdb/arm: Fetch initial sp value prior to compare
>
> Hi,
>
> On 5/16/22 15:59, Yvan Roux via Gdb-patches wrote:
> > For Arm Cortex-M33 with security extensions, there are 4 different
> > stacks pointers (msp_s, msp_ns, psp_s, psp_ns). In order to
> > identify the active one, compare the values of the different
> > stacks. The value of the initla sp register needs to be fetched to
>
> Typo: "initial"
>
> > perform this comparison.
> >
> > Signed-off-by: Torbj�rn SVENSSON <torbjorn.svensson@st.com>
> > Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>
> > ---
> > gdb/arm-tdep.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> > index c37254c2ce1..4aa277f5bc8 100644
> > --- a/gdb/arm-tdep.c
> > +++ b/gdb/arm-tdep.c
> > @@ -341,6 +341,7 @@ arm_cache_init (struct arm_prologue_cache
> *cache, struct frame_info *frame)
> > arm_gdbarch_tdep *tdep = (arm_gdbarch_tdep *) gdbarch_tdep
> (gdbarch);
> >
> > arm_cache_init (cache, gdbarch);
> > + cache->sp = get_frame_register_unsigned (frame, ARM_SP_REGNUM);
>
> With such simple fixes, I always wonder "how did that somehow worked so
> far?". Can you describe the broken scenario fixed by this patch?
When I attempted to debug the issues in https://sourceware.org/bugzilla/show_bug.cgi?id=29121, I discovered that the arm_prologue_cache->active_sp_regnum was set to the regnum of psp_ns although psp was not used in the application. After digging a bit further, I noticed that the psp_ns and psp_s registers were both 0x0 and that arm_prologue_cache->sp was also 0x0 even though the sp register was something else.
Kind regards,
Torbjörn
next prev parent reply other threads:[~2022-05-17 9:54 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-16 13:54 [PATCH 0/3] gdb/arm: Cortex-M33 trustzone stack unwinding fixes Yvan Roux
2022-05-16 13:58 ` [PATCH 1/3] gdb/arm: Set the correct address to the FPU register on Yvan Roux
2022-05-16 14:46 ` Christophe Lyon
2022-05-17 9:49 ` Torbjorn SVENSSON
2022-05-17 15:44 ` Luis Machado
2022-05-18 19:24 ` Torbjorn SVENSSON
2022-05-19 8:17 ` Luis Machado
2022-05-19 13:24 ` Torbjorn SVENSSON
2022-06-02 9:20 ` Yvan Roux
2022-05-16 13:59 ` [PATCH 2/3] gdb/arm: Fetch initial sp value prior to compare Yvan Roux
2022-05-16 14:56 ` Christophe Lyon
2022-05-17 9:54 ` Torbjorn SVENSSON [this message]
2022-05-16 14:00 ` [PATCH 3/3] gdb/arm: Track msp and psp Yvan Roux
2022-05-16 14:25 ` Lancelot SIX
2022-05-17 15:52 ` Luis Machado
2022-05-18 19:18 ` Torbjorn SVENSSON
2022-05-19 8:07 ` Luis Machado
2022-05-19 13:16 ` Torbjorn SVENSSON
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