Re: [PATCH 3/3] gdb/arm: Track msp and psp

[Lancelot SIX <lsix@lancelotsix.com>]

Hi,

I have no knowledge about Arm Cortex-M33 so I cannot comment on the
actual changes.  I however have a purely code-style related remark down
below.

On Mon, May 16, 2022 at 04:00:22PM +0200, Yvan Roux via Gdb-patches wrote:
> For Arm Cortex-M33 with security extensions, there are 4 different
> stacks pointers (msp_s, msp_ns, psp_s, psp_ns).  To be compatible
> with earlier Cortex-M derivates, the msp and psp register are
> aliases for one of the 4 real stack pointer registers.
> 
> These are the combinations that exist:
> sp -> msp -> msp_s
> sp -> msp -> msp_ns
> sp -> psp -> psp_s
> sp -> psp -> psp_ns
> 
> This means that when the GDB client is to show the value of "msp",
> the value should always be equal to either "msp_s" or "msp_ns".
> Same goes for "psp".
> 
> Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com>
> Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>
> ---
>  gdb/arm-tdep.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index 4aa277f5bc8..b9c35bcdae6 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -288,6 +288,8 @@ struct arm_prologue_cache
>  
>    /* Active stack pointer.  */
>    int active_sp_regnum;
> +  int active_msp_regnum;
> +  int active_psp_regnum;
>  
>    /* The frame base for this frame is just prev_sp - frame size.
>       FRAMESIZE is the distance from the frame pointer to the
> @@ -345,11 +347,23 @@ arm_cache_init (struct arm_prologue_cache *cache, struct frame_info *frame)
>  
>    if (tdep->have_sec_ext)
>      {
> +      CORE_ADDR msp_val = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum);
> +      CORE_ADDR psp_val = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum);
> +
>        arm_cache_init_sp (tdep->m_profile_msp_s_regnum, &cache->msp_s, cache, frame);
>        arm_cache_init_sp (tdep->m_profile_psp_s_regnum, &cache->psp_s, cache, frame);
>        arm_cache_init_sp (tdep->m_profile_msp_ns_regnum, &cache->msp_ns, cache, frame);
>        arm_cache_init_sp (tdep->m_profile_psp_ns_regnum, &cache->psp_ns, cache, frame);
>  
> +      if (msp_val == cache->msp_s)
> +        cache->active_msp_regnum = tdep->m_profile_msp_s_regnum;
> +      else if (msp_val == cache->msp_ns)
> +        cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum;
> +      if (psp_val == cache->psp_s)
> +        cache->active_psp_regnum = tdep->m_profile_psp_s_regnum;
> +      else if (psp_val == cache->psp_ns)
> +        cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum;
> +

In the above section, you use 8 spaces for indentation instead on a tab
char (in the 4 lines starting with "cache->").

Best,
Lancelot.

>        /* Use MSP_S as default stack pointer.  */
>        if (cache->active_sp_regnum == ARM_SP_REGNUM)
>  	  cache->active_sp_regnum = tdep->m_profile_msp_s_regnum;
> @@ -384,6 +398,10 @@ arm_cache_get_sp_register (struct arm_prologue_cache *cache,
>  	return cache->psp_s;
>        if (regnum == tdep->m_profile_psp_ns_regnum)
>  	return cache->psp_ns;
> +      if (regnum == tdep->m_profile_msp_regnum)
> +	return arm_cache_get_sp_register (cache, tdep, cache->active_msp_regnum);
> +      if (regnum == tdep->m_profile_psp_regnum)
> +	return arm_cache_get_sp_register (cache, tdep, cache->active_psp_regnum);
>      }
>    else if (tdep->is_m)
>      {
> -- 
> 2.17.1
>