* [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style)
@ 2021-06-27 3:30 Mike Frysinger
2021-06-27 3:30 ` [PATCH 02/13] sim: bpf: add explicit casts when using explicit formats Mike Frysinger
` (11 more replies)
0 siblings, 12 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
---
sim/bpf/bpf-helpers.c | 3 ++-
sim/bpf/mloop.in | 7 +++++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/sim/bpf/bpf-helpers.c b/sim/bpf/bpf-helpers.c
index c308812ab1cc..79a3a7d3702a 100644
--- a/sim/bpf/bpf-helpers.c
+++ b/sim/bpf/bpf-helpers.c
@@ -72,6 +72,7 @@ bpf_trace_printk (SIM_CPU *current_cpu)
supported, which are read from %r3, %r4 and %r5 respectively. */
for (i = 0, tags_processed = 0; i < size;)
{
+ UDI value;
QI c = GETMEMUQI (current_cpu, CPU_PC_GET (current_cpu),
fmt_address + i);
@@ -88,7 +89,7 @@ bpf_trace_printk (SIM_CPU *current_cpu)
if (i++ >= size)
return -1; /* XXX look for kernel error code. */
- UDI value = GET_H_GPR (3 + tags_processed);
+ value = GET_H_GPR (3 + tags_processed);
switch ((GETMEMUQI (current_cpu, CPU_PC_GET (current_cpu),
fmt_address + i)))
diff --git a/sim/bpf/mloop.in b/sim/bpf/mloop.in
index 91f0c445eed0..75a869b33997 100644
--- a/sim/bpf/mloop.in
+++ b/sim/bpf/mloop.in
@@ -123,14 +123,17 @@ cat <<EOF
if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
+ UHI off16;
+ USI imm32;
+
/* eBPF instructions are little-endian, but GETIMEMUDI reads according
to target byte order. Swap to little-endian. */
insn = SWAP_8 (insn);
/* But, the imm32 and offset16 fields within instructions follow target
byte order. Swap those fields back. */
- UHI off16 = (UHI) ((insn & 0x00000000ffff0000) >> 16);
- USI imm32 = (USI) ((insn & 0xffffffff00000000) >> 32);
+ off16 = (UHI) ((insn & 0x00000000ffff0000) >> 16);
+ imm32 = (USI) ((insn & 0xffffffff00000000) >> 32);
off16 = SWAP_2 (off16);
imm32 = SWAP_4 (imm32);
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 02/13] sim: bpf: add explicit casts when using explicit formats
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 03/13] sim: cgen: sync prototypes with implementation Mike Frysinger
` (10 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
Since the value variable usually has an incompatible type for the wide
variety of types it is printed as, add explicit casts to them all.
---
sim/bpf/bpf-helpers.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/sim/bpf/bpf-helpers.c b/sim/bpf/bpf-helpers.c
index 79a3a7d3702a..d72c22a09bee 100644
--- a/sim/bpf/bpf-helpers.c
+++ b/sim/bpf/bpf-helpers.c
@@ -95,16 +95,16 @@ bpf_trace_printk (SIM_CPU *current_cpu)
fmt_address + i)))
{
case 'd':
- trace_printf (sd, current_cpu, "%d", value);
+ trace_printf (sd, current_cpu, "%d", (int) value);
break;
case 'i':
- trace_printf (sd, current_cpu, "%i", value);
+ trace_printf (sd, current_cpu, "%i", (int) value);
break;
case 'u':
- trace_printf (sd, current_cpu, "%u", value);
+ trace_printf (sd, current_cpu, "%u", (unsigned int) value);
break;
case 'x':
- trace_printf (sd, current_cpu, "%x", value);
+ trace_printf (sd, current_cpu, "%x", (unsigned int) value);
break;
case 'l':
{
@@ -114,16 +114,16 @@ bpf_trace_printk (SIM_CPU *current_cpu)
fmt_address + i))
{
case 'd':
- trace_printf (sd, current_cpu, "%ld", value);
+ trace_printf (sd, current_cpu, "%ld", (long) value);
break;
case 'i':
- trace_printf (sd, current_cpu, "%li", value);
+ trace_printf (sd, current_cpu, "%li", (long) value);
break;
case 'u':
- trace_printf (sd, current_cpu, "%lu", value);
+ trace_printf (sd, current_cpu, "%lu", (unsigned long) value);
break;
case 'x':
- trace_printf (sd, current_cpu, "%lx", value);
+ trace_printf (sd, current_cpu, "%lx", (unsigned long) value);
break;
case 'l':
{
@@ -132,16 +132,16 @@ bpf_trace_printk (SIM_CPU *current_cpu)
switch (GETMEMUQI (current_cpu, CPU_PC_GET (current_cpu),
fmt_address + i)) {
case 'd':
- trace_printf (sd, current_cpu, "%lld", value);
+ trace_printf (sd, current_cpu, "%lld", (long long) value);
break;
case 'i':
- trace_printf (sd, current_cpu, "%lli", value);
+ trace_printf (sd, current_cpu, "%lli", (long long) value);
break;
case 'u':
- trace_printf (sd, current_cpu, "%llu", value);
+ trace_printf (sd, current_cpu, "%llu", (unsigned long long) value);
break;
case 'x':
- trace_printf (sd, current_cpu, "%llx", value);
+ trace_printf (sd, current_cpu, "%llx", (unsigned long long) value);
break;
default:
assert (0);
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 03/13] sim: cgen: sync prototypes with implementation
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
2021-06-27 3:30 ` [PATCH 02/13] sim: bpf: add explicit casts when using explicit formats Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 04/13] sim: cgen: always leverage the ops prototypes Mike Frysinger
` (9 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
These prototype blocks are not normally used, so they've fallen out
of sync with the actual function definitions. Resync them all.
---
sim/common/cgen-ops.h | 35 ++++++++++++++++++-----------------
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h
index 86a483528a33..ddd3855924bc 100644
--- a/sim/common/cgen-ops.h
+++ b/sim/common/cgen-ops.h
@@ -463,8 +463,8 @@ JOINSITF (SI x0, SI x1, SI x2, SI x3)
#else
-QI SUBWORDSIQI (SI);
-HI SUBWORDSIHI (HI);
+QI SUBWORDSIQI (SI, int);
+HI SUBWORDSIHI (SI, int);
SI SUBWORDSFSI (SF);
SF SUBWORDSISF (SI);
DI SUBWORDDFDI (DF);
@@ -476,8 +476,8 @@ SI SUBWORDDFSI (DF, int);
SI SUBWORDXFSI (XF, int);
SI SUBWORDTFSI (TF, int);
-UQI SUBWORDSIUQI (SI);
-UQI SUBWORDDIUQI (DI);
+UQI SUBWORDSIUQI (SI, int);
+UQI SUBWORDDIUQI (DI, int);
DI JOINSIDI (SI, SI);
DF JOINSIDF (SI, SI);
@@ -679,27 +679,28 @@ SUBOFDI (DI a, DI b, BI c)
&& ((a < 0) != (tmp < 0)));
return res;
}
+
#else
SI ADDCSI (SI, SI, BI);
-UBI ADDCFSI (SI, SI, BI);
-UBI ADDOFSI (SI, SI, BI);
+BI ADDCFSI (SI, SI, BI);
+BI ADDOFSI (SI, SI, BI);
SI SUBCSI (SI, SI, BI);
-UBI SUBCFSI (SI, SI, BI);
-UBI SUBOFSI (SI, SI, BI);
+BI SUBCFSI (SI, SI, BI);
+BI SUBOFSI (SI, SI, BI);
HI ADDCHI (HI, HI, BI);
-UBI ADDCFHI (HI, HI, BI);
-UBI ADDOFHI (HI, HI, BI);
+BI ADDCFHI (HI, HI, BI);
+BI ADDOFHI (HI, HI, BI);
HI SUBCHI (HI, HI, BI);
-UBI SUBCFHI (HI, HI, BI);
-UBI SUBOFHI (HI, HI, BI);
+BI SUBCFHI (HI, HI, BI);
+BI SUBOFHI (HI, HI, BI);
QI ADDCQI (QI, QI, BI);
-UBI ADDCFQI (QI, QI, BI);
-UBI ADDOFQI (QI, QI, BI);
+BI ADDCFQI (QI, QI, BI);
+BI ADDOFQI (QI, QI, BI);
QI SUBCQI (QI, QI, BI);
-UBI SUBCFQI (QI, QI, BI);
-UBI SUBOFQI (QI, QI, BI);
-BI MUL1OFSI (SI a, SI b);
+BI SUBCFQI (QI, QI, BI);
+BI SUBOFQI (QI, QI, BI);
+BI MUL1OFSI (USI a, USI b);
BI MUL2OFSI (SI a, SI b);
BI ADDCFDI (DI a, DI b, BI c);
BI ADDOFDI (DI a, DI b, BI c);
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 04/13] sim: cgen: always leverage the ops prototypes
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
2021-06-27 3:30 ` [PATCH 02/13] sim: bpf: add explicit casts when using explicit formats Mike Frysinger
2021-06-27 3:30 ` [PATCH 03/13] sim: cgen: sync prototypes with implementation Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 05/13] sim: cgen: always leverage the mem prototypes Mike Frysinger
` (8 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
This fixes missing prototype warnings, and guarantees the prototypes
stay in sync with the function definitions.
---
sim/common/cgen-ops.h | 96 +++++++++++++++++++++----------------------
1 file changed, 46 insertions(+), 50 deletions(-)
diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h
index ddd3855924bc..bb43e09a093a 100644
--- a/sim/common/cgen-ops.h
+++ b/sim/common/cgen-ops.h
@@ -301,6 +301,27 @@ extern SI TRUNCDISI (DI);
significant and word number 0 is the most significant word.
??? May also wish an endian-dependent version. Later. */
+QI SUBWORDSIQI (SI, int);
+HI SUBWORDSIHI (SI, int);
+SI SUBWORDSFSI (SF);
+SF SUBWORDSISF (SI);
+DI SUBWORDDFDI (DF);
+DF SUBWORDDIDF (DI);
+QI SUBWORDDIQI (DI, int);
+HI SUBWORDDIHI (DI, int);
+SI SUBWORDDISI (DI, int);
+SI SUBWORDDFSI (DF, int);
+SI SUBWORDXFSI (XF, int);
+SI SUBWORDTFSI (TF, int);
+
+UQI SUBWORDSIUQI (SI, int);
+UQI SUBWORDDIUQI (DI, int);
+
+DI JOINSIDI (SI, SI);
+DF JOINSIDF (SI, SI);
+XF JOINSIXF (SI, SI, SI);
+TF JOINSITF (SI, SI, SI, SI);
+
#ifdef SEMOPS_DEFINE_INLINE
SEMOPS_INLINE SF
@@ -461,33 +482,35 @@ JOINSITF (SI x0, SI x1, SI x2, SI x3)
return x.out;
}
-#else
-
-QI SUBWORDSIQI (SI, int);
-HI SUBWORDSIHI (SI, int);
-SI SUBWORDSFSI (SF);
-SF SUBWORDSISF (SI);
-DI SUBWORDDFDI (DF);
-DF SUBWORDDIDF (DI);
-QI SUBWORDDIQI (DI, int);
-HI SUBWORDDIHI (DI, int);
-SI SUBWORDDISI (DI, int);
-SI SUBWORDDFSI (DF, int);
-SI SUBWORDXFSI (XF, int);
-SI SUBWORDTFSI (TF, int);
-
-UQI SUBWORDSIUQI (SI, int);
-UQI SUBWORDDIUQI (DI, int);
-
-DI JOINSIDI (SI, SI);
-DF JOINSIDF (SI, SI);
-XF JOINSIXF (SI, SI, SI);
-TF JOINSITF (SI, SI, SI, SI);
-
#endif /* SUBWORD,JOIN */
\f
/* Semantic support utilities. */
+SI ADDCSI (SI, SI, BI);
+BI ADDCFSI (SI, SI, BI);
+BI ADDOFSI (SI, SI, BI);
+SI SUBCSI (SI, SI, BI);
+BI SUBCFSI (SI, SI, BI);
+BI SUBOFSI (SI, SI, BI);
+HI ADDCHI (HI, HI, BI);
+BI ADDCFHI (HI, HI, BI);
+BI ADDOFHI (HI, HI, BI);
+HI SUBCHI (HI, HI, BI);
+BI SUBCFHI (HI, HI, BI);
+BI SUBOFHI (HI, HI, BI);
+QI ADDCQI (QI, QI, BI);
+BI ADDCFQI (QI, QI, BI);
+BI ADDOFQI (QI, QI, BI);
+QI SUBCQI (QI, QI, BI);
+BI SUBCFQI (QI, QI, BI);
+BI SUBOFQI (QI, QI, BI);
+BI MUL1OFSI (USI a, USI b);
+BI MUL2OFSI (SI a, SI b);
+BI ADDCFDI (DI a, DI b, BI c);
+BI ADDOFDI (DI a, DI b, BI c);
+BI SUBCFDI (DI a, DI b, BI c);
+BI SUBOFDI (DI a, DI b, BI c);
+
#ifdef SEMOPS_DEFINE_INLINE
SEMOPS_INLINE SI
@@ -680,33 +703,6 @@ SUBOFDI (DI a, DI b, BI c)
return res;
}
-#else
-
-SI ADDCSI (SI, SI, BI);
-BI ADDCFSI (SI, SI, BI);
-BI ADDOFSI (SI, SI, BI);
-SI SUBCSI (SI, SI, BI);
-BI SUBCFSI (SI, SI, BI);
-BI SUBOFSI (SI, SI, BI);
-HI ADDCHI (HI, HI, BI);
-BI ADDCFHI (HI, HI, BI);
-BI ADDOFHI (HI, HI, BI);
-HI SUBCHI (HI, HI, BI);
-BI SUBCFHI (HI, HI, BI);
-BI SUBOFHI (HI, HI, BI);
-QI ADDCQI (QI, QI, BI);
-BI ADDCFQI (QI, QI, BI);
-BI ADDOFQI (QI, QI, BI);
-QI SUBCQI (QI, QI, BI);
-BI SUBCFQI (QI, QI, BI);
-BI SUBOFQI (QI, QI, BI);
-BI MUL1OFSI (USI a, USI b);
-BI MUL2OFSI (SI a, SI b);
-BI ADDCFDI (DI a, DI b, BI c);
-BI ADDOFDI (DI a, DI b, BI c);
-BI SUBCFDI (DI a, DI b, BI c);
-BI SUBOFDI (DI a, DI b, BI c);
-
#endif
extern void cgen_rtx_error (SIM_CPU *, const char *);
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 05/13] sim: cgen: always leverage the mem prototypes
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (2 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 04/13] sim: cgen: always leverage the ops prototypes Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 06/13] sim: cgen: constify trace strings Mike Frysinger
` (7 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
This fixes missing prototype warnings, and guarantees the prototypes
stay in sync with the function definitions. One of the macros had
fallen out by declaring the wrong return type.
---
sim/common/cgen-mem.h | 56 ++++++++++++++++++++++++++++++++-----------
1 file changed, 42 insertions(+), 14 deletions(-)
diff --git a/sim/common/cgen-mem.h b/sim/common/cgen-mem.h
index 1a3843f8efe2..deb3cc091c66 100644
--- a/sim/common/cgen-mem.h
+++ b/sim/common/cgen-mem.h
@@ -33,8 +33,12 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
floating point modes, only floating point operations (whose arguments
and results are arrays of bits that we treat as integer modes). */
+#define DECLARE_GETMEM_EXTERN(mode, size) \
+extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
+
#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_GETMEM(mode, size) \
+DECLARE_GETMEM_EXTERN (mode, size) \
MEMOPS_INLINE mode \
XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
{ \
@@ -43,8 +47,7 @@ XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, pc, read_map, a); \
}
#else
-#define DECLARE_GETMEM(mode, size) \
-extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
+#define DECLARE_GETMEM(mode, size) DECLARE_GETMEM_EXTERN (mode, size)
#endif
DECLARE_GETMEM (QI, 1) /* TAGS: GETMEMQI */
@@ -57,11 +60,16 @@ DECLARE_GETMEM (DI, 8) /* TAGS: GETMEMDI */
DECLARE_GETMEM (UDI, 8) /* TAGS: GETMEMUDI */
#undef DECLARE_GETMEM
+#undef DECLARE_GETMEM_EXTERN
\f
/* Integer memory write support. */
+#define DECLARE_SETMEM_EXTERN(mode, size) \
+extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
+
#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_SETMEM(mode, size) \
+DECLARE_SETMEM_EXTERN (mode, size) \
MEMOPS_INLINE void \
XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
{ \
@@ -70,8 +78,7 @@ XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
}
#else
-#define DECLARE_SETMEM(mode, size) \
-extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
+#define DECLARE_SETMEM(mode, size) DECLARE_SETMEM_EXTERN (mode, size)
#endif
DECLARE_SETMEM (QI, 1) /* TAGS: SETMEMQI */
@@ -84,11 +91,16 @@ DECLARE_SETMEM (DI, 8) /* TAGS: SETMEMDI */
DECLARE_SETMEM (UDI, 8) /* TAGS: SETMEMUDI */
#undef DECLARE_SETMEM
+#undef DECLARE_SETMEM_EXTERN
\f
/* Instruction read support. */
+#define DECLARE_GETIMEM_EXTERN(mode, size) \
+extern mode XCONCAT2 (GETIMEM,mode) (SIM_CPU *, ADDR);
+
#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_GETIMEM(mode, size) \
+DECLARE_GETIMEM_EXTERN (mode, size) \
MEMOPS_INLINE mode \
XCONCAT2 (GETIMEM,mode) (SIM_CPU *cpu, IADDR a) \
{ \
@@ -97,8 +109,7 @@ XCONCAT2 (GETIMEM,mode) (SIM_CPU *cpu, IADDR a) \
return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, a, exec_map, a); \
}
#else
-#define DECLARE_GETIMEM(mode, size) \
-extern mode XCONCAT2 (GETIMEM,mode) (SIM_CPU *, ADDR);
+#define DECLARE_GETIMEM(mode, size) DECLARE_GETIMEM_EXTERN (mode, size)
#endif
DECLARE_GETIMEM (UQI, 1) /* TAGS: GETIMEMUQI */
@@ -107,6 +118,7 @@ DECLARE_GETIMEM (USI, 4) /* TAGS: GETIMEMUSI */
DECLARE_GETIMEM (UDI, 8) /* TAGS: GETIMEMUDI */
#undef DECLARE_GETIMEM
+#undef DECLARE_GETIMEM_EXTERN
\f
/* Floating point support.
@@ -118,8 +130,12 @@ DECLARE_GETIMEM (UDI, 8) /* TAGS: GETIMEMUDI */
that's a complication of its own (not that having these fns isn't).
But for now, we do things this way. */
+#define DECLARE_GETMEM_EXTERN(mode, size) \
+extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
+
#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_GETMEM(mode, size) \
+DECLARE_GETMEM_EXTERN (mode, size) \
MEMOPS_INLINE mode \
XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
{ \
@@ -128,17 +144,21 @@ XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, pc, read_map, a); \
}
#else
-#define DECLARE_GETMEM(mode, size) \
-extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
+#define DECLARE_GETMEM(mode, size) DECLARE_GETMEM_EXTERN (mode, size)
#endif
DECLARE_GETMEM (SF, 4) /* TAGS: GETMEMSF */
DECLARE_GETMEM (DF, 8) /* TAGS: GETMEMDF */
#undef DECLARE_GETMEM
+#undef DECLARE_GETMEM_EXTERN
+
+#define DECLARE_SETMEM_EXTERN(mode, size) \
+extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_SETMEM(mode, size) \
+DECLARE_SETMEM_EXTERN (mode, size) \
MEMOPS_INLINE void \
XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
{ \
@@ -147,21 +167,25 @@ XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
}
#else
-#define DECLARE_SETMEM(mode, size) \
-extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
+#define DECLARE_SETMEM(mode, size) DECLARE_SETMEM_EXTERN (mode, size
#endif
DECLARE_SETMEM (SF, 4) /* TAGS: SETMEMSF */
DECLARE_SETMEM (DF, 8) /* TAGS: SETMEMDF */
#undef DECLARE_SETMEM
+#undef DECLARE_SETMEM_EXTERN
\f
/* GETT<mode>: translate target value at P to host value.
This needn't be very efficient (i.e. can call memcpy) as this is
only used when interfacing with the outside world (e.g. gdb). */
+#define DECLARE_GETT_EXTERN(mode, size) \
+extern mode XCONCAT2 (GETT,mode) (unsigned char *);
+
#if defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_GETT(mode, size) \
+DECLARE_GETT_EXTERN (mode, size) \
mode \
XCONCAT2 (GETT,mode) (unsigned char *p) \
{ \
@@ -170,8 +194,7 @@ XCONCAT2 (GETT,mode) (unsigned char *p) \
return XCONCAT2 (T2H_,size) (tmp); \
}
#else
-#define DECLARE_GETT(mode, size) \
-extern mode XCONCAT2 (GETT,mode) (unsigned char *);
+#define DECLARE_GETT(mode, size) DECLARE_GETT_EXTERN (mode, size)
#endif
DECLARE_GETT (QI, 1) /* TAGS: GETTQI */
@@ -190,13 +213,18 @@ DECLARE_GETT (TF, 16) /* TAGS: GETTTF */
#endif
#undef DECLARE_GETT
+#undef DECLARE_GETT_EXTERN
\f
/* SETT<mode>: translate host value to target value and store at P.
This needn't be very efficient (i.e. can call memcpy) as this is
only used when interfacing with the outside world (e.g. gdb). */
+#define DECLARE_SETT_EXTERN(mode, size) \
+extern void XCONCAT2 (SETT,mode) (unsigned char *, mode);
+
#if defined (MEMOPS_DEFINE_INLINE)
#define DECLARE_SETT(mode, size) \
+DECLARE_SETT_EXTERN (mode, size) \
void \
XCONCAT2 (SETT,mode) (unsigned char *buf, mode val) \
{ \
@@ -205,8 +233,7 @@ XCONCAT2 (SETT,mode) (unsigned char *buf, mode val) \
memcpy (buf, &tmp, sizeof (mode)); \
}
#else
-#define DECLARE_SETT(mode, size) \
-extern mode XCONCAT2 (SETT,mode) (unsigned char *, mode);
+#define DECLARE_SETT(mode, size) DECLARE_SETT_EXTERN (mode, size)
#endif
DECLARE_SETT (QI, 1) /* TAGS: SETTQI */
@@ -225,5 +252,6 @@ DECLARE_SETT (TF, 16) /* TAGS: SETTTF */
#endif
#undef DECLARE_SETT
+#undef DECLARE_SETT_EXTERN
#endif /* CGEN_MEM_H */
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 06/13] sim: cgen: constify trace strings
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (3 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 05/13] sim: cgen: always leverage the mem prototypes Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 07/13] sim: cgen: add printf attributes in a few more calls Mike Frysinger
` (6 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
Shouldn't be any functional changes here.
---
sim/common/cgen-trace.c | 10 +++++-----
sim/common/cgen-trace.h | 6 +++---
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c
index 206720ca1395..65927400ae3a 100644
--- a/sim/common/cgen-trace.c
+++ b/sim/common/cgen-trace.c
@@ -185,11 +185,11 @@ cgen_trace_insn (SIM_CPU *cpu, const struct cgen_insn *opcode,
}
void
-cgen_trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
+cgen_trace_extract (SIM_CPU *cpu, IADDR pc, const char *name, ...)
{
va_list args;
int printed_one_p = 0;
- char *fmt;
+ const char *fmt;
va_start (args, name);
@@ -199,7 +199,7 @@ cgen_trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
do {
int type,ival;
- fmt = va_arg (args, char *);
+ fmt = va_arg (args, const char *);
if (fmt)
{
@@ -224,7 +224,7 @@ cgen_trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
}
void
-cgen_trace_result (SIM_CPU *cpu, char *name, int type, ...)
+cgen_trace_result (SIM_CPU *cpu, const char *name, int type, ...)
{
va_list args;
@@ -270,7 +270,7 @@ cgen_trace_result (SIM_CPU *cpu, char *name, int type, ...)
This is only for tracing semantic code. */
void
-cgen_trace_printf (SIM_CPU *cpu, char *fmt, ...)
+cgen_trace_printf (SIM_CPU *cpu, const char *fmt, ...)
{
va_list args;
diff --git a/sim/common/cgen-trace.h b/sim/common/cgen-trace.h
index 6e860de78400..fcf50e98078c 100644
--- a/sim/common/cgen-trace.h
+++ b/sim/common/cgen-trace.h
@@ -24,9 +24,9 @@ void cgen_trace_insn_init (SIM_CPU *, int);
void cgen_trace_insn_fini (SIM_CPU *, const struct argbuf *, int);
void cgen_trace_insn (SIM_CPU *, const struct cgen_insn *,
const struct argbuf *, IADDR);
-void cgen_trace_extract (SIM_CPU *, IADDR, char *, ...);
-void cgen_trace_result (SIM_CPU *, char *, int, ...);
-void cgen_trace_printf (SIM_CPU *, char *fmt, ...);
+void cgen_trace_extract (SIM_CPU *, IADDR, const char *, ...);
+void cgen_trace_result (SIM_CPU *, const char *, int, ...);
+void cgen_trace_printf (SIM_CPU *, const char *fmt, ...);
/* Trace instruction results. */
#define CGEN_TRACE_RESULT_P(cpu, abuf) \
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 07/13] sim: cgen: add printf attributes in a few more calls
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (4 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 06/13] sim: cgen: constify trace strings Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 08/13] sim: cgen: add asserts to fix unused engine warnings Mike Frysinger
` (5 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
---
sim/common/cgen-trace.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sim/common/cgen-trace.h b/sim/common/cgen-trace.h
index fcf50e98078c..c617e7e21e12 100644
--- a/sim/common/cgen-trace.h
+++ b/sim/common/cgen-trace.h
@@ -26,7 +26,7 @@ void cgen_trace_insn (SIM_CPU *, const struct cgen_insn *,
const struct argbuf *, IADDR);
void cgen_trace_extract (SIM_CPU *, IADDR, const char *, ...);
void cgen_trace_result (SIM_CPU *, const char *, int, ...);
-void cgen_trace_printf (SIM_CPU *, const char *fmt, ...);
+void cgen_trace_printf (SIM_CPU *, const char *fmt, ...) ATTRIBUTE_PRINTF_2;
/* Trace instruction results. */
#define CGEN_TRACE_RESULT_P(cpu, abuf) \
@@ -75,7 +75,7 @@ typedef struct {
} SFILE;
/* String printer for the disassembler. */
-extern int sim_disasm_sprintf (SFILE *, const char *, ...);
+extern int sim_disasm_sprintf (SFILE *, const char *, ...) ATTRIBUTE_PRINTF_2;
/* For opcodes based disassemblers. */
#ifdef __BFD_H_SEEN__
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 08/13] sim: cgen: add asserts to fix unused engine warnings
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (5 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 07/13] sim: cgen: add printf attributes in a few more calls Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 09/13] sim: cgen: suppress trace non-literal printf warning Mike Frysinger
` (4 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
If the user passed in values outside the range of [0, MAX_NR_PROCESSORS),
it would cause the code to access out-of-bind engine function pointers.
Add some asserts to catch that and to fix the related compiler warnings.
---
sim/common/cgen-run.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/sim/common/cgen-run.c b/sim/common/cgen-run.c
index 1b097e1f1ec8..0951c9243857 100644
--- a/sim/common/cgen-run.c
+++ b/sim/common/cgen-run.c
@@ -231,6 +231,9 @@ engine_run_n (SIM_DESC sd, int next_cpu_nr, int nr_cpus, int max_insns, int fast
int i;
ENGINE_FN *engine_fns[MAX_NR_PROCESSORS];
+ SIM_ASSERT (nr_cpus <= MAX_NR_PROCESSORS);
+ SIM_ASSERT (next_cpu_nr >= 0 && next_cpu_nr < nr_cpus);
+
for (i = 0; i < nr_cpus; ++i)
{
SIM_CPU *cpu = STATE_CPU (sd, i);
@@ -244,7 +247,7 @@ engine_run_n (SIM_DESC sd, int next_cpu_nr, int nr_cpus, int max_insns, int fast
SIM_ENGINE_PREFIX_HOOK (sd);
/* FIXME: proper cycling of all of them, blah blah blah. */
- while (next_cpu_nr != nr_cpus)
+ while (next_cpu_nr < nr_cpus)
{
SIM_CPU *cpu = STATE_CPU (sd, next_cpu_nr);
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 09/13] sim: cgen: suppress trace non-literal printf warning
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (6 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 08/13] sim: cgen: add asserts to fix unused engine warnings Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 10/13] sim: bpf: delete unused function Mike Frysinger
` (3 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
The cgen trace macros are a bit ugly in that they specify a series of
format strings & arguments in a single call. This means we pass a
non-literal string to printf and the compiler warns about it. Use
the diagnostic macros to suppress that in this one place.
---
sim/common/cgen-trace.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c
index 65927400ae3a..f5483fd39eaf 100644
--- a/sim/common/cgen-trace.c
+++ b/sim/common/cgen-trace.c
@@ -22,6 +22,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include <errno.h>
#include <stdlib.h>
+#include "diagnostics.h"
#include "dis-asm.h"
#include "bfd.h"
#include "sim-main.h"
@@ -211,7 +212,10 @@ cgen_trace_extract (SIM_CPU *cpu, IADDR pc, const char *name, ...)
{
case 'x' :
ival = va_arg (args, int);
+ DIAGNOSTIC_PUSH
+ DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL
trace_printf (CPU_STATE (cpu), cpu, fmt, ival);
+ DIAGNOSTIC_POP
break;
default :
abort ();
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 10/13] sim: bpf: delete unused function
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (7 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 09/13] sim: cgen: suppress trace non-literal printf warning Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 11/13] sim: bpf: include more local headers & fix broken funcs Mike Frysinger
` (2 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
---
sim/bpf/cpu.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/sim/bpf/cpu.c b/sim/bpf/cpu.c
index 5c75a90339c7..d69a0f668fb3 100644
--- a/sim/bpf/cpu.c
+++ b/sim/bpf/cpu.c
@@ -59,11 +59,3 @@ bpfbf_h_pc_set (SIM_CPU *current_cpu, UDI newval)
{
SET_H_PC (newval);
}
-
-/* Record trace results for INSN. */
-
-void
-bpfbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
- int *indices, TRACE_RECORD *tr)
-{
-}
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 11/13] sim: bpf: include more local headers & fix broken funcs
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (8 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 10/13] sim: bpf: delete unused function Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 12/13] sim: bpf/cris: include cgen-mem in decoders Mike Frysinger
2021-06-27 3:30 ` [PATCH 13/13] sim: bpf: enable -Werror usage Mike Frysinger
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
Various files were not including the relevant headers, or some funcs
were missing prototypes entirely, leading to mismatch between the
actual definition of the functions. Add includes to a few places and
fix the broken functions that are uncovered as a result. Fixing some
compile warnings (e.g. missing prototypes) often find real bugs.
---
sim/bpf/bpf-helpers.c | 2 ++
sim/bpf/bpf-helpers.h | 4 +++-
sim/bpf/bpf.c | 15 ++++++---------
sim/bpf/sim-main.h | 1 +
4 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/sim/bpf/bpf-helpers.c b/sim/bpf/bpf-helpers.c
index d72c22a09bee..e33f52035515 100644
--- a/sim/bpf/bpf-helpers.c
+++ b/sim/bpf/bpf-helpers.c
@@ -32,6 +32,8 @@
#include "cgen-ops.h"
#include "cpu.h"
+#include "bpf-helpers.h"
+
/* bpf_trace_printk is a printk-like facility for debugging.
In the kernel, it appends a line to the Linux's tracing debugging
diff --git a/sim/bpf/bpf-helpers.h b/sim/bpf/bpf-helpers.h
index 686a53497e03..73cfbb7fa9c7 100644
--- a/sim/bpf/bpf-helpers.h
+++ b/sim/bpf/bpf-helpers.h
@@ -26,6 +26,8 @@ enum bpf_kernel_helper
#undef DEF_HELPER
};
-void bpf_trace_printk (SIM_CPU *current_cpu);
+int bpf_trace_printk (SIM_CPU *current_cpu);
+
+VOID bpfbf_breakpoint (SIM_CPU *current_cpu);
#endif /* ! BPF_HELPERS_H */
diff --git a/sim/bpf/bpf.c b/sim/bpf/bpf.c
index 9e78960ddcc5..de77da851eee 100644
--- a/sim/bpf/bpf.c
+++ b/sim/bpf/bpf.c
@@ -30,15 +30,12 @@
#include "cpuall.h"
#include "decode.h"
+#include "decode-be.h"
+#include "decode-le.h"
+
#include "defs-le.h" /* For SCACHE */
#include "bpf-helpers.h"
-/* It is not possible to include both defs-le.h and defs-be.h due to
- duplicated definitions, so we need a bunch of forward declarations
- here. */
-extern void bpfbf_ebpfle_init_idesc_table (SIM_CPU *);
-extern void bpfbf_ebpfbe_init_idesc_table (SIM_CPU *);
-
uint64_t skb_data_offset;
IDESC *bpf_idesc_le;
@@ -84,7 +81,7 @@ bpfbf_model_insn_before (SIM_CPU *current_cpu, int first_p)
}
void
-bpfbf_model_insn_after (SIM_CPU *current_cpu, int first_p)
+bpfbf_model_insn_after (SIM_CPU *current_cpu, int first_p, int cycles)
{
/* XXX */
}
@@ -209,7 +206,7 @@ bpfbf_breakpoint (SIM_CPU *current_cpu)
several ISAs. This should be fixed in CGEN. */
static void
-bpf_def_model_init (void)
+bpf_def_model_init (SIM_CPU *cpu)
{
/* Do nothing. */
}
@@ -220,7 +217,7 @@ bpfbf_prepare_run (SIM_CPU *cpu)
/* Nothing. */
}
-void
+static void
bpf_engine_run_full (SIM_CPU *cpu)
{
if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
diff --git a/sim/bpf/sim-main.h b/sim/bpf/sim-main.h
index 571c14c67bc5..dd5626825646 100644
--- a/sim/bpf/sim-main.h
+++ b/sim/bpf/sim-main.h
@@ -27,6 +27,7 @@
#include "sim-base.h"
#include "cgen-sim.h"
#include "bpf-sim.h"
+#include "bpf-helpers.h"
struct _sim_cpu
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 12/13] sim: bpf/cris: include cgen-mem in decoders
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (9 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 11/13] sim: bpf: include more local headers & fix broken funcs Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 3:30 ` [PATCH 13/13] sim: bpf: enable -Werror usage Mike Frysinger
11 siblings, 0 replies; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
These arches use cgen memory functions, so make sure to include the
header in the modules.
---
sim/bpf/decode-be.c | 2 ++
sim/bpf/decode-le.c | 2 ++
sim/cris/decodev10.c | 1 +
sim/cris/decodev32.c | 1 +
4 files changed, 6 insertions(+)
diff --git a/sim/bpf/decode-be.c b/sim/bpf/decode-be.c
index 54ebae17e60f..71ca0322f2c3 100644
--- a/sim/bpf/decode-be.c
+++ b/sim/bpf/decode-be.c
@@ -27,6 +27,8 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "sim-assert.h"
+#include "cgen-mem.h"
+#include "cgen-ops.h"
/* The instruction descriptor array.
This is computed at runtime. Space for it is not malloc'd to save a
diff --git a/sim/bpf/decode-le.c b/sim/bpf/decode-le.c
index 613d33d14e71..96f194313605 100644
--- a/sim/bpf/decode-le.c
+++ b/sim/bpf/decode-le.c
@@ -27,6 +27,8 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "sim-assert.h"
+#include "cgen-mem.h"
+#include "cgen-ops.h"
/* The instruction descriptor array.
This is computed at runtime. Space for it is not malloc'd to save a
diff --git a/sim/cris/decodev10.c b/sim/cris/decodev10.c
index 798572f5d28a..6b978d00390c 100644
--- a/sim/cris/decodev10.c
+++ b/sim/cris/decodev10.c
@@ -26,6 +26,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "sim-assert.h"
+#include "cgen-mem.h"
#include "cgen-ops.h"
/* The instruction descriptor array.
diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c
index ea5765996956..43b0dfb8a408 100644
--- a/sim/cris/decodev32.c
+++ b/sim/cris/decodev32.c
@@ -26,6 +26,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "sim-assert.h"
+#include "cgen-mem.h"
#include "cgen-ops.h"
/* The instruction descriptor array.
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 13/13] sim: bpf: enable -Werror usage
2021-06-27 3:30 [PATCH 01/13] sim: bpf: fix mixed decls & code warnings (and style) Mike Frysinger
` (10 preceding siblings ...)
2021-06-27 3:30 ` [PATCH 12/13] sim: bpf/cris: include cgen-mem in decoders Mike Frysinger
@ 2021-06-27 3:30 ` Mike Frysinger
2021-06-27 4:32 ` Simon Marchi
11 siblings, 1 reply; 14+ messages in thread
From: Mike Frysinger @ 2021-06-27 3:30 UTC (permalink / raw)
To: gdb-patches
Now that all bpf warnings have been cleaned up, turn on -Werror.
---
sim/bpf/Makefile.in | 3 ---
1 file changed, 3 deletions(-)
diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in
index c48c37837e6e..3188ab1b0c21 100644
--- a/sim/bpf/Makefile.in
+++ b/sim/bpf/Makefile.in
@@ -41,9 +41,6 @@ SIM_EXTRA_DEPS = \
SIM_EXTRA_CLEAN = bpf-clean
-# Code doesn't build cleanly yet.
-SIM_WERROR_CFLAGS =
-
## COMMON_POST_CONFIG_FRAG
# BPF headers
--
2.31.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 13/13] sim: bpf: enable -Werror usage
2021-06-27 3:30 ` [PATCH 13/13] sim: bpf: enable -Werror usage Mike Frysinger
@ 2021-06-27 4:32 ` Simon Marchi
0 siblings, 0 replies; 14+ messages in thread
From: Simon Marchi @ 2021-06-27 4:32 UTC (permalink / raw)
To: Mike Frysinger, gdb-patches
On 2021-06-26 11:30 p.m., Mike Frysinger via Gdb-patches wrote:
> Now that all bpf warnings have been cleaned up, turn on -Werror.
> ---
> sim/bpf/Makefile.in | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in
> index c48c37837e6e..3188ab1b0c21 100644
> --- a/sim/bpf/Makefile.in
> +++ b/sim/bpf/Makefile.in
> @@ -41,9 +41,6 @@ SIM_EXTRA_DEPS = \
>
> SIM_EXTRA_CLEAN = bpf-clean
>
> -# Code doesn't build cleanly yet.
> -SIM_WERROR_CFLAGS =
> -
> ## COMMON_POST_CONFIG_FRAG
>
> # BPF headers
>
I tested this and I see not unexpected error :).
Simon
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-06-27 4:32 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
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2021-06-27 3:30 ` [PATCH 03/13] sim: cgen: sync prototypes with implementation Mike Frysinger
2021-06-27 3:30 ` [PATCH 04/13] sim: cgen: always leverage the ops prototypes Mike Frysinger
2021-06-27 3:30 ` [PATCH 05/13] sim: cgen: always leverage the mem prototypes Mike Frysinger
2021-06-27 3:30 ` [PATCH 06/13] sim: cgen: constify trace strings Mike Frysinger
2021-06-27 3:30 ` [PATCH 07/13] sim: cgen: add printf attributes in a few more calls Mike Frysinger
2021-06-27 3:30 ` [PATCH 08/13] sim: cgen: add asserts to fix unused engine warnings Mike Frysinger
2021-06-27 3:30 ` [PATCH 09/13] sim: cgen: suppress trace non-literal printf warning Mike Frysinger
2021-06-27 3:30 ` [PATCH 10/13] sim: bpf: delete unused function Mike Frysinger
2021-06-27 3:30 ` [PATCH 11/13] sim: bpf: include more local headers & fix broken funcs Mike Frysinger
2021-06-27 3:30 ` [PATCH 12/13] sim: bpf/cris: include cgen-mem in decoders Mike Frysinger
2021-06-27 3:30 ` [PATCH 13/13] sim: bpf: enable -Werror usage Mike Frysinger
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