[Bug sim/19447] mips sim fails some tests when using 64-bit address space

["cvs-commit at gcc dot gnu.org" <sourceware-bugzilla@sourceware.org>]

https://sourceware.org/bugzilla/show_bug.cgi?id=19447

--- Comment #2 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Faraz Shahbazker <farazs@sourceware.org>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b312488f1046a1b837561a4adf4323e29377cf12

commit b312488f1046a1b837561a4adf4323e29377cf12
Author: Faraz Shahbazker <fshahbazker@wavecomp.com>
Date:   Wed May 5 04:51:16 2021 +0530

    sim: mips: Only truncate sign extension bits for 32-bit target models

    64-bit BFD for MIPS applies a standard sign extension on all addresses
    assuming 64-bit target.  These bits are required for 64-bit and can only
    be safely truncated for 32-bit target models. This partially reverts commit
    b36d953bced0a4fecdde1823abac70ed7038ee95

    The sign-extension logic modeled by BFD is an integral part of the
    MIPS64 architecture spec. It appears in the virtual address map, where
    sign extension allows for 32-bit compatibility segments [1] with 64-bit
    addressing. Truncating these addresses prematurely (commit
    models (-DWITH_TARGET_WORD_BITSIZE=64).

    In the ISA itself, direct addressing (Load-Upper-Immediate) and indirect
    addressing (Load-Word) both automatically sign-extend their results. These
    instructions regenerate the sign-extended addresses even if we don't start
    with one (see pr gdb/19447).

    Moreover, some instructions like ADD*/SUB* have unpredictable behaviour
when
    an operand is not correctly sign extended [3]. This affects PC-relative
    addressing in particular, so arithmetic on the link-address generated in
the
    return address register by a jump-and-link is no longer possible, neither
is
    the use of the PC-relative addressing instructions provided by MIPSR6.

    [1] "MIPS64 Architecture for Programmers Volume III: The MIPS64
        Privileged Resource Architecture", Document Number: MD00091,
        Revision 6.02, December 10, 2015, Section 4.3 "Virtual Address
        Spaces", pp. 29-31
   
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00091-2B-MIPS64PRA-AFP-06.03.pdf

    [2] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
        Instruction Set Reference Manual", Document Number: MD00087,
        Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
        List of Instructions", pp. 321
   
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

    [3] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
        Instruction Set Reference Manual", Document Number: MD00087,
        Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
        List of Instructions", pp. 56
   
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

    2021-04-23  Faraz Shahbazker  <fshahbazker@wavecomp.com>

    sim/mips/ChangeLog:
            * interp.c (sim_create_inferior): Only truncate sign extension
            bits for 32-bit target models
    .

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