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From: "rth at gcc dot gnu.org" <sourceware-bugzilla@sourceware.org>
To: gdb-prs@sourceware.org
Subject: [Bug gdb/29421] Extend aarch64 pauth xml for gdbstub and kernel mode
Date: Thu, 08 Sep 2022 14:02:07 +0000 [thread overview]
Message-ID: <bug-29421-4717-ZRK1ELhqKn@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-29421-4717@http.sourceware.org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=29421
--- Comment #9 from Richard Henderson <rth at gcc dot gnu.org> ---
Comment on attachment 14317
--> https://sourceware.org/bugzilla/attachment.cgi?id=14317
Improve PAC support for bare metal aarch64
>- int cmask_num = AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base);
>- CORE_ADDR cmask = frame_unwind_register_unsigned (this_frame, cmask_num);
>+ /* Default bare metal case. We remove the top 16 bits. */
>+ CORE_ADDR cmask = 0xffff000000000000;
This is incorrect. It's the most common memory configuration, sure,
but it's certainly not the only one.
The mask that the native linux case has been providing is built from a
combination of fields in TCR_EL1: T0SZ, TBI0, TG0.
This is why I suggested that qemu provide the same information build
from the corresponding fields for the high-half of the address space:
T1SZ, TBI1, TG1. And the similar but different fields in TCR_EL{2,3}
when the cpu is in those modes.
Note that bit 55 of the address may *always* be used to select the
"high" or "low" half of the address space.
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next prev parent reply other threads:[~2022-09-08 14:02 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-27 19:10 [Bug gdb/29421] New: " rth at gcc dot gnu.org
2022-08-05 12:33 ` [Bug gdb/29421] " luis.machado at arm dot com
2022-08-05 12:33 ` luis.machado at arm dot com
2022-08-05 12:34 ` luis.machado at arm dot com
2022-08-05 14:49 ` rth at gcc dot gnu.org
2022-09-02 17:30 ` luis.machado at arm dot com
2022-09-02 17:38 ` luis.machado at arm dot com
2022-09-02 17:41 ` luis.machado at arm dot com
2022-09-06 12:14 ` luis.machado at arm dot com
2022-09-06 12:14 ` luis.machado at arm dot com
2022-09-08 14:02 ` rth at gcc dot gnu.org [this message]
2022-09-08 14:10 ` luis.machado at arm dot com
2022-09-08 14:10 ` luis.machado at arm dot com
2022-09-08 14:10 ` luis.machado at arm dot com
2022-09-08 16:18 ` rth at gcc dot gnu.org
2022-09-08 16:50 ` luis.machado at arm dot com
2022-09-09 15:05 ` luis.machado at arm dot com
2022-09-15 7:58 ` luis.machado at arm dot com
2022-11-02 12:04 ` luis.machado at arm dot com
2022-12-16 11:22 ` luis.machado at arm dot com
2022-12-16 12:07 ` luis.machado at arm dot com
2023-02-21 9:17 ` luis.machado at arm dot com
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