[Bug sim/29869] sim: align sim register numbers with gdb register numbers

["vapier at gentoo dot org" <sourceware-bugzilla@sourceware.org>]

https://sourceware.org/bugzilla/show_bug.cgi?id=29869

--- Comment #6 from Mike Frysinger <vapier at gentoo dot org> ---
(In reply to Tom Tromey from comment #5)
> I don't really understand why this info isn't in the cgen model
> either, but it doesn't seem to be.

i don't think it makes sense for cgen to know about this.  what we're talking
about here is a communication protocol for serializing & deserializing state,
and GDB defines that protocol.

> Anyway I suspect a new field in _sim_cpu may be the way to go...

while converting the sim to RSP completely is a pretty heavy lift, i think we
have some incremental steps we could consider

* have gdb maintain the lists, and automatically convert/generate/export them
to sim in the source tree.  if there are XML files, use those.  if there are
enums in header files, use those.  we already do this sort of thing with newlib
via sim/common/gennltvals.py, and we commit the result (rather than gen at
build time via portable shell/etc...).  i think we have/want to do this
regardless.
* add a parallel set of sim_{store,fetch}_register APIs that used the same
encoding as RSP.

> Though looking at this, we also don't know the size of registers.
> gdb does, but it doesn't inform the remote of this -- the remote
> is expected to know.

when it comes to the sim APIs, gdb calls the sim with the size. 
sim_fetch_register & sim_store_register both have a "length", and the sim
basically treats it as "it has to match the register size requested via regno".

sim_fetch_register also is designed such that passing in length=0 will return
the size of the requested register without writing to the buffer.  so callers
could cheaply probe the size of all registers.

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