* 'g/G' GDB commands
@ 2007-11-15 9:54 Guillaume MENANT
2007-11-15 13:38 ` Daniel Jacobowitz
2007-11-15 13:48 ` Michael Snyder
0 siblings, 2 replies; 8+ messages in thread
From: Guillaume MENANT @ 2007-11-15 9:54 UTC (permalink / raw)
To: gdb
Hello,
I'm trying to make a stub for GDB but i've a question about the 'g/G'
commands. I don't really understand the following paragraph :
"The following |g|/|G| packets have previously been defined. In the
below, some thirty-two bit registers are transferred as sixty-four bits.
Those registers should be zero/sign extended (which?) to fill the space
allocated. Register bytes are transferred in target byte order. The two
nibbles within a register byte are transferred most-significant -
least-significant.
MIPS32 : All registers are transferred as thirty-two bit quantities in
the order: 32 general-purpose; sr; lo; hi; bad; cause; pc; 32
floating-point registers; fsr; fir; fp.
MIPS64 : All registers are transferred as sixty-four bit quantities
(including thirty-two bit registers such as |sr|). The ordering is the
same as |MIPS32|."
The chip I want to debug is the Atmel AT697E and I don't really know
which register of the AT697E corresponds to "32 general-purpose", "sr",
"lo", "hi", "bad", "cause", "fsr", "fir"... How can I have more
information about that ?
Thanks.
--
Guillaume Menant
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: 'g/G' GDB commands
2007-11-15 9:54 'g/G' GDB commands Guillaume MENANT
@ 2007-11-15 13:38 ` Daniel Jacobowitz
2007-12-20 14:01 ` Guillaume MENANT
2007-11-15 13:48 ` Michael Snyder
1 sibling, 1 reply; 8+ messages in thread
From: Daniel Jacobowitz @ 2007-11-15 13:38 UTC (permalink / raw)
To: Guillaume MENANT; +Cc: gdb
On Thu, Nov 15, 2007 at 10:54:27AM +0100, Guillaume MENANT wrote:
> The chip I want to debug is the Atmel AT697E and I don't really know which
> register of the AT697E corresponds to "32 general-purpose", "sr", "lo", "hi",
> "bad", "cause", "fsr", "fir"... How can I have more information about that ?
I doubt the Atmel AT697E is a MIPS; it's a SPARC, seems like.
So that paragraph does not apply.
Configure a SPARC-targeted GDB and look at the output of "maint print
registers". That should give you an idea of the layout GDB expects.
--
Daniel Jacobowitz
CodeSourcery
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: 'g/G' GDB commands
2007-11-15 13:38 ` Daniel Jacobowitz
@ 2007-12-20 14:01 ` Guillaume MENANT
2008-01-17 9:19 ` Guillaume MENANT
0 siblings, 1 reply; 8+ messages in thread
From: Guillaume MENANT @ 2007-12-20 14:01 UTC (permalink / raw)
To: gdb
I've found the register layout for the g/G commands with the "maint print
registers" command and it looks like this :
Name Nr Rel Offset Size Type
g0 0 0 0 4 int32_t
g1 1 1 4 4 int32_t
g2 2 2 8 4 int32_t
g3 3 3 12 4 int32_t
g4 4 4 16 4 int32_t
g5 5 5 20 4 int32_t
g6 6 6 24 4 int32_t
g7 7 7 28 4 int32_t
o0 8 8 32 4 int32_t
o1 9 9 36 4 int32_t
o2 10 10 40 4 int32_t
o3 11 11 44 4 int32_t
o4 12 12 48 4 int32_t
o5 13 13 52 4 int32_t
sp 14 14 56 4 *1
o7 15 15 60 4 int32_t
l0 16 16 64 4 int32_t
l1 17 17 68 4 int32_t
l2 18 18 72 4 int32_t
l3 19 19 76 4 int32_t
l4 20 20 80 4 int32_t
l5 21 21 84 4 int32_t
l6 22 22 88 4 int32_t
l7 23 23 92 4 int32_t
i0 24 24 96 4 int32_t
i1 25 25 100 4 int32_t
i2 26 26 104 4 int32_t
i3 27 27 108 4 int32_t
i4 28 28 112 4 int32_t
i5 29 29 116 4 int32_t
fp 30 30 120 4 *1
i7 31 31 124 4 int32_t
f0 32 32 128 4 float
f1 33 33 132 4 float
f2 34 34 136 4 float
f3 35 35 140 4 float
f4 36 36 144 4 float
f5 37 37 148 4 float
f6 38 38 152 4 float
f7 39 39 156 4 float
f8 40 40 160 4 float
f9 41 41 164 4 float
f10 42 42 168 4 float
f11 43 43 172 4 float
f12 44 44 176 4 float
f13 45 45 180 4 float
f14 46 46 184 4 float
f15 47 47 188 4 float
f16 48 48 192 4 float
f17 49 49 196 4 float
f18 50 50 200 4 float
f19 51 51 204 4 float
f20 52 52 208 4 float
f21 53 53 212 4 float
f22 54 54 216 4 float
f23 55 55 220 4 float
f24 56 56 224 4 float
f25 57 57 228 4 float
f26 58 58 232 4 float
f27 59 59 236 4 float
f28 60 60 240 4 float
f29 61 61 244 4 float
f30 62 62 248 4 float
f31 63 63 252 4 float
y 64 64 256 4 int32_t
psr 65 65 260 4 int32_t
wim 66 66 264 4 int32_t
tbr 67 67 268 4 int32_t
pc 68 68 272 4 *1
npc 69 69 276 4 *1
fsr 70 70 280 4 int32_t
csr 71 71 284 4 int32_t
d0 72 0 288 8 double
d2 73 1 296 8 double
d4 74 2 304 8 double
d6 75 3 312 8 double
d8 76 4 320 8 double
d10 77 5 328 8 double
d12 78 6 336 8 double
d14 79 7 344 8 double
d16 80 8 352 8 double
d18 81 9 360 8 double
d20 82 10 368 8 double
d22 83 11 376 8 double
d24 84 12 384 8 double
d26 85 13 392 8 double
d28 86 14 400 8 double
d30 87 15 408 8 double
Thanks for your answers.
Daniel Jacobowitz-2 wrote:
>
> On Thu, Nov 15, 2007 at 10:54:27AM +0100, Guillaume MENANT wrote:
>> The chip I want to debug is the Atmel AT697E and I don't really know
>> which
>> register of the AT697E corresponds to "32 general-purpose", "sr", "lo",
>> "hi",
>> "bad", "cause", "fsr", "fir"... How can I have more information about
>> that ?
>
> I doubt the Atmel AT697E is a MIPS; it's a SPARC, seems like.
> So that paragraph does not apply.
>
> Configure a SPARC-targeted GDB and look at the output of "maint print
> registers". That should give you an idea of the layout GDB expects.
>
> --
> Daniel Jacobowitz
> CodeSourcery
>
>
--
View this message in context: http://www.nabble.com/%27g-G%27-GDB-commands-tp13764693p14437056.html
Sent from the Sourceware - gdb list mailing list archive at Nabble.com.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: 'g/G' GDB commands
2007-12-20 14:01 ` Guillaume MENANT
@ 2008-01-17 9:19 ` Guillaume MENANT
2008-01-17 9:45 ` Guillaume MENANT
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Guillaume MENANT @ 2008-01-17 9:19 UTC (permalink / raw)
To: gdb
I've implemented the reply to the 'g' command but GDB sends me a nack ('-')
each time (3 times and then freeze).
I'm working on a Atmel AT697E (Sparc V8) in which all registers printed with
"maint print registers" command exists except csr and dx registers (last
registers listed below). So I tried to send only supported registers (GDB
sends nack) and also tried to add '0' padding in order to fill the
non-implemented registers (same response).
How can I see why GDB sends me a nack ? What can I do ?
PS : I'm using sparc-elf-gdb debugger
Thanks a lot for your answers.
Guillaume MENANT wrote:
>
> I've found the register layout for the g/G commands with the "maint print
> registers" command and it looks like this :
>
> Name Nr Rel Offset Size Type
> g0 0 0 0 4 int32_t
> g1 1 1 4 4 int32_t
> g2 2 2 8 4 int32_t
> g3 3 3 12 4 int32_t
> g4 4 4 16 4 int32_t
> g5 5 5 20 4 int32_t
> g6 6 6 24 4 int32_t
> g7 7 7 28 4 int32_t
> o0 8 8 32 4 int32_t
> o1 9 9 36 4 int32_t
> o2 10 10 40 4 int32_t
> o3 11 11 44 4 int32_t
> o4 12 12 48 4 int32_t
> o5 13 13 52 4 int32_t
> sp 14 14 56 4 *1
> o7 15 15 60 4 int32_t
> l0 16 16 64 4 int32_t
> l1 17 17 68 4 int32_t
> l2 18 18 72 4 int32_t
> l3 19 19 76 4 int32_t
> l4 20 20 80 4 int32_t
> l5 21 21 84 4 int32_t
> l6 22 22 88 4 int32_t
> l7 23 23 92 4 int32_t
> i0 24 24 96 4 int32_t
> i1 25 25 100 4 int32_t
> i2 26 26 104 4 int32_t
> i3 27 27 108 4 int32_t
> i4 28 28 112 4 int32_t
> i5 29 29 116 4 int32_t
> fp 30 30 120 4 *1
> i7 31 31 124 4 int32_t
> f0 32 32 128 4 float
> f1 33 33 132 4 float
> f2 34 34 136 4 float
> f3 35 35 140 4 float
> f4 36 36 144 4 float
> f5 37 37 148 4 float
> f6 38 38 152 4 float
> f7 39 39 156 4 float
> f8 40 40 160 4 float
> f9 41 41 164 4 float
> f10 42 42 168 4 float
> f11 43 43 172 4 float
> f12 44 44 176 4 float
> f13 45 45 180 4 float
> f14 46 46 184 4 float
> f15 47 47 188 4 float
> f16 48 48 192 4 float
> f17 49 49 196 4 float
> f18 50 50 200 4 float
> f19 51 51 204 4 float
> f20 52 52 208 4 float
> f21 53 53 212 4 float
> f22 54 54 216 4 float
> f23 55 55 220 4 float
> f24 56 56 224 4 float
> f25 57 57 228 4 float
> f26 58 58 232 4 float
> f27 59 59 236 4 float
> f28 60 60 240 4 float
> f29 61 61 244 4 float
> f30 62 62 248 4 float
> f31 63 63 252 4 float
> y 64 64 256 4 int32_t
> psr 65 65 260 4 int32_t
> wim 66 66 264 4 int32_t
> tbr 67 67 268 4 int32_t
> pc 68 68 272 4 *1
> npc 69 69 276 4 *1
> fsr 70 70 280 4 int32_t
> csr 71 71 284 4 int32_t
> d0 72 0 288 8 double
> d2 73 1 296 8 double
> d4 74 2 304 8 double
> d6 75 3 312 8 double
> d8 76 4 320 8 double
> d10 77 5 328 8 double
> d12 78 6 336 8 double
> d14 79 7 344 8 double
> d16 80 8 352 8 double
> d18 81 9 360 8 double
> d20 82 10 368 8 double
> d22 83 11 376 8 double
> d24 84 12 384 8 double
> d26 85 13 392 8 double
> d28 86 14 400 8 double
> d30 87 15 408 8 double
>
> Thanks for your answers.
>
>
> Daniel Jacobowitz-2 wrote:
>>
>> On Thu, Nov 15, 2007 at 10:54:27AM +0100, Guillaume MENANT wrote:
>>> The chip I want to debug is the Atmel AT697E and I don't really know
>>> which
>>> register of the AT697E corresponds to "32 general-purpose", "sr", "lo",
>>> "hi",
>>> "bad", "cause", "fsr", "fir"... How can I have more information about
>>> that ?
>>
>> I doubt the Atmel AT697E is a MIPS; it's a SPARC, seems like.
>> So that paragraph does not apply.
>>
>> Configure a SPARC-targeted GDB and look at the output of "maint print
>> registers". That should give you an idea of the layout GDB expects.
>>
>> --
>> Daniel Jacobowitz
>> CodeSourcery
>>
>>
>
>
--
View this message in context: http://www.nabble.com/%27g-G%27-GDB-commands-tp13764693p14914940.html
Sent from the Sourceware - gdb list mailing list archive at Nabble.com.
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: 'g/G' GDB commands
2008-01-17 9:19 ` Guillaume MENANT
@ 2008-01-17 9:45 ` Guillaume MENANT
2008-01-17 10:17 ` Mark Kettenis
2008-01-17 14:41 ` Daniel Jacobowitz
2 siblings, 0 replies; 8+ messages in thread
From: Guillaume MENANT @ 2008-01-17 9:45 UTC (permalink / raw)
To: gdb
I've made a mistake. GDB accepts my reponse with the '0' padding of one 32
bits register (csr).
Thanks.
Guillaume MENANT wrote:
>
> I've implemented the reply to the 'g' command but GDB sends me a nack
> ('-') each time (3 times and then freeze).
>
> I'm working on a Atmel AT697E (Sparc V8) in which all registers printed
> with "maint print registers" command exists except csr and dx registers
> (last registers listed below). So I tried to send only supported registers
> (GDB sends nack) and also tried to add '0' padding in order to fill the
> non-implemented registers (same response).
>
> How can I see why GDB sends me a nack ? What can I do ?
>
> PS : I'm using sparc-elf-gdb debugger
>
> Thanks a lot for your answers.
>
>
>
> Guillaume MENANT wrote:
>>
>> I've found the register layout for the g/G commands with the "maint print
>> registers" command and it looks like this :
>>
>> Name Nr Rel Offset Size Type
>> g0 0 0 0 4 int32_t
>> g1 1 1 4 4 int32_t
>> g2 2 2 8 4 int32_t
>> g3 3 3 12 4 int32_t
>> g4 4 4 16 4 int32_t
>> g5 5 5 20 4 int32_t
>> g6 6 6 24 4 int32_t
>> g7 7 7 28 4 int32_t
>> o0 8 8 32 4 int32_t
>> o1 9 9 36 4 int32_t
>> o2 10 10 40 4 int32_t
>> o3 11 11 44 4 int32_t
>> o4 12 12 48 4 int32_t
>> o5 13 13 52 4 int32_t
>> sp 14 14 56 4 *1
>> o7 15 15 60 4 int32_t
>> l0 16 16 64 4 int32_t
>> l1 17 17 68 4 int32_t
>> l2 18 18 72 4 int32_t
>> l3 19 19 76 4 int32_t
>> l4 20 20 80 4 int32_t
>> l5 21 21 84 4 int32_t
>> l6 22 22 88 4 int32_t
>> l7 23 23 92 4 int32_t
>> i0 24 24 96 4 int32_t
>> i1 25 25 100 4 int32_t
>> i2 26 26 104 4 int32_t
>> i3 27 27 108 4 int32_t
>> i4 28 28 112 4 int32_t
>> i5 29 29 116 4 int32_t
>> fp 30 30 120 4 *1
>> i7 31 31 124 4 int32_t
>> f0 32 32 128 4 float
>> f1 33 33 132 4 float
>> f2 34 34 136 4 float
>> f3 35 35 140 4 float
>> f4 36 36 144 4 float
>> f5 37 37 148 4 float
>> f6 38 38 152 4 float
>> f7 39 39 156 4 float
>> f8 40 40 160 4 float
>> f9 41 41 164 4 float
>> f10 42 42 168 4 float
>> f11 43 43 172 4 float
>> f12 44 44 176 4 float
>> f13 45 45 180 4 float
>> f14 46 46 184 4 float
>> f15 47 47 188 4 float
>> f16 48 48 192 4 float
>> f17 49 49 196 4 float
>> f18 50 50 200 4 float
>> f19 51 51 204 4 float
>> f20 52 52 208 4 float
>> f21 53 53 212 4 float
>> f22 54 54 216 4 float
>> f23 55 55 220 4 float
>> f24 56 56 224 4 float
>> f25 57 57 228 4 float
>> f26 58 58 232 4 float
>> f27 59 59 236 4 float
>> f28 60 60 240 4 float
>> f29 61 61 244 4 float
>> f30 62 62 248 4 float
>> f31 63 63 252 4 float
>> y 64 64 256 4 int32_t
>> psr 65 65 260 4 int32_t
>> wim 66 66 264 4 int32_t
>> tbr 67 67 268 4 int32_t
>> pc 68 68 272 4 *1
>> npc 69 69 276 4 *1
>> fsr 70 70 280 4 int32_t
>> csr 71 71 284 4 int32_t
>> d0 72 0 288 8 double
>> d2 73 1 296 8 double
>> d4 74 2 304 8 double
>> d6 75 3 312 8 double
>> d8 76 4 320 8 double
>> d10 77 5 328 8 double
>> d12 78 6 336 8 double
>> d14 79 7 344 8 double
>> d16 80 8 352 8 double
>> d18 81 9 360 8 double
>> d20 82 10 368 8 double
>> d22 83 11 376 8 double
>> d24 84 12 384 8 double
>> d26 85 13 392 8 double
>> d28 86 14 400 8 double
>> d30 87 15 408 8 double
>>
>> Thanks for your answers.
>>
>>
>> Daniel Jacobowitz-2 wrote:
>>>
>>> On Thu, Nov 15, 2007 at 10:54:27AM +0100, Guillaume MENANT wrote:
>>>> The chip I want to debug is the Atmel AT697E and I don't really know
>>>> which
>>>> register of the AT697E corresponds to "32 general-purpose", "sr", "lo",
>>>> "hi",
>>>> "bad", "cause", "fsr", "fir"... How can I have more information about
>>>> that ?
>>>
>>> I doubt the Atmel AT697E is a MIPS; it's a SPARC, seems like.
>>> So that paragraph does not apply.
>>>
>>> Configure a SPARC-targeted GDB and look at the output of "maint print
>>> registers". That should give you an idea of the layout GDB expects.
>>>
>>> --
>>> Daniel Jacobowitz
>>> CodeSourcery
>>>
>>>
>>
>>
>
>
--
View this message in context: http://www.nabble.com/%27g-G%27-GDB-commands-tp13764693p14915335.html
Sent from the Sourceware - gdb list mailing list archive at Nabble.com.
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: 'g/G' GDB commands
2008-01-17 9:19 ` Guillaume MENANT
2008-01-17 9:45 ` Guillaume MENANT
@ 2008-01-17 10:17 ` Mark Kettenis
2008-01-17 14:41 ` Daniel Jacobowitz
2 siblings, 0 replies; 8+ messages in thread
From: Mark Kettenis @ 2008-01-17 10:17 UTC (permalink / raw)
To: guillaume.menant; +Cc: gdb
> Date: Thu, 17 Jan 2008 01:18:51 -0800 (PST)
> From: Guillaume MENANT <guillaume.menant@geensys.com>
>
> I've implemented the reply to the 'g' command but GDB sends me a nack ('-')
> each time (3 times and then freeze).
>
> I'm working on a Atmel AT697E (Sparc V8) in which all registers printed with
> "maint print registers" command exists except csr and dx registers (last
> registers listed below). So I tried to send only supported registers (GDB
> sends nack) and also tried to add '0' padding in order to fill the
> non-implemented registers (same response).
I'm not an expert on GDB's remote protocol, but here is some SPARC
wisdom that might help you.
The %dN registers are pseudo-registers (combining two single-precision
%fN registers into a double-precision value), and should *not* be sent
accross the line.
The %csr register is indeed an implementation defined register (but a
real one). We could define a special LEON2 subtarget in GDB, which
doesn't have this register, but I think it would be easier if you just
passed '0' for this one, since that would avoid all sorts of nasty
configuration issues.
Cheers,
Mark
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: 'g/G' GDB commands
2008-01-17 9:19 ` Guillaume MENANT
2008-01-17 9:45 ` Guillaume MENANT
2008-01-17 10:17 ` Mark Kettenis
@ 2008-01-17 14:41 ` Daniel Jacobowitz
2 siblings, 0 replies; 8+ messages in thread
From: Daniel Jacobowitz @ 2008-01-17 14:41 UTC (permalink / raw)
To: Guillaume MENANT; +Cc: gdb
On Thu, Jan 17, 2008 at 01:18:51AM -0800, Guillaume MENANT wrote:
>
> I've implemented the reply to the 'g' command but GDB sends me a nack ('-')
> each time (3 times and then freeze).
A nack means that the packet was corrupted or the checksum was wrong;
if the packet was valid but contained bad data you'd get a more
specific error.
--
Daniel Jacobowitz
CodeSourcery
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: 'g/G' GDB commands
2007-11-15 9:54 'g/G' GDB commands Guillaume MENANT
2007-11-15 13:38 ` Daniel Jacobowitz
@ 2007-11-15 13:48 ` Michael Snyder
1 sibling, 0 replies; 8+ messages in thread
From: Michael Snyder @ 2007-11-15 13:48 UTC (permalink / raw)
To: Guillaume MENANT; +Cc: gdb
On Thu, 2007-11-15 at 10:54 +0100, Guillaume MENANT wrote:
> Hello,
>
> I'm trying to make a stub for GDB but i've a question about the 'g/G'
> commands. I don't really understand the following paragraph :
>
> "The following |g|/|G| packets have previously been defined. In the
> below, some thirty-two bit registers are transferred as sixty-four bits.
> Those registers should be zero/sign extended (which?) to fill the space
> allocated. Register bytes are transferred in target byte order. The two
> nibbles within a register byte are transferred most-significant -
> least-significant.
Starting from here...
> MIPS32 : All registers are transferred as thirty-two bit quantities in
> the order: 32 general-purpose; sr; lo; hi; bad; cause; pc; 32
> floating-point registers; fsr; fir; fp.
> MIPS64 : All registers are transferred as sixty-four bit quantities
> (including thirty-two bit registers such as |sr|). The ordering is the
> same as |MIPS32|."
The text is about MIPS processors.
> The chip I want to debug is the Atmel AT697E and I don't really know
> which register of the AT697E corresponds to "32 general-purpose", "sr",
> "lo", "hi", "bad", "cause", "fsr", "fir"... How can I have more
> information about that
Atmel is a Sparc processor. Its register set doesn't resemble
the MIPS at all. MIPS was just chosen as an example in the text
above.
If you configure gdb for a generic sparc target, you can get
an idea of the register set gdb will be looking for from a
sparc variant.
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2008-01-17 14:41 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2007-11-15 9:54 'g/G' GDB commands Guillaume MENANT
2007-11-15 13:38 ` Daniel Jacobowitz
2007-12-20 14:01 ` Guillaume MENANT
2008-01-17 9:19 ` Guillaume MENANT
2008-01-17 9:45 ` Guillaume MENANT
2008-01-17 10:17 ` Mark Kettenis
2008-01-17 14:41 ` Daniel Jacobowitz
2007-11-15 13:48 ` Michael Snyder
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