ROCm (Rocgdb debugger) use queues to pass debug commands?

ROCm (Rocgdb debugger) use queues to pass debug commands?

[It's Me]

Hi , 

In a heterogenous environment , how ROCm / rocgdb pass its debug commands ( example : breakpoint command) to the target ( Example a GPU) . Does the debugger queue it’s debug commands using HSA queues ? If that’s not that case how ? 

What is the role of the driver in this case . 

Thanks 

RE: ROCm (Rocgdb debugger) use queues to pass debug commands?

[Tye, Tony]

[AMD Official Use Only - Internal Distribution Only]

rocgdb uses a driver that provides an ioctl interface that is similar in concept to what the ptrace and waitpid do for a CPU. There is a Debugger API library that uses the ioctl interface to provide an general way to control the GPU threads. There is a rocm target that is part of gdb that uses the Debugger ABI to allow GPU threads to be controlled just like CPU threads. All the code is open source.

Thanks,
-Tony

-----Original Message-----
From: Gdb <gdb-bounces@sourceware.org> On Behalf Of It's Me via Gdb
Sent: Monday, February 1, 2021 3:18 PM
To: gdb@sourceware.org
Subject: ROCm (Rocgdb debugger) use queues to pass debug commands?

[CAUTION: External Email]

Hi ,

In a heterogenous environment , how ROCm / rocgdb pass its debug commands ( example : breakpoint command) to the target ( Example a GPU) . Does the debugger queue it’s debug commands using HSA queues ? If that’s not that case how ?

What is the role of the driver in this case .

Thanks

Re: ROCm (Rocgdb debugger) use queues to pass debug commands?

[It's Me]

Hi Tony , 

I appreciate the reply , thanks . 

So just to confirm the commands are not encapsulated in a packet and pushed into queues in HSA AQL queues . 

Can you please give a high level path for setting a breakpoint from user land to the GPU ( how the flow happen through the software stack ) 

Also if there is not much trouble can you also provide any APIs for passing a breakpoint . I looked through rocgdb / rocgdb driver code / ROCm API .. and the clear path is not clear for me .. 

Again thanks a lot for the help and the reply . Appreciated 

> On Feb 1, 2021, at 12:24 PM, Tye, Tony <Tony.Tye@amd.com> wrote:
> 
> [AMD Official Use Only - Internal Distribution Only]
> 
> rocgdb uses a driver that provides an ioctl interface that is similar in concept to what the ptrace and waitpid do for a CPU. There is a Debugger API library that uses the ioctl interface to provide an general way to control the GPU threads. There is a rocm target that is part of gdb that uses the Debugger ABI to allow GPU threads to be controlled just like CPU threads. All the code is open source.
> 
> Thanks,
> -Tony
> 
> -----Original Message-----
> From: Gdb <gdb-bounces@sourceware.org> On Behalf Of It's Me via Gdb
> Sent: Monday, February 1, 2021 3:18 PM
> To: gdb@sourceware.org
> Subject: ROCm (Rocgdb debugger) use queues to pass debug commands?
> 
> [CAUTION: External Email]
> 
> Hi ,
> 
> In a heterogenous environment , how ROCm / rocgdb pass its debug commands ( example : breakpoint command) to the target ( Example a GPU) . Does the debugger queue it’s debug commands using HSA queues ? If that’s not that case how ?
> 
> What is the role of the driver in this case .
> 
> Thanks

RE: ROCm (Rocgdb debugger) use queues to pass debug commands?

[Tye, Tony]

[AMD Official Use Only - Internal Distribution Only]

The breakpoints are done the same way as on the CPU. So just look at how the CPU does it. Gdb writes trap instructions into the code using ptrace poke or /proc/fs. When the processor (CPU or GPU) executes the  breakpoint instruction is causes a “signal” that gets reported through the ioctl to the gdb process.

The AMD GPU Debugger API is open source in github and has a full doxygen documentation. Also, when you install ROCm the documentation is installed in /opt/rocm/share/doc .

Thanks,
-Tony

From: It's Me <aghozzo@gmail.com>
Sent: Monday, February 1, 2021 4:30 PM
To: Tye, Tony <Tony.Tye@amd.com>
Cc: gdb@sourceware.org
Subject: Re: ROCm (Rocgdb debugger) use queues to pass debug commands?

[CAUTION: External Email]

Hi Tony ,

I appreciate the reply , thanks .

So just to confirm the commands are not encapsulated in a packet and pushed into queues in HSA AQL queues .

Can you please give a high level path for setting a breakpoint from user land to the GPU ( how the flow happen through the software stack )

Also if there is not much trouble can you also provide any APIs for passing a breakpoint . I looked through rocgdb / rocgdb driver code / ROCm API .. and the clear path is not clear for me ..

Again thanks a lot for the help and the reply . Appreciated

On Feb 1, 2021, at 12:24 PM, Tye, Tony <Tony.Tye@amd.com<mailto:Tony.Tye@amd.com>> wrote:
[AMD Official Use Only - Internal Distribution Only]

rocgdb uses a driver that provides an ioctl interface that is similar in concept to what the ptrace and waitpid do for a CPU. There is a Debugger API library that uses the ioctl interface to provide an general way to control the GPU threads. There is a rocm target that is part of gdb that uses the Debugger ABI to allow GPU threads to be controlled just like CPU threads. All the code is open source.

Thanks,
-Tony

-----Original Message-----
From: Gdb <gdb-bounces@sourceware.org<mailto:gdb-bounces@sourceware.org>> On Behalf Of It's Me via Gdb
Sent: Monday, February 1, 2021 3:18 PM
To: gdb@sourceware.org<mailto:gdb@sourceware.org>
Subject: ROCm (Rocgdb debugger) use queues to pass debug commands?

[CAUTION: External Email]

Hi ,

In a heterogenous environment , how ROCm / rocgdb pass its debug commands ( example : breakpoint command) to the target ( Example a GPU) . Does the debugger queue it’s debug commands using HSA queues ? If that’s not that case how ?

What is the role of the driver in this case .

Thanks