[CHERI/AArch64] Announcing the Morello branch in binutils-gdb

[CHERI/AArch64] Announcing the Morello branch in binutils-gdb

[Kyrylo Tkachov]

Hi all,

We have pushed the users/ARM/morello-binutils-gdb-master branch to the
binutils repo implementing initial support for the Morello architecture [1].
The Morello architecture is a prototype implementation of the capability-based
CHERI [2] architecture in AArch64, intended to promote research into capability
architectures and their deployment.

The work builds on multiple years of research and development by the
Cambridge University Computer Laboratory of the CHERI project and we are very
excited to explore its application to the Arm architecture.
I encourage you to explore the CHERI specifications [2] and the software
already available.

The gas, objdump and ld components on the branch are in reasonable shape and
have been used to assemble and link a Linux kernel with Morello modifications.
The GDB port is more of a work in progress.

We have published an LLVM-derived Morello toolchain [3], based on the CHERI
toolchain, that can be used to try out the compiler support available for
Morello.

The ABI specifications (available on developer.arm.com [4]) are in an alpha state
and are likely to change going forward.

There are also related publications on the programming model [5] and language
runtime semantics [6] from the CHERI project.

There is work ongoing on porting GCC and glibc to Morello and we will share
more details as that work progresses.

As Morello is a prototype architecture we intend to maintain the toolchain
components on a branch rather than integrate it into master.
We are interested in any feedback you have on the code.
To report bugs please use the GitLab mirror set up at:
https://git.morello-project.org/morello-gnu-toolchain/binutils-gdb

Please send any patches or start discussions on the gnu-morello [7] list,
kindly hosted by Linaro.

Maintainers for the branch are:
* GDB: Luis Machado <luis.machado@linaro.org>
* Binutils: Matthew Malcomson <matthew.malcomson@arm.com>
* Binutils: Kyrylo Tkachov <kyrylo.tkachov@arm.com>

We are very excited to investigate the challenges and possibilities of a
capability-based architecture. Please have a read through the links below
if this project is of interest to you and reach out to us on the list [7]

If you have any feedback or discussions about the Morello architecture and
program you are welcome to reach out on the forums [8].

We look forward to sharing more in the near future.

Last but not least, I'd like to say a big thank you to Siddhesh Poyarekar
for the binutils port described here.

Thanks,
Kyrill

[1] https://developer.arm.com/architectures/cpu-architecture/a-profile/morello
[2] https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/
[3] https://git.morello-project.org/morello/llvm-project
[4] https://developer.arm.com/architectures/system-architectures/software-standards/abi
[5] https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-947.pdf
[6] https://www.cl.cam.ac.uk/research/security/ctsrd/pdfs/201904-asplos-cheriabi.pdf
[7] https://op-lists.linaro.org/mailman/listinfo/gnu-morello
[8] https://community.arm.com/developer/research/morello/