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* [Bug string/29007] New: Undefined behavior in strrchr-sse2 on Intel
@ 2022-03-29 18:42 goldstein.w.n at gmail dot com
2022-03-29 18:48 ` [Bug string/29007] " goldstein.w.n at gmail dot com
2022-03-31 18:04 ` hjl.tools at gmail dot com
0 siblings, 2 replies; 3+ messages in thread
From: goldstein.w.n at gmail dot com @ 2022-03-29 18:42 UTC (permalink / raw)
To: glibc-bugs
https://sourceware.org/bugzilla/show_bug.cgi?id=29007
Bug ID: 29007
Summary: Undefined behavior in strrchr-sse2 on Intel
Product: glibc
Version: 2.36
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: string
Assignee: unassigned at sourceware dot org
Reporter: goldstein.w.n at gmail dot com
Target Milestone: ---
Return from loop uses `bsrq` on a register that is potentially zero:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/strrchr.S;h=50d886713e952e279d73158bf9a08dad93df2be7;hb=HEAD#l157
On AMD this is fine as they defined `bsr`/`bsf` as not changing the destination
if source is zero:
https://www.amd.com/system/files/TechDocs/24594.pdf#page=158
But on Intel this is undefined:
https://www.felixcloutier.com/x86/bsr#:~:text=THEN%0A%20%20%20%20%20%20%20%20ZF%20%E2%86%90%201%3B-,DEST%20is%20undefined,-%3B%0A%20%20%20%20ELSE%0A%20%20%20%20%20%20%20%20ZF%20%E2%86%90%200
On all x86_64 implementations by Intel I know of `bsr` doesn't change the
destination if source is zero and this has worked fine since it was written,
but it could lead to problems in the future if Intel changes there
implementation.
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* [Bug string/29007] Undefined behavior in strrchr-sse2 on Intel
2022-03-29 18:42 [Bug string/29007] New: Undefined behavior in strrchr-sse2 on Intel goldstein.w.n at gmail dot com
@ 2022-03-29 18:48 ` goldstein.w.n at gmail dot com
2022-03-31 18:04 ` hjl.tools at gmail dot com
1 sibling, 0 replies; 3+ messages in thread
From: goldstein.w.n at gmail dot com @ 2022-03-29 18:48 UTC (permalink / raw)
To: glibc-bugs
https://sourceware.org/bugzilla/show_bug.cgi?id=29007
--- Comment #1 from Noah Goldstein <goldstein.w.n at gmail dot com> ---
Note(In reply to Noah Goldstein from comment #0)
> Return from loop uses `bsrq` on a register that is potentially zero:
> https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/strrchr.S;
> h=50d886713e952e279d73158bf9a08dad93df2be7;hb=HEAD#l157
>
> On AMD this is fine as they defined `bsr`/`bsf` as not changing the
> destination if source is zero:
> https://www.amd.com/system/files/TechDocs/24594.pdf#page=158
>
> But on Intel this is undefined:
> https://www.felixcloutier.com/x86/bsr#:~:
> text=THEN%0A%20%20%20%20%20%20%20%20ZF%20%E2%86%90%201%3B-,
> DEST%20is%20undefined,-
> %3B%0A%20%20%20%20ELSE%0A%20%20%20%20%20%20%20%20ZF%20%E2%86%90%200
>
> On all x86_64 implementations by Intel I know of `bsr` doesn't change the
> destination if source is zero and this has worked fine since it was written,
> but it could lead to problems in the future if Intel changes there
> implementation.
Note, I'm working on the function anyways. Taking advantage of the
not-modifying destination feature is useful for avoiding the branch but I can
include the bug-fix in my change if we decide this is actually a bug.
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* [Bug string/29007] Undefined behavior in strrchr-sse2 on Intel
2022-03-29 18:42 [Bug string/29007] New: Undefined behavior in strrchr-sse2 on Intel goldstein.w.n at gmail dot com
2022-03-29 18:48 ` [Bug string/29007] " goldstein.w.n at gmail dot com
@ 2022-03-31 18:04 ` hjl.tools at gmail dot com
1 sibling, 0 replies; 3+ messages in thread
From: hjl.tools at gmail dot com @ 2022-03-31 18:04 UTC (permalink / raw)
To: glibc-bugs
https://sourceware.org/bugzilla/show_bug.cgi?id=29007
H.J. Lu <hjl.tools at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |hjl.tools at gmail dot com
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2022-03-29 18:42 [Bug string/29007] New: Undefined behavior in strrchr-sse2 on Intel goldstein.w.n at gmail dot com
2022-03-29 18:48 ` [Bug string/29007] " goldstein.w.n at gmail dot com
2022-03-31 18:04 ` hjl.tools at gmail dot com
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