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From: "fweimer at redhat dot com" <sourceware-bugzilla@sourceware.org>
To: glibc-bugs@sourceware.org
Subject: [Bug libc/30643] Missing cache information on x86-64 under Intel TDX
Date: Mon, 28 Aug 2023 19:00:37 +0000	[thread overview]
Message-ID: <bug-30643-131-QdOMEfTYYk@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-30643-131@http.sourceware.org/bugzilla/>

https://sourceware.org/bugzilla/show_bug.cgi?id=30643

--- Comment #10 from Florian Weimer <fweimer at redhat dot com> ---
(In reply to Dexuan Cui from comment #9)
> //Mode A) In "fully enlightened" mode with normal TDX shared bit control
> over page encryption, and no paravisor.

(lots of zeroes)

Okay, so not much has changed on the hypervisor side, which means this test
environment is still valid.

I'm still worried about compatibility impact on applications which invoke CPUID
directly (they might have to be patched in ways similar to glibc). But at least
the glibc patch appears to be working.

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  parent reply	other threads:[~2023-08-28 19:00 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-17  7:29 [Bug libc/30643] New: " fweimer at redhat dot com
2023-07-17  8:46 ` [Bug libc/30643] " fweimer at redhat dot com
2023-07-17 13:49 ` decui at microsoft dot com
2023-07-18  8:41 ` fweimer at redhat dot com
2023-07-18  8:42 ` fweimer at redhat dot com
2023-07-20 22:33 ` hjl.tools at gmail dot com
2023-08-25 16:20 ` hjl.tools at gmail dot com
2023-08-28  5:20 ` fweimer at redhat dot com
2023-08-28 17:05 ` decui at microsoft dot com
2023-08-28 17:46 ` hjl.tools at gmail dot com
2023-08-28 18:24 ` decui at microsoft dot com
2023-08-28 18:29 ` decui at microsoft dot com
2023-08-28 18:33 ` fweimer at redhat dot com
2023-08-28 18:48 ` decui at microsoft dot com
2023-08-28 19:00 ` fweimer at redhat dot com [this message]
2023-08-28 19:04 ` hjl.tools at gmail dot com
2023-08-29 19:58 ` cvs-commit at gcc dot gnu.org

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