[Bug libc/30963] New: [RISC-V] glibc doesn't support lp64f abi-variant

[Bug libc/30963] New: [RISC-V] glibc doesn't support lp64f abi-variant

[akhilesh.k at samsung dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=30963

            Bug ID: 30963
           Summary: [RISC-V] glibc doesn't support lp64f abi-variant
           Product: glibc
           Version: 2.38
            Status: NEW
          Severity: normal
          Priority: P2
         Component: libc
          Assignee: unassigned at sourceware dot org
          Reporter: akhilesh.k at samsung dot com
                CC: drepper.fsp at gmail dot com
  Target Milestone: ---

I am working on RISC-V, and I configured gcc with --enable-multilib 
from system lib and glibc source seems it only supports ilp32 ilp32d and lp64 
abi-variants, so my toolchain is not working for lp64f. 

Is there any way to use lp64f ?  

akhilesh.k@sri-1566:/tmp$ /opt/riscv/bin/riscv64-unknown-linux-gnu-gcc hello.c 
-march=rv64imac -mabi=lp64
akhilesh.k@sri-1566:/tmp$ /opt/riscv/bin/riscv64-unknown-linux-gnu-gcc hello.c 
-march=rv64imafdc -mabi=lp64
akhilesh.k@sri-1566:/tmp$ /opt/riscv/bin/riscv64-unknown-linux-gnu-gcc hello.c 
-march=rv64imafdc -mabi=lp64d
akhilesh.k@sri-1566:/tmp$ /opt/riscv/bin/riscv64-unknown-linux-gnu-gcc hello.c 
-march=rv64imafdc -mabi=lp64f
/opt/riscv/lib/gcc/riscv64-unknown-linux-gnu/13.2.0/../../../../riscv64-unknown-linux-gnu/bin/ld:
cannot find crt1.o: No such file or directory
collect2: error: ld returned 1 exit status

My gcc configuration.

riscv-gnu-toolchain/gcc/configure --target=riscv64-unknown-linux-gnu
--prefix=/opt/riscv --with-sysroot=/opt/riscv/sysroot
--with-pkgversion=gc891d8dc23e --with-system-zlib --enable-shared --enable-tls
--enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap
--src=.././gcc --enable-multilib --with-abi=lp64d --with-arch=rv64imafdc
--with-tune=rocket --with-isa-spec=20191213 'CFLAGS_FOR_TARGET=-O2   
-mcmodel=medlow' 'CXXFLAGS_FOR_TARGET=-O2    -mcmodel=medlow'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 13.2.0 (gc891d8dc23e)

-- 
You are receiving this mail because:
You are on the CC list for the bug.

[Bug libc/30963] [RISC-V] glibc doesn't support lp64f abi-variant

[adhemerval.zanella at linaro dot org]

https://sourceware.org/bugzilla/show_bug.cgi?id=30963

Adhemerval Zanella <adhemerval.zanella at linaro dot org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |adhemerval.zanella at linaro dot o
                   |                            |rg

--- Comment #1 from Adhemerval Zanella <adhemerval.zanella at linaro dot org> ---
My understanding is it would require another, since single-float argument are
passed in register and double as soft-float (in integer register).  And a new
ABI is another permutation to build, check, verify, test which adds a
maintainability burden (especially now with different extensions adding more
build permutations, like zba, zbb, zbs, and even XTheadBb).  Do you really want
to continue on the old ABIs road (like MIPS) and have multiple ABIs and
extensions to maintain?

-- 
You are receiving this mail because:
You are on the CC list for the bug.

[Bug libc/30963] [RISC-V] glibc doesn't support lp64f abi-variant

[akhilesh.k at samsung dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=30963

--- Comment #2 from Akhilesh Kumar <akhilesh.k at samsung dot com> ---
> My understanding is it would require another, since single-float argument are passed in register and double as soft-float (in integer register).


when I tried to configure gcc with all possible options for (lp64f) example
"--with-arch=rv64ifd --with-abi=lp64f" or "--with-arch=rv64if_zfh
--with-abi=lp64f"

Getting "unsupported FLEN" error 
sys-root/usr/include/bits/setjmp.h:35:3: error: #error unsupported FLEN

All other option for soft/hard(FLEN 64) working example rv64imac/lp64,
rv64gc/lp64, and rv64gc/lp64d

FLEN (floating-point register width) could be 32 or 64 based ABIs like LP64F is
FLEN 32 and LP64D is 64 


> Do you really want to continue on the old ABIs road (like MIPS) and have multiple ABIs and extensions to maintain?

No

-- 
You are receiving this mail because:
You are on the CC list for the bug.