[glibc] AArch64: Rename IS_ARES to IS_NEOVERSE_N1

[glibc] AArch64: Rename IS_ARES to IS_NEOVERSE_N1

[Wilco Dijkstra]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=0f6278a8793a5d04ea31878119eccf99f469a02d

commit 0f6278a8793a5d04ea31878119eccf99f469a02d
Author: Wilco Dijkstra <wdijkstr@arm.com>
Date:   Wed Jul 15 16:58:07 2020 +0100

    AArch64: Rename IS_ARES to IS_NEOVERSE_N1
    
    Rename IS_ARES to IS_NEOVERSE_N1 since that is a bit clearer.
    
    Reviewed-by: Carlos O'Donell <carlos@redhat.com>

Diff:
---
 sysdeps/aarch64/multiarch/memcpy.c             | 4 +++-
 sysdeps/aarch64/multiarch/memmove.c            | 4 +++-
 sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 4 ++--
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c
index e6f3ae1167..7cf5f033e8 100644
--- a/sysdeps/aarch64/multiarch/memcpy.c
+++ b/sysdeps/aarch64/multiarch/memcpy.c
@@ -41,7 +41,9 @@ libc_ifunc (__libc_memcpy,
 		? __memcpy_falkor
 		: (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr)
 		  ? __memcpy_thunderx2
-		  : (IS_ARES (midr) ? __memcpy_simd : __memcpy_generic)))));
+		  : (IS_NEOVERSE_N1 (midr)
+		     ? __memcpy_simd
+		     : __memcpy_generic)))));
 
 # undef memcpy
 strong_alias (__libc_memcpy, memcpy);
diff --git a/sysdeps/aarch64/multiarch/memmove.c b/sysdeps/aarch64/multiarch/memmove.c
index 1229f8b892..ad10aa8ac6 100644
--- a/sysdeps/aarch64/multiarch/memmove.c
+++ b/sysdeps/aarch64/multiarch/memmove.c
@@ -41,7 +41,9 @@ libc_ifunc (__libc_memmove,
 		? __memmove_falkor
 		: (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr)
 		  ? __memmove_thunderx2
-		  : (IS_ARES (midr) ? __memmove_simd : __memmove_generic)))));
+		  : (IS_NEOVERSE_N1 (midr)
+		     ? __memmove_simd
+		     : __memmove_generic)))));
 
 # undef memmove
 strong_alias (__libc_memmove, memmove);
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
index a81f186ec2..fc688450ee 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
@@ -52,8 +52,8 @@
 
 #define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) == 'h'			      \
                         && MIDR_PARTNUM(midr) == 0x000)
-#define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A'			      \
-			&& MIDR_PARTNUM(midr) == 0xd0c)
+#define IS_NEOVERSE_N1(midr) (MIDR_IMPLEMENTOR(midr) == 'A'		      \
+			      && MIDR_PARTNUM(midr) == 0xd0c)
 
 #define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P'			      \
                        && MIDR_PARTNUM(midr) == 0x000)