[glibc] elf: Fix tst-cpu-features-cpuinfo on some AMD systems (BZ #28090)

[glibc] elf: Fix tst-cpu-features-cpuinfo on some AMD systems (BZ #28090)

[Adhemerval Zanella]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=469761eac842663365bba3dacd4cdf15a2ae328d

commit 469761eac842663365bba3dacd4cdf15a2ae328d
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Thu Jul 15 08:52:44 2021 -0300

    elf: Fix tst-cpu-features-cpuinfo on some AMD systems (BZ #28090)
    
    The SSBD feature is implemented in 2 different ways on AMD processors:
    newer systems (Zen3) provides AMD_SSBD (function 8000_0008, EBX[24]),
    while older system provides AMD_VIRT_SSBD (function 8000_0008, EBX[25]).
    However for AMD_VIRT_SSBD, kernel shows both 'ssdb' and 'virt_ssdb' on
    /proc/cpuinfo; while for AMD_SSBD only 'ssdb' is provided.
    
    This now check is AMD_SSBD is set to check for 'ssbd', otherwise check
    if AMD_VIRT_SSDB is set to check for 'virt_ssbd'.
    
    Checked on x86_64-linux-gnu on a Ryzen 9 5900x.
    
    Reviewed-by: H.J. Lu <hjl.tools@gmail.com>

Diff:
---
 manual/platform.texi                   |  3 +++
 sysdeps/x86/bits/platform/x86.h        |  1 +
 sysdeps/x86/include/cpu-features.h     |  3 +++
 sysdeps/x86/tst-cpu-features-cpuinfo.c | 13 ++++++++++++-
 4 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/manual/platform.texi b/manual/platform.texi
index 037dfc4f20..c56ba7d413 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -189,6 +189,9 @@ The supported processor features are:
 @item
 @code{AMD_STIBP} -- Single thread indirect branch predictors (STIBP) for AMD cpus.
 
+@item
+@code{AMD_VIRT_SSBD} -- Speculative Store Bypass Disable (SSBD) for AMD cpus (older systems).
+
 @item
 @code{AMX_BF16} -- Tile computational operations on bfloat16 numbers.
 
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index 5509b1ad87..2b257606b2 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -282,6 +282,7 @@ enum
   x86_cpu_AMD_IBRS	        = x86_cpu_index_80000008_ebx + 14,
   x86_cpu_AMD_STIBP	        = x86_cpu_index_80000008_ebx + 15,
   x86_cpu_AMD_SSBD	        = x86_cpu_index_80000008_ebx + 24,
+  x86_cpu_AMD_VIRT_SSBD	        = x86_cpu_index_80000008_ebx + 25,
 
   x86_cpu_index_7_ecx_1_eax
     = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int)
diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h
index 59e01df543..a3f11baa7a 100644
--- a/sysdeps/x86/include/cpu-features.h
+++ b/sysdeps/x86/include/cpu-features.h
@@ -293,6 +293,7 @@ enum
 #define bit_cpu_AMD_IBRS	(1u << 14)
 #define bit_cpu_AMD_STIBP	(1u << 15)
 #define bit_cpu_AMD_SSBD	(1u << 24)
+#define bit_cpu_AMD_VIRT_SSBD	(1u << 25)
 
 /* CPUID_INDEX_7_ECX_1.  */
 
@@ -527,6 +528,7 @@ enum
 #define index_cpu_AMD_IBRS	CPUID_INDEX_80000008
 #define index_cpu_AMD_STIBP	CPUID_INDEX_80000008
 #define index_cpu_AMD_SSBD	CPUID_INDEX_80000008
+#define index_cpu_AMD_VIRT_SSBD	CPUID_INDEX_80000008
 
 /* CPUID_INDEX_7_ECX_1.  */
 
@@ -761,6 +763,7 @@ enum
 #define reg_AMD_IBRS		ebx
 #define reg_AMD_STIBP		ebx
 #define reg_AMD_SSBD		ebx
+#define reg_AMD_VIRT_SSBD	ebx
 
 /* CPUID_INDEX_7_ECX_1.  */
 
diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo.c b/sysdeps/x86/tst-cpu-features-cpuinfo.c
index f457e8677b..76bf5b2653 100644
--- a/sysdeps/x86/tst-cpu-features-cpuinfo.c
+++ b/sysdeps/x86/tst-cpu-features-cpuinfo.c
@@ -236,7 +236,18 @@ do_test (int argc, char **argv)
   if (cpu_features->basic.kind == arch_kind_intel)
     fails += CHECK_PROC (ssbd, SSBD);
   else if (cpu_features->basic.kind == arch_kind_amd)
-    fails += CHECK_PROC (ssbd, AMD_SSBD);
+    {
+      /* This feature is implemented in 2 different ways on AMD processors:
+	 newer systems provides AMD_SSBD (function 8000_0008, EBX[24]),
+	 while older system proviseds AMD_VIRT_SSBD (function 8000_008,
+	 EBX[25]).  However for AMD_VIRT_SSBD, kernel shows both 'ssbd'
+	 and 'virt_ssbd' on /proc/cpuinfo; while for AMD_SSBD only 'ssbd'
+	 is provided.  */
+      if (HAS_CPU_FEATURE (AMD_SSBD))
+	fails += CHECK_PROC (ssbd, AMD_SSBD);
+      else if (HAS_CPU_FEATURE (AMD_VIRT_SSBD))
+	fails += CHECK_PROC (virt_ssbd, AMD_VIRT_SSBD);
+    }
   fails += CHECK_PROC (sse, SSE);
   fails += CHECK_PROC (sse2, SSE2);
   fails += CHECK_PROC (pni, SSE3);