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From: Fangrui Song <maskray@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc/maskray/lld] mips: increase stack alignment in clone to match the ABI
Date: Mon, 16 Aug 2021 17:15:14 +0000 (GMT)	[thread overview]
Message-ID: <20210816171514.F140A3951CBF@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=0f62fe053273ff6c62ac95c59b7687c964737b00

commit 0f62fe053273ff6c62ac95c59b7687c964737b00
Author: Xi Ruoyao <xry111@mengyan1223.wang>
Date:   Fri Aug 13 16:01:14 2021 +0000

    mips: increase stack alignment in clone to match the ABI
    
    In "mips: align stack in clone [BZ #28223]"
    (commit 1f51cd9a860ee45eee8a56fb2ba925267a2a7bfe) I made a mistake: I
    misbelieved one "word" was 2-byte and "doubleword" should be 4-byte.
    But in MIPS ABI one "word" is defined 32-bit (4-byte), so "doubleword" is
    8-byte [1], and "quadword" is 16-byte [2].
    
    [1]: "System V Application Binary Interface: MIPS(R) RISC Processor
          Supplement, 3rd edition", page 3-31
    [2]: "MIPSpro(TM) 64-Bit Porting and Transition Guide", page 23

Diff:
---
 sysdeps/unix/sysv/linux/mips/clone.S | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sysdeps/unix/sysv/linux/mips/clone.S b/sysdeps/unix/sysv/linux/mips/clone.S
index 43a5ad3a40..fd71b5ca2e 100644
--- a/sysdeps/unix/sysv/linux/mips/clone.S
+++ b/sysdeps/unix/sysv/linux/mips/clone.S
@@ -55,11 +55,11 @@ NESTED(__clone,4*SZREG,sp)
 	.set		at
 #endif
 
-	/* Align stack to 4/8 bytes per the ABI.  */
+	/* Align stack to 8/16 bytes per the ABI.  */
 #if _MIPS_SIM == _ABIO32
-	li		t0,-4
-#else
 	li		t0,-8
+#else
+	li		t0,-16
 #endif
 	and		a1,a1,t0


                 reply	other threads:[~2021-08-16 17:15 UTC|newest]

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