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* [glibc/google/grte/v5-2.27/master] Make power6 directives be gcc-only
@ 2021-08-28  0:40 Fangrui Song
  0 siblings, 0 replies; only message in thread
From: Fangrui Song @ 2021-08-28  0:40 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=77243023104015ef82eb8c2aaf3268dbb67e8190

commit 77243023104015ef82eb8c2aaf3268dbb67e8190
Author: Stan Shebs <stanshebs@google.com>
Date:   Wed Sep 26 13:47:46 2018 -0700

    Make power6 directives be gcc-only

Diff:
---
 sysdeps/powerpc/fpu/fenv_libc.h            | 11 +++++++++--
 sysdeps/powerpc/fpu/tst-setcontext-fpscr.c |  8 +++++++-
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index 4c19d12b0b..609f65b0e9 100644
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -35,13 +35,19 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 #define fegetenv_register() \
         ({ fenv_t env; asm volatile ("mffs %0" : "=f" (env)); env; })
 
+#if defined __clang__
+#define MACHINE_POWER6
+#else
+#define MACHINE_POWER6 ".machine \"power6\""
+#endif
+
 /* Equivalent to fesetenv, but takes a fenv_t instead of a pointer.  */
 #define fesetenv_register(env) \
 	do { \
 	  double d = (env); \
 	  if(GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
 	    asm volatile (".machine push; " \
-			  ".machine \"power6\"; " \
+			  MACHINE_POWER6 "; " \
 			  "mtfsf 0xff,%0,1,0; " \
 			  ".machine pop" : : "f" (d)); \
 	  else \
@@ -57,7 +63,8 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 #define relax_fenv_state() \
 	do { \
 	   if (GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
-	     asm (".machine push; .machine \"power6\"; " \
+	     asm (".machine push; " \
+		  MACHINE_POWER6 "; " \
 		  "mtfsfi 7,0,1; .machine pop"); \
 	   asm ("mtfsfi 7,0"); \
 	} while(0)
diff --git a/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c b/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c
index c64ca88a85..ad64eb8e22 100644
--- a/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c
+++ b/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c
@@ -104,6 +104,12 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
     u.fpscr;								\
   })
 
+#if defined __clang__
+#define MACHINE_POWER6
+#else
+#define MACHINE_POWER6 ".machine \"power6\""
+#endif
+
 /* We make sure to zero fp after we use it in order to prevent stale data
    in an fp register from making a test-case pass erroneously.  */
 # define _SET_DI_FPSCR(__fpscr)						\
@@ -113,7 +119,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
     fr = u.d;								\
     /* Set the entire 64-bit FPSCR.  */					\
     __asm__ (".machine push; "						\
-	     ".machine \"power6\"; "					\
+	     MACHINE_POWER6 "; "					\
 	     "mtfsf 255,%0,1,0; "					\
 	     ".machine pop" : : "f" (fr));				\
     fr = 0.0;								\


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