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* [glibc] x86_64: Fix svml_s_log1pf16_core_avx512.S code formatting
@ 2022-03-08 6:12 Sunil Pandey
0 siblings, 0 replies; only message in thread
From: Sunil Pandey @ 2022-03-08 6:12 UTC (permalink / raw)
To: glibc-cvs
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=9e40372f69ce7acaa93e72b8fe9e809ab0406fbf
commit 9e40372f69ce7acaa93e72b8fe9e809ab0406fbf
Author: Sunil K Pandey <skpgkp2@gmail.com>
Date: Mon Mar 7 10:47:13 2022 -0800
x86_64: Fix svml_s_log1pf16_core_avx512.S code formatting
This commit contains following formatting changes
1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
between it and the first operand.
3. Instruction greater than 7 characters in length have a
space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
8. 1 space between line content and line comment.
9. Space after all commas.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
Diff:
---
.../fpu/multiarch/svml_s_log1pf16_core_avx512.S | 425 ++++++++++-----------
1 file changed, 212 insertions(+), 213 deletions(-)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S
index cc39548cc6..8fa5068595 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S
@@ -19,7 +19,7 @@
/*
* ALGORITHM DESCRIPTION:
*
- * 1+x = 2^k*(xh + xl) is computed in high-low parts; xh in [1,2)
+ * 1+x = 2^k*(xh + xl) is computed in high-low parts; xh in [1, 2)
* Get short reciprocal approximation Rcp ~ 1/xh
* R = (Rcp*xh - 1.0) + Rcp*xl
* log1p(x) = k*log(2.0) - log(Rcp) + poly(R)
@@ -30,242 +30,241 @@
/* Offsets for data table __svml_slog1p_data_internal
*/
-#define SgnMask 0
-#define sOne 64
-#define sPoly_1 128
-#define sPoly_2 192
-#define sPoly_3 256
-#define sPoly_4 320
-#define sPoly_5 384
-#define sPoly_6 448
-#define sPoly_7 512
-#define sPoly_8 576
-#define iHiDelta 640
-#define iLoRange 704
-#define iBrkValue 768
-#define iOffExpoMask 832
-#define sLn2 896
+#define SgnMask 0
+#define sOne 64
+#define sPoly_1 128
+#define sPoly_2 192
+#define sPoly_3 256
+#define sPoly_4 320
+#define sPoly_5 384
+#define sPoly_6 448
+#define sPoly_7 512
+#define sPoly_8 576
+#define iHiDelta 640
+#define iLoRange 704
+#define iBrkValue 768
+#define iOffExpoMask 832
+#define sLn2 896
#include <sysdep.h>
- .text
- .section .text.exex512,"ax",@progbits
+ .section .text.exex512, "ax", @progbits
ENTRY(_ZGVeN16v_log1pf_skx)
- pushq %rbp
- cfi_def_cfa_offset(16)
- movq %rsp, %rbp
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
- andq $-64, %rsp
- subq $192, %rsp
- vmovups sOne+__svml_slog1p_data_internal(%rip), %zmm2
-
-/* reduction: compute r,n */
- vmovups iBrkValue+__svml_slog1p_data_internal(%rip), %zmm12
- vmovups SgnMask+__svml_slog1p_data_internal(%rip), %zmm4
- vmovaps %zmm0, %zmm3
-
-/* compute 1+x as high, low parts */
- vmaxps {sae}, %zmm3, %zmm2, %zmm5
- vminps {sae}, %zmm3, %zmm2, %zmm7
- vandnps %zmm3, %zmm4, %zmm1
- vpternlogd $255, %zmm4, %zmm4, %zmm4
- vaddps {rn-sae}, %zmm7, %zmm5, %zmm9
- vpsubd %zmm12, %zmm9, %zmm10
- vsubps {rn-sae}, %zmm9, %zmm5, %zmm6
-
-/* check argument value ranges */
- vpaddd iHiDelta+__svml_slog1p_data_internal(%rip), %zmm9, %zmm8
- vpsrad $23, %zmm10, %zmm13
- vmovups sPoly_5+__svml_slog1p_data_internal(%rip), %zmm9
- vpcmpd $5, iLoRange+__svml_slog1p_data_internal(%rip), %zmm8, %k1
- vpslld $23, %zmm13, %zmm14
- vaddps {rn-sae}, %zmm7, %zmm6, %zmm15
- vcvtdq2ps {rn-sae}, %zmm13, %zmm0
- vpsubd %zmm14, %zmm2, %zmm13
- vmovups sPoly_8+__svml_slog1p_data_internal(%rip), %zmm7
- vmovups sPoly_1+__svml_slog1p_data_internal(%rip), %zmm14
- vmulps {rn-sae}, %zmm13, %zmm15, %zmm6
- vpandd iOffExpoMask+__svml_slog1p_data_internal(%rip), %zmm10, %zmm11
- vpaddd %zmm12, %zmm11, %zmm5
- vmovups sPoly_4+__svml_slog1p_data_internal(%rip), %zmm10
- vmovups sPoly_3+__svml_slog1p_data_internal(%rip), %zmm11
- vmovups sPoly_2+__svml_slog1p_data_internal(%rip), %zmm12
-
-/* polynomial evaluation */
- vsubps {rn-sae}, %zmm2, %zmm5, %zmm2
- vaddps {rn-sae}, %zmm6, %zmm2, %zmm15
- vmovups sPoly_7+__svml_slog1p_data_internal(%rip), %zmm2
- vfmadd231ps {rn-sae}, %zmm15, %zmm7, %zmm2
- vpandnd %zmm8, %zmm8, %zmm4{%k1}
- vmovups sPoly_6+__svml_slog1p_data_internal(%rip), %zmm8
-
-/* combine and get argument value range mask */
- vptestmd %zmm4, %zmm4, %k0
- vfmadd213ps {rn-sae}, %zmm8, %zmm15, %zmm2
- kmovw %k0, %edx
- vfmadd213ps {rn-sae}, %zmm9, %zmm15, %zmm2
- vfmadd213ps {rn-sae}, %zmm10, %zmm15, %zmm2
- vfmadd213ps {rn-sae}, %zmm11, %zmm15, %zmm2
- vfmadd213ps {rn-sae}, %zmm12, %zmm15, %zmm2
- vfmadd213ps {rn-sae}, %zmm14, %zmm15, %zmm2
- vmulps {rn-sae}, %zmm15, %zmm2, %zmm4
- vfmadd213ps {rn-sae}, %zmm15, %zmm15, %zmm4
-
-/* final reconstruction */
- vmovups sLn2+__svml_slog1p_data_internal(%rip), %zmm15
- vfmadd213ps {rn-sae}, %zmm4, %zmm15, %zmm0
- vorps %zmm1, %zmm0, %zmm0
- testl %edx, %edx
-
-/* Go to special inputs processing branch */
- jne L(SPECIAL_VALUES_BRANCH)
- # LOE rbx r12 r13 r14 r15 edx zmm0 zmm3
-
-/* Restore registers
- * and exit the function
- */
+ pushq %rbp
+ cfi_def_cfa_offset(16)
+ movq %rsp, %rbp
+ cfi_def_cfa(6, 16)
+ cfi_offset(6, -16)
+ andq $-64, %rsp
+ subq $192, %rsp
+ vmovups sOne+__svml_slog1p_data_internal(%rip), %zmm2
+
+ /* reduction: compute r, n */
+ vmovups iBrkValue+__svml_slog1p_data_internal(%rip), %zmm12
+ vmovups SgnMask+__svml_slog1p_data_internal(%rip), %zmm4
+ vmovaps %zmm0, %zmm3
+
+ /* compute 1+x as high, low parts */
+ vmaxps {sae}, %zmm3, %zmm2, %zmm5
+ vminps {sae}, %zmm3, %zmm2, %zmm7
+ vandnps %zmm3, %zmm4, %zmm1
+ vpternlogd $255, %zmm4, %zmm4, %zmm4
+ vaddps {rn-sae}, %zmm7, %zmm5, %zmm9
+ vpsubd %zmm12, %zmm9, %zmm10
+ vsubps {rn-sae}, %zmm9, %zmm5, %zmm6
+
+ /* check argument value ranges */
+ vpaddd iHiDelta+__svml_slog1p_data_internal(%rip), %zmm9, %zmm8
+ vpsrad $23, %zmm10, %zmm13
+ vmovups sPoly_5+__svml_slog1p_data_internal(%rip), %zmm9
+ vpcmpd $5, iLoRange+__svml_slog1p_data_internal(%rip), %zmm8, %k1
+ vpslld $23, %zmm13, %zmm14
+ vaddps {rn-sae}, %zmm7, %zmm6, %zmm15
+ vcvtdq2ps {rn-sae}, %zmm13, %zmm0
+ vpsubd %zmm14, %zmm2, %zmm13
+ vmovups sPoly_8+__svml_slog1p_data_internal(%rip), %zmm7
+ vmovups sPoly_1+__svml_slog1p_data_internal(%rip), %zmm14
+ vmulps {rn-sae}, %zmm13, %zmm15, %zmm6
+ vpandd iOffExpoMask+__svml_slog1p_data_internal(%rip), %zmm10, %zmm11
+ vpaddd %zmm12, %zmm11, %zmm5
+ vmovups sPoly_4+__svml_slog1p_data_internal(%rip), %zmm10
+ vmovups sPoly_3+__svml_slog1p_data_internal(%rip), %zmm11
+ vmovups sPoly_2+__svml_slog1p_data_internal(%rip), %zmm12
+
+ /* polynomial evaluation */
+ vsubps {rn-sae}, %zmm2, %zmm5, %zmm2
+ vaddps {rn-sae}, %zmm6, %zmm2, %zmm15
+ vmovups sPoly_7+__svml_slog1p_data_internal(%rip), %zmm2
+ vfmadd231ps {rn-sae}, %zmm15, %zmm7, %zmm2
+ vpandnd %zmm8, %zmm8, %zmm4{%k1}
+ vmovups sPoly_6+__svml_slog1p_data_internal(%rip), %zmm8
+
+ /* combine and get argument value range mask */
+ vptestmd %zmm4, %zmm4, %k0
+ vfmadd213ps {rn-sae}, %zmm8, %zmm15, %zmm2
+ kmovw %k0, %edx
+ vfmadd213ps {rn-sae}, %zmm9, %zmm15, %zmm2
+ vfmadd213ps {rn-sae}, %zmm10, %zmm15, %zmm2
+ vfmadd213ps {rn-sae}, %zmm11, %zmm15, %zmm2
+ vfmadd213ps {rn-sae}, %zmm12, %zmm15, %zmm2
+ vfmadd213ps {rn-sae}, %zmm14, %zmm15, %zmm2
+ vmulps {rn-sae}, %zmm15, %zmm2, %zmm4
+ vfmadd213ps {rn-sae}, %zmm15, %zmm15, %zmm4
+
+ /* final reconstruction */
+ vmovups sLn2+__svml_slog1p_data_internal(%rip), %zmm15
+ vfmadd213ps {rn-sae}, %zmm4, %zmm15, %zmm0
+ vorps %zmm1, %zmm0, %zmm0
+ testl %edx, %edx
+
+ /* Go to special inputs processing branch */
+ jne L(SPECIAL_VALUES_BRANCH)
+ # LOE rbx r12 r13 r14 r15 edx zmm0 zmm3
+
+ /* Restore registers
+ * and exit the function
+ */
L(EXIT):
- movq %rbp, %rsp
- popq %rbp
- cfi_def_cfa(7, 8)
- cfi_restore(6)
- ret
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
-
-/* Branch to process
- * special inputs
- */
+ movq %rbp, %rsp
+ popq %rbp
+ cfi_def_cfa(7, 8)
+ cfi_restore(6)
+ ret
+ cfi_def_cfa(6, 16)
+ cfi_offset(6, -16)
+
+ /* Branch to process
+ * special inputs
+ */
L(SPECIAL_VALUES_BRANCH):
- vmovups %zmm3, 64(%rsp)
- vmovups %zmm0, 128(%rsp)
- # LOE rbx r12 r13 r14 r15 edx zmm0
-
- xorl %eax, %eax
- # LOE rbx r12 r13 r14 r15 eax edx
-
- vzeroupper
- movq %r12, 16(%rsp)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
- movl %eax, %r12d
- movq %r13, 8(%rsp)
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
- movl %edx, %r13d
- movq %r14, (%rsp)
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r15 r12d r13d
-
-/* Range mask
- * bits check
- */
+ vmovups %zmm3, 64(%rsp)
+ vmovups %zmm0, 128(%rsp)
+ # LOE rbx r12 r13 r14 r15 edx zmm0
+
+ xorl %eax, %eax
+ # LOE rbx r12 r13 r14 r15 eax edx
+
+ vzeroupper
+ movq %r12, 16(%rsp)
+ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+ movl %eax, %r12d
+ movq %r13, 8(%rsp)
+ /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+ movl %edx, %r13d
+ movq %r14, (%rsp)
+ /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+ # LOE rbx r15 r12d r13d
+
+ /* Range mask
+ * bits check
+ */
L(RANGEMASK_CHECK):
- btl %r12d, %r13d
+ btl %r12d, %r13d
-/* Call scalar math function */
- jc L(SCALAR_MATH_CALL)
- # LOE rbx r15 r12d r13d
+ /* Call scalar math function */
+ jc L(SCALAR_MATH_CALL)
+ # LOE rbx r15 r12d r13d
-/* Special inputs
- * processing loop
- */
+ /* Special inputs
+ * processing loop
+ */
L(SPECIAL_VALUES_LOOP):
- incl %r12d
- cmpl $16, %r12d
-
-/* Check bits in range mask */
- jl L(RANGEMASK_CHECK)
- # LOE rbx r15 r12d r13d
-
- movq 16(%rsp), %r12
- cfi_restore(12)
- movq 8(%rsp), %r13
- cfi_restore(13)
- movq (%rsp), %r14
- cfi_restore(14)
- vmovups 128(%rsp), %zmm0
-
-/* Go to exit */
- jmp L(EXIT)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r12 r13 r14 r15 zmm0
-
-/* Scalar math fucntion call
- * to process special input
- */
+ incl %r12d
+ cmpl $16, %r12d
+
+ /* Check bits in range mask */
+ jl L(RANGEMASK_CHECK)
+ # LOE rbx r15 r12d r13d
+
+ movq 16(%rsp), %r12
+ cfi_restore(12)
+ movq 8(%rsp), %r13
+ cfi_restore(13)
+ movq (%rsp), %r14
+ cfi_restore(14)
+ vmovups 128(%rsp), %zmm0
+
+ /* Go to exit */
+ jmp L(EXIT)
+ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+ /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+ /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+ # LOE rbx r12 r13 r14 r15 zmm0
+
+ /* Scalar math fucntion call
+ * to process special input
+ */
L(SCALAR_MATH_CALL):
- movl %r12d, %r14d
- movss 64(%rsp,%r14,4), %xmm0
- call log1pf@PLT
- # LOE rbx r14 r15 r12d r13d xmm0
+ movl %r12d, %r14d
+ movss 64(%rsp, %r14, 4), %xmm0
+ call log1pf@PLT
+ # LOE rbx r14 r15 r12d r13d xmm0
- movss %xmm0, 128(%rsp,%r14,4)
+ movss %xmm0, 128(%rsp, %r14, 4)
-/* Process special inputs in loop */
- jmp L(SPECIAL_VALUES_LOOP)
- # LOE rbx r15 r12d r13d
+ /* Process special inputs in loop */
+ jmp L(SPECIAL_VALUES_LOOP)
+ # LOE rbx r15 r12d r13d
END(_ZGVeN16v_log1pf_skx)
- .section .rodata, "a"
- .align 64
+ .section .rodata, "a"
+ .align 64
#ifdef __svml_slog1p_data_internal_typedef
typedef unsigned int VUINT32;
typedef struct {
- __declspec(align(64)) VUINT32 SgnMask[16][1];
- __declspec(align(64)) VUINT32 sOne[16][1];
- __declspec(align(64)) VUINT32 sPoly[8][16][1];
- __declspec(align(64)) VUINT32 iHiDelta[16][1];
- __declspec(align(64)) VUINT32 iLoRange[16][1];
- __declspec(align(64)) VUINT32 iBrkValue[16][1];
- __declspec(align(64)) VUINT32 iOffExpoMask[16][1];
- __declspec(align(64)) VUINT32 sLn2[16][1];
+ __declspec(align(64)) VUINT32 SgnMask[16][1];
+ __declspec(align(64)) VUINT32 sOne[16][1];
+ __declspec(align(64)) VUINT32 sPoly[8][16][1];
+ __declspec(align(64)) VUINT32 iHiDelta[16][1];
+ __declspec(align(64)) VUINT32 iLoRange[16][1];
+ __declspec(align(64)) VUINT32 iBrkValue[16][1];
+ __declspec(align(64)) VUINT32 iOffExpoMask[16][1];
+ __declspec(align(64)) VUINT32 sLn2[16][1];
} __svml_slog1p_data_internal;
#endif
__svml_slog1p_data_internal:
- /*== SgnMask ==*/
- .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff
- /*== sOne = SP 1.0 ==*/
- .align 64
- .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
- /*== sPoly[] = SP polynomial ==*/
- .align 64
- .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */
- .long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */
- .long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */
- .long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */
- .long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */
- .long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */
- .long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */
- .long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */
- /*== iHiDelta = SP 80000000-7f000000 ==*/
- .align 64
- .long 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000
- /*== iLoRange = SP 00800000+iHiDelta ==*/
- .align 64
- .long 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000
- /*== iBrkValue = SP 2/3 ==*/
- .align 64
- .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
- /*== iOffExpoMask = SP significand mask ==*/
- .align 64
- .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
- /*== sLn2 = SP ln(2) ==*/
- .align 64
- .long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218
- .align 64
- .type __svml_slog1p_data_internal,@object
- .size __svml_slog1p_data_internal,.-__svml_slog1p_data_internal
+ /* SgnMask */
+ .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff
+ /* sOne = SP 1.0 */
+ .align 64
+ .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
+ /* sPoly[] = SP polynomial */
+ .align 64
+ .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */
+ .long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */
+ .long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */
+ .long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */
+ .long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */
+ .long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */
+ .long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */
+ .long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */
+ /* iHiDelta = SP 80000000-7f000000 */
+ .align 64
+ .long 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000
+ /* iLoRange = SP 00800000+iHiDelta */
+ .align 64
+ .long 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000
+ /* iBrkValue = SP 2/3 */
+ .align 64
+ .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
+ /* iOffExpoMask = SP significand mask */
+ .align 64
+ .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
+ /* sLn2 = SP ln(2) */
+ .align 64
+ .long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218
+ .align 64
+ .type __svml_slog1p_data_internal, @object
+ .size __svml_slog1p_data_internal, .-__svml_slog1p_data_internal
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2022-03-08 6:12 [glibc] x86_64: Fix svml_s_log1pf16_core_avx512.S code formatting Sunil Pandey
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