public inbox for
help / color / mirror / Atom feed
* [glibc/release/2.35/master] x86: include BMI1 and BMI2 in x86-64-v3 level
@ 2022-10-03 21:55 Aurelien Jarno
  0 siblings, 0 replies; only message in thread
From: Aurelien Jarno @ 2022-10-03 21:55 UTC (permalink / raw)
  To: glibc-cvs;h=97ff96b0e12975ebb409f1668559651f30d13041

commit 97ff96b0e12975ebb409f1668559651f30d13041
Author: Aurelien Jarno <>
Date:   Mon Oct 3 23:16:46 2022 +0200

    x86: include BMI1 and BMI2 in x86-64-v3 level
    The "System V Application Binary Interface AMD64 Architecture Processor
    Supplement" mandates the BMI1 and BMI2 CPU features for the x86-64-v3
    Reviewed-by: Noah Goldstein  <>
    (cherry picked from commit b80f16adbd979831bf25ea491e1261e81885c2b6)

 sysdeps/x86/get-isa-level.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sysdeps/x86/get-isa-level.h b/sysdeps/x86/get-isa-level.h
index 1ade78ab73..5b4dd5f062 100644
--- a/sysdeps/x86/get-isa-level.h
+++ b/sysdeps/x86/get-isa-level.h
@@ -47,6 +47,8 @@ get_isa_level (const struct cpu_features *cpu_features)
 	  isa_level |= GNU_PROPERTY_X86_ISA_1_V2;
 	  if (CPU_FEATURE_USABLE_P (cpu_features, AVX)
 	      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
+	      && CPU_FEATURE_USABLE_P (cpu_features, BMI1)
+	      && CPU_FEATURE_USABLE_P (cpu_features, BMI2)
 	      && CPU_FEATURE_USABLE_P (cpu_features, F16C)
 	      && CPU_FEATURE_USABLE_P (cpu_features, FMA)
 	      && CPU_FEATURE_USABLE_P (cpu_features, LZCNT)

^ permalink raw reply	[flat|nested] only message in thread

only message in thread, other threads:[~2022-10-03 21:55 UTC | newest]

Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-03 21:55 [glibc/release/2.35/master] x86: include BMI1 and BMI2 in x86-64-v3 level Aurelien Jarno

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).