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From: Szabolcs Nagy <nsz@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc/arm/morello/main] TODO(uapi): cheri: start: restrict auxv capability permissions
Date: Wed, 26 Oct 2022 15:20:45 +0000 (GMT)	[thread overview]
Message-ID: <20221026152045.590993882148@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=487d4e0adb5a90cf0ac9a2d6716a472bc78ffb58

commit 487d4e0adb5a90cf0ac9a2d6716a472bc78ffb58
Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
Date:   Fri Oct 21 09:52:47 2022 +0100

    TODO(uapi): cheri: start: restrict auxv capability permissions
    
    TODO: not needed with full pcuabi

Diff:
---
 elf/dl-support.c                     | 2 ++
 elf/rtld.c                           | 2 ++
 sysdeps/aarch64/morello/dl-machine.h | 2 ++
 sysdeps/aarch64/morello/start.c      | 2 ++
 4 files changed, 8 insertions(+)

diff --git a/elf/dl-support.c b/elf/dl-support.c
index ffc1d8d01b..f2f0bdbaf4 100644
--- a/elf/dl-support.c
+++ b/elf/dl-support.c
@@ -258,7 +258,9 @@ _dl_aux_init (ElfW(auxv_t) *av)
 
 # ifdef __CHERI_PURE_CAPABILITY__
   _dl_main_map.l_map_start = auxv_values[AT_CHERI_EXEC_RX_CAP];
+  _dl_main_map.l_map_start = __builtin_cheri_perms_and (_dl_main_map.l_map_start, CAP_PERM_MASK_RX);
   _dl_main_map.l_rw_start = auxv_values[AT_CHERI_EXEC_RW_CAP];
+  _dl_main_map.l_rw_start = __builtin_cheri_perms_and (_dl_main_map.l_rw_start, CAP_PERM_MASK_RW);
 # endif
 }
 #endif
diff --git a/elf/rtld.c b/elf/rtld.c
index 41ffb297e5..7eeb5c174b 100644
--- a/elf/rtld.c
+++ b/elf/rtld.c
@@ -1724,9 +1724,11 @@ dl_main (const ElfW(Phdr) *phdr,
 	  {
 	  case AT_CHERI_EXEC_RX_CAP:
 	    main_map->l_map_start = av->a_un.a_val;
+	    main_map->l_map_start = __builtin_cheri_perms_and (main_map->l_map_start, CAP_PERM_MASK_RX);
 	    break;
 	  case AT_CHERI_EXEC_RW_CAP:
 	    main_map->l_rw_start = av->a_un.a_val;
+	    main_map->l_rw_start = __builtin_cheri_perms_and (main_map->l_rw_start, CAP_PERM_MASK_RW);
 	    break;
 	  }
 #endif
diff --git a/sysdeps/aarch64/morello/dl-machine.h b/sysdeps/aarch64/morello/dl-machine.h
index 0f681b1925..7da7c5bfc0 100644
--- a/sysdeps/aarch64/morello/dl-machine.h
+++ b/sysdeps/aarch64/morello/dl-machine.h
@@ -152,6 +152,8 @@ elf_machine_rtld_base_setup (struct link_map *map, void *args)
       cap_rw = cap_exe_rw;
       ldso_base = cap_rx; /* Assume load segments start at vaddr 0.  */
     }
+  cap_rx = __builtin_cheri_perms_and (cap_rx, CAP_PERM_MASK_RX);
+  cap_rw = __builtin_cheri_perms_and (cap_rw, CAP_PERM_MASK_RW);
   map->l_addr = ldso_base;
   map->l_map_start = cap_rx;
   map->l_rw_start = cap_rw;
diff --git a/sysdeps/aarch64/morello/start.c b/sysdeps/aarch64/morello/start.c
index de7aeab4c9..5d413ae78e 100644
--- a/sysdeps/aarch64/morello/start.c
+++ b/sysdeps/aarch64/morello/start.c
@@ -124,9 +124,11 @@ get_caps (uintptr_t *cap_rx, uintptr_t *cap_rw, const uintptr_t *auxv)
 	  return;
 	case AT_CHERI_EXEC_RX_CAP:
 	  *cap_rx = auxv[1];
+	  *cap_rx = __builtin_cheri_perms_and (*cap_rx, CAP_PERM_MASK_RX);
 	  break;
 	case AT_CHERI_EXEC_RW_CAP:
 	  *cap_rw = auxv[1];
+	  *cap_rw = __builtin_cheri_perms_and (*cap_rw, CAP_PERM_MASK_RW);
 	  break;
 	}
       auxv += 2;

             reply	other threads:[~2022-10-26 15:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-26 15:20 Szabolcs Nagy [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-11-23 14:49 Szabolcs Nagy
2022-10-27 13:59 Szabolcs Nagy
2022-10-26 14:49 Szabolcs Nagy

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