[glibc] LoongArch: Unify Register Names.

[glibc] LoongArch: Unify Register Names.

[Yinyu Cai]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=83e9576d415c85faf9b2aaa9d2c9c41c85f08b69

commit 83e9576d415c85faf9b2aaa9d2c9c41c85f08b69
Author: caiyinyu <caiyinyu@loongson.cn>
Date:   Fri Oct 20 09:20:02 2023 +0800

    LoongArch: Unify Register Names.

Diff:
---
 sysdeps/loongarch/__longjmp.S | 20 ++++++++++----------
 sysdeps/loongarch/setjmp.S    | 18 +++++++++---------
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/sysdeps/loongarch/__longjmp.S b/sysdeps/loongarch/__longjmp.S
index cbde1946a0..e87ce31194 100644
--- a/sysdeps/loongarch/__longjmp.S
+++ b/sysdeps/loongarch/__longjmp.S
@@ -43,18 +43,18 @@ ENTRY (__longjmp)
 	REG_L s8, a0, 12*SZREG
 
 #ifndef __loongarch_soft_float
-	FREG_L $f24, a0, 13*SZREG + 0*SZFREG
-	FREG_L $f25, a0, 13*SZREG + 1*SZFREG
-	FREG_L $f26, a0, 13*SZREG + 2*SZFREG
-	FREG_L $f27, a0, 13*SZREG + 3*SZFREG
-	FREG_L $f28, a0, 13*SZREG + 4*SZFREG
-	FREG_L $f29, a0, 13*SZREG + 5*SZFREG
-	FREG_L $f30, a0, 13*SZREG + 6*SZFREG
-	FREG_L $f31, a0, 13*SZREG + 7*SZFREG
+	FREG_L fs0, a0, 13*SZREG + 0*SZFREG
+	FREG_L fs1, a0, 13*SZREG + 1*SZFREG
+	FREG_L fs2, a0, 13*SZREG + 2*SZFREG
+	FREG_L fs3, a0, 13*SZREG + 3*SZFREG
+	FREG_L fs4, a0, 13*SZREG + 4*SZFREG
+	FREG_L fs5, a0, 13*SZREG + 5*SZFREG
+	FREG_L fs6, a0, 13*SZREG + 6*SZFREG
+	FREG_L fs7, a0, 13*SZREG + 7*SZFREG
 #endif
 
-	sltui	a0,a1,1
+	sltui	a0, a1, 1
 	ADD	a0, a0, a1	 # a0 = (a1 == 0) ? 1 : a1
-	jirl	zero,ra,0
+	jirl	zero, ra, 0
 
 END (__longjmp)
diff --git a/sysdeps/loongarch/setjmp.S b/sysdeps/loongarch/setjmp.S
index 6c7065cdbb..b6e4f727cd 100644
--- a/sysdeps/loongarch/setjmp.S
+++ b/sysdeps/loongarch/setjmp.S
@@ -52,19 +52,19 @@ ENTRY (__sigsetjmp)
 	REG_S s8, a0, 12*SZREG
 
 #ifndef __loongarch_soft_float
-	FREG_S $f24, a0, 13*SZREG + 0*SZFREG
-	FREG_S $f25, a0, 13*SZREG + 1*SZFREG
-	FREG_S $f26, a0, 13*SZREG + 2*SZFREG
-	FREG_S $f27, a0, 13*SZREG + 3*SZFREG
-	FREG_S $f28, a0, 13*SZREG + 4*SZFREG
-	FREG_S $f29, a0, 13*SZREG + 5*SZFREG
-	FREG_S $f30, a0, 13*SZREG + 6*SZFREG
-	FREG_S $f31, a0, 13*SZREG + 7*SZFREG
+	FREG_S fs0, a0, 13*SZREG + 0*SZFREG
+	FREG_S fs1, a0, 13*SZREG + 1*SZFREG
+	FREG_S fs2, a0, 13*SZREG + 2*SZFREG
+	FREG_S fs3, a0, 13*SZREG + 3*SZFREG
+	FREG_S fs4, a0, 13*SZREG + 4*SZFREG
+	FREG_S fs5, a0, 13*SZREG + 5*SZFREG
+	FREG_S fs6, a0, 13*SZREG + 6*SZFREG
+	FREG_S fs7, a0, 13*SZREG + 7*SZFREG
 #endif
 
 #if !IS_IN (libc) && IS_IN(rtld)
 	li.w		v0, 0
-	jirl		zero,ra,0
+	jirl		zero, ra, 0
 #else
 	b		__sigjmp_save
 #endif