YAIP - Yet Another Insight Port.

YAIP - Yet Another Insight Port.

[Duane Ellis]

Hi all,

Some of you are aware and some of you are not.  Over the last year or
so you've probably seen a few posts/questions from me I've had to keep
quite, I'm more of a lurker.

Check out http://www.franklin.com/ebookman

FYI - Insight is the debugger. GCC is the compiler...  it's our own
assembler & linker. The Windows SDK port is done with CYGWIN.

It's our new ebook reader, I'm the one responsible for the simulation
engine and GDB support, and a number of the developer tools.  Ever
have the job title of "Jack of All Trades, Master of None".

You can download the SDK now (for over a week now it's been out there)

So.. if messages start popping up about this - There is somebody
at Franklin who listens to the list. :->

No it does not have remote debugging yet, that's probably going to
come (ever here 'real soon now')

Instead, it's a full cpu simulation of our custom RISC cpu and asic
that runs the device. Interrupts, serial port maps to a tcp/ip socket,
B&W & 16 GRAY LCD, buttons, keyboard, internally it has support for
our MMU and other funky things. [Not all devices are simulated, ie:
usb, mmc, and audio, and others I cannot discuss]

The simulator is not based on ?Andrew Cagney's? power-pc simulator,
instead it's *MY* design a standalone simulator that is some what
configurable to different N CPUs and N ASICs (Well, right now only
when N = 1, but the structure is there, we have need to make other
simulation engines for our other custom CPUs and need the ablity to do
other things with the simulator outside of GDB)

The simulator can be linked standalone with a tk/Wish head, or as a
readline based application with tk under it and finally as a linked
into gdb simulator.

It's based off the 991108 insight snapshot :-< I hope to sometime
(ever hear the phrase: real soon now) update it.. however - it works
and it's been working great for over a year.

We developed probably 90% of our code for this product using the
simulator. It is at the core of our product development work. We had
most of it running before we had final FPGA based platform and before
the VHDL/Verilog stuff was finalized. (Ever validate verilog vrs a
cpu/asic simulator, talk about tracing dumps, ever write code to take
apart sdram address line multiplexing dumps from a timing analyzer and
compare that with verilog dumps - vrs your simulator - ugh!)

There is some major wackyness with the way some things are implimented
in our simulator/gdb port - like the "run button" does not work, you
use the continue button.. [gdb does not understand the idea of reset
in an embedded enviornment] You can't use the 'file' command, you must
specify a .coff file on the command line and other weirdness. (Now
that it's public... well I guess I can start giving more complete
questions rather then being vauge and things will improve.)

It's amazing how much you can get done with a full cpu and asic
simulation.  Now we've got the units in *MASS* production, and just
itching to release the thing to the general public...

The last few things are always a pain.. instead of dotting the I's and
crossing the T's we software guys are poking those dots into the eyes
of marketing, and slashing all those T's in the salesmens ties cause
they won't leave us alone...

None of it would be possible without the people on this list, and the
many others out there who have contributed to the GNU project stuff.
I'd like to say thanks to the people who came before me, but "thanks"
does not seem to be enough.

-Duane1