[PATCH 1/2] riscv: sysdeps support for vectorised functions

[Sergei Lewis <slewis@rivosinc.com>]

This allows the build to detect when the compiler has support
for the V extension and its prerequisites enabled in rv64 builds,
and select implementations from sysdeps/riscv/rv64/rvv in this case
if any are present there.

Signed-off-by: Sergei Lewis <slewis@rivosinc.com>
---
 scripts/build-many-glibcs.py  |  5 +++++
 sysdeps/riscv/preconfigure    | 19 +++++++++++++++++++
 sysdeps/riscv/preconfigure.ac | 18 ++++++++++++++++++
 3 files changed, 42 insertions(+)

diff --git a/scripts/build-many-glibcs.py b/scripts/build-many-glibcs.py
index bd212dbc82..4e5aa2de61 100755
--- a/scripts/build-many-glibcs.py
+++ b/scripts/build-many-glibcs.py
@@ -396,6 +396,11 @@ class Context(object):
                         variant='rv64imafdc-lp64d',
                         gcc_cfg=['--with-arch=rv64imafdc', '--with-abi=lp64d',
                                  '--disable-multilib'])
+        self.add_config(arch='riscv64',
+                        os_name='linux-gnu',
+                        variant='rv64imafdcv-lp64d',
+                        gcc_cfg=['--with-arch=rv64imafdcv', '--with-abi=lp64d',
+                                 '--disable-multilib'])
         self.add_config(arch='s390x',
                         os_name='linux-gnu',
                         glibcs=[{},
diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure
index 4dedf4b0bb..5ddc195b46 100644
--- a/sysdeps/riscv/preconfigure
+++ b/sysdeps/riscv/preconfigure
@@ -7,6 +7,7 @@ riscv*)
     flen=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_flen \(.*\)/\1/p'`
     float_abi=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_float_abi_\([^ ]*\) .*/\1/p'`
     atomic=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_atomic' | cut -d' ' -f2`
+    vector=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_vector' | cut -d' ' -f2`
 
     case "$xlen" in
     64 | 32)
@@ -32,6 +33,24 @@ riscv*)
 	;;
     esac
 
+    case "$vector" in
+    __riscv_vector)
+        case "$flen" in
+        64)
+        float_machine=rvv
+        ;;
+        *)
+        # V 1.0 spec requires both F and D extensions, but this may be an older version. Degrade to scalar only.
+        ;;
+        esac
+    ;;
+    *)
+    ;;
+    esac
+
+    { $as_echo "$as_me:${as_lineno-$LINENO}: vector $vector flen $flen float_machine $float_machine" >&5
+$as_echo "$as_me: vector $vector flen $flen float_machine $float_machine" >&6;}
+
     case "$float_abi" in
     soft)
 	abi_flen=0
diff --git a/sysdeps/riscv/preconfigure.ac b/sysdeps/riscv/preconfigure.ac
index a5c30e0dbf..b6b8bb46e4 100644
--- a/sysdeps/riscv/preconfigure.ac
+++ b/sysdeps/riscv/preconfigure.ac
@@ -7,6 +7,7 @@ riscv*)
     flen=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_flen \(.*\)/\1/p'`
     float_abi=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_float_abi_\([^ ]*\) .*/\1/p'`
     atomic=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_atomic' | cut -d' ' -f2`
+    vector=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_vector' | cut -d' ' -f2`
 
     case "$xlen" in
     64 | 32)
@@ -32,6 +33,23 @@ riscv*)
 	;;
     esac
 
+    case "$vector" in
+    __riscv_vector)
+        case "$flen" in
+        64)
+        float_machine=rvv
+        ;;
+        *)
+        # V 1.0 spec requires both F and D extensions, but this may be an older version. Degrade to scalar only.
+        ;;
+        esac
+    ;;
+    *)
+    ;;
+    esac
+
+    AC_MSG_NOTICE([vector $vector flen $flen float_machine $float_machine])
+
     case "$float_abi" in
     soft)
 	abi_flen=0
-- 
2.34.1